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kevin / gru: Enable PD on SHI signals

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The SHI lines connected from the EC to the AP and the AP might not be
turned on.  We should have a pull down on these lines to avoid them
glitching when the AP is in S3 or S5.

BRANCH=None
BUG=chrome-os-partner:56683
TEST=Verify S3/S5 power is decreased, and SHI interface is still
functional in S0 and on sysjump.

Change-Id: I3a9b018e6e8a5eddb1f23e004f1af3da3e503709
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/376360
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
This commit is contained in:
Douglas Anderson
2016-08-25 15:32:28 -07:00
committed by chrome-bot
parent 239eecc52c
commit da9c06a2e7
2 changed files with 13 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
board/kevin/gpio.inc
View File

@@ -12,7 +12,8 @@
GPIO_INT(WP_L, PIN(9, 3), GPIO_INT_BOTH, switch_interrupt)
GPIO_INT(SHI_CS_L, PIN(5, 3), GPIO_INT_FALLING, shi_cs_event)
GPIO_INT(SHI_CS_L, PIN(5, 3), GPIO_INT_FALLING | GPIO_PULL_DOWN,
shi_cs_event)
GPIO_INT(USB_C0_PD_INT_L, PIN(6, 0), GPIO_INT_FALLING | GPIO_PULL_UP,
tcpc_alert_event)
GPIO_INT(USB_C1_PD_INT_L, PIN(6, 2), GPIO_INT_FALLING | GPIO_PULL_UP,
@@ -124,6 +125,15 @@ GPIO(USB_A_CHARGE_EN, PIN(8, 4), GPIO_OUT_LOW)
GPIO(GPIOB6_NC, PIN(B, 6), GPIO_INPUT | GPIO_PULL_UP)
#endif
/*
* SPI host interface - enable PDs by default. These will be made functional
* by the SHI driver when the AP powers up, and restored back to GPIO when
* the AP powers down.
*/
GPIO(SHI_SDI, PIN(4, 6), GPIO_INPUT | GPIO_PULL_DOWN)
GPIO(SHI_SDO, PIN(4, 7), GPIO_INPUT | GPIO_PULL_DOWN)
GPIO(SHI_SCLK, PIN(5, 5), GPIO_INPUT | GPIO_PULL_DOWN)
/* SPIP_MOSI/SPIP_SCLK GPIOA3/A1 */
ALTERNATE(PIN_MASK(A, 0x0A), 1, MODULE_SPI, 0)
/* SPIP_MISO GPIO95 */

5
chip/npcx/shi.c
View File

@@ -779,13 +779,12 @@ static void shi_disable(void)
/* Disable SHI_CS_L interrupt */
gpio_disable_interrupt(GPIO_SHI_CS_L);
/* Disable pullup and interrupts on SHI_CS_L */
gpio_set_flags(GPIO_SHI_CS_L, GPIO_INPUT);
/* Restore SHI_CS_L back to default state */
gpio_reset(GPIO_SHI_CS_L);
/*
* Mux SHI related pins
* SHI_SDI SHI_SDO SHI_CS# SHI_SCLK are selected to GPIO
* (Default GPIO config = input)
*/
CLEAR_BIT(NPCX_DEVALT(ALT_GROUP_C), NPCX_DEVALTC_SHI_SL);
}