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Change PECI_TJMAX to a board config option

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BUG=chrome-os-partner:24455
BRANCH=none
TEST=Manual: Verify that CONIFG_PECI_TJMAX set per-board matches
the value queried over the PECI bus with the restricted
"peciprobe" command.

Change-Id: I8e99a23a66f26d6101e01cc751d0a8ca79686321
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179682
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This commit is contained in:
ChromeOS Developer
2013-12-11 14:40:30 -08:00
committed by chrome-internal-fetch
parent ebb8c88a59
commit df50fccf8e
6 changed files with 17 additions and 13 deletions
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1
board/falco/board.h
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@@ -25,6 +25,7 @@
#define CONFIG_KEYBOARD_BOARD_CONFIG
#define CONFIG_KEYBOARD_PROTOCOL_8042
#define CONFIG_LOW_POWER_IDLE
#define CONFIG_PECI_TJMAX 100
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_X86
#define CONFIG_SWITCH_DEDICATED_RECOVERY

1
board/link/board.h
View File

@@ -27,6 +27,7 @@
#define CONFIG_KEYBOARD_PROTOCOL_8042
#define CONFIG_LED_DRIVER_DS2413
#define CONFIG_ONEWIRE
#define CONFIG_PECI_TJMAX 105
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_X86
#define CONFIG_PWM

1
board/peppy/board.h
View File

@@ -27,6 +27,7 @@
#define CONFIG_KEYBOARD_PROTOCOL_8042
#define CONFIG_LED_COMMON
#define CONFIG_LOW_POWER_IDLE
#define CONFIG_PECI_TJMAX 100
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_X86
#define CONFIG_SWITCH_DEDICATED_RECOVERY

1
board/samus/board.h
View File

@@ -38,6 +38,7 @@
#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
#define CONFIG_CHARGER_INPUT_CURRENT 2000
#define CONFIG_FANS 2
#define CONFIG_PECI_TJMAX 100
#define CONFIG_PWM
#define CONFIG_PWM_KBLIGHT
#define CONFIG_SWITCH_DEDICATED_RECOVERY

17
chip/lm4/peci.c
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@@ -16,15 +16,6 @@
#include "temp_sensor.h"
#include "util.h"
/*
* Max junction temperature for processor in degrees C. This is correct for
* Ivy Bridge and Haswell; future chips don't have PECI.
*
* In theory we could read TjMax from the processor via PECI, but that requires
* closed-source Intel PECI commands.
*/
#define PECI_TJMAX 105
/* Initial PECI baud rate */
#define PECI_BAUD_RATE 100000
@@ -79,9 +70,9 @@ int peci_temp_sensor_get_val(int idx, int *temp_ptr)
* Require at least two valid samples. When the AP transitions into S0,
* it is possible, depending on the timing of the PECI sample, to read
* an invalid temperature. This is very rare, but when it does happen
* the temperature returned is PECI_TJMAX. Requiring two valid samples
* here assures us that one bad maximum temperature reading when
* entering S0 won't cause us to trigger an over temperature.
* the temperature returned is CONFIG_PECI_TJMAX. Requiring two valid
* samples here assures us that one bad maximum temperature reading
* when entering S0 won't cause us to trigger an over temperature.
*/
if (success_cnt < 2)
return EC_ERROR_UNKNOWN;
@@ -117,7 +108,7 @@ static void peci_freq_changed(void)
(PECI_POLL_INTERVAL_MS * (freq / 1000 / 4096));
/* Set up temperature monitoring to report in degrees K */
LM4_PECI_CTL = ((PECI_TJMAX + 273) << 22) | 0x0001 |
LM4_PECI_CTL = ((CONFIG_PECI_TJMAX + 273) << 22) | 0x0001 |
(PECI_RETRY_COUNT << 12) |
(PECI_ERROR_BYPASS << 11);
}

9
include/config.h
View File

@@ -524,6 +524,15 @@
/* Support PECI interface to x86 processor */
#undef CONFIG_PECI
/*
* Maximum operating temperature in degrees Celcius used on some x86
* processors. CPU chip temperature is reported relative to this value and
* is never reported greater than this value. Processor asserts PROCHOT#
* and starts throttling frequency and voltage at this temp. Operation may
* become unreliable if temperature exceeds this limit.
*/
#undef CONFIG_PECI_TJMAX
/*****************************************************************************/
/* PMU config */