npcx: Preserve default values of HW_WIRE

NPCX7 requires that the HW_WIRE bits 2-0 of VWEVSM2 register are set
so that the hardwire signals for SCI, SMI and RCIN are connected to VW
input of eSPI_SIF module. NPCX5 did this by default, however NPCX7 has
made it configurable.

NPCX7 however sets the HW_WIRE bits 2-0 to 1 at reset. So, this change
ensures that they are preserved while initializing VWEVSM2 registers

BUG=b:74111394
BRANCH=None
TEST=Verified that SCI works on glkrvp and meowth with NPCX7.

Change-Id: I9da6f45b4aa0b72b68db6192cb7567f09b072f0c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/943801
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: ML Chao <mlchao@nuvoton.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This commit is contained in:
Furquan Shaikh
2018-03-02 12:06:20 -08:00
committed by chrome-bot
parent 6589e15e42
commit f32d92b7f5

View File

@@ -190,8 +190,8 @@ static void espi_vw_config_out(const struct vwevsm_config_t *config)
index = VWEVSM_IDX_GET(NPCX_VWEVSM(i));
/* Set VW output register */
if (index == config->idx) {
/* Get Wire field */
val = NPCX_VWEVSM(i) & 0x0F;
/* Preserve WIRE(3-0) and HW_WIRE (27-24). */
val = NPCX_VWEVSM(i) & 0x0F00000F;
val |= VWEVSM_FIELD(config->idx,
config->idx_en,
config->valid,