grunt: Making control of SCI and SMI interrupt pins more clear

BRANCH=none
BUG=none
TEST=none

Change-Id: I82d0a68f192fdc339af8682b99781cb16802ac32
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/911590
Reviewed-by: Edward Hill <ecgh@chromium.org>
This commit is contained in:
Jett Rink
2018-02-09 08:16:00 -07:00
committed by chrome-bot
parent c1252e71ca
commit ff11702c40

View File

@@ -61,8 +61,11 @@ GPIO(I2C5_SDA, PIN(3, 6), GPIO_INPUT) /* EC_I2C_EEPROM_SDA and
GPIO(I2C7_SCL, PIN(B, 3), GPIO_INPUT | GPIO_SEL_1P8V) /* EC_I2C_SENSOR_SCL */
GPIO(I2C7_SDA, PIN(B, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* EC_I2C_SENSOR_SDA */
GPIO(PCH_SCI_ODL, PIN(7, 6), GPIO_ODR_HIGH)
GPIO(PCH_SMI_ODL, PIN(C, 6), GPIO_ODR_HIGH)
/*
* The NPCX LPC driver configures and controls SCI and SMI,
* so PCH_SCI_ODL [PIN(7, 6)] and PCH_SMI_ODL [PIN(C, 6)] are
* not defined here as GPIOs.
*/
GPIO(PCH_SLP_S0_L, PIN(A, 4), GPIO_INPUT)
GPIO(EN_USB_A0_5V, PIN(6, 1), GPIO_OUT_LOW) /* Enable A0 5V Charging */