This patch makes EC enable PD communication if it's running in
manual recovery mode. This is required to show recovery screen
on a type-c monitor.
This patch also makes EC-EFS ignore power availability. It will
make EC verify & jump to RW even if power is sourced by a barrel
jack adapter. This should allow depthcharge to show screens
(e.g. broken, warning) on a type-c monitor.
BUG=b:72387533
BRANCH=none
TEST=On Fizz with type-c monitor, verify
- Recovery screen is displayed in manual recovery mode.
- Critical update screen is displayed in normal mode.
- Warning screen is displayed in developer mode.
Monitors tested: Dingdong, Dell S2718D
Change-Id: Ib53e02d1e5c0f5b2d96d9a02fd33022f92e52b04
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/898346
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Host command handler prints every single host command except when
commands are repeated back-to-back. Some commands do not provide
useful info when studying feedback reports or what is worse they
may hide critical info by flooding the EC log.
BUG=chromium:803955
BRANCH=none
TEST=Observe 'HC 0x115' is not printed.
Change-Id: I4901b27bbfedd54dc0d364b16c49d4ed0dea0fc4
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/896694
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Because H1 monitor tx/rx signals to detect servo board,
so we can't pull-up tx/rx or the DETECT_SERVO of H1 will
be always high even the servo board isn't connected.
BUG=none
BRANCH=none
TEST=H1 detect servo board correctly.
Change-Id: I2f2dfa220ed77478e6e622a0ed1189f559044aa3
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/897315
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
To avoid issues where adapter would drive against OTG of lid or
base, and to make sure that we do not over-current the adapter,
we disconnect the base/lid power transfer whenever a new
adapter is connected.
We reenable power transfer as needed.
We also separate out base current control as a new function,
that allows us to record the previous base current only when
the base charge control command is successful, and ignore
errors until the base is responsive for the first time.
Finally, we make sure that
charge_allocate_input_current_limit is only called from a
single location in charger_task.
BRANCH=none
BUG=b:71881017
TEST=Plug/unplug base, reset lux EC, connect charger.
Base is detected, power allocation works as expected.
Change-Id: I8b206d5b0fbcf0fe868b56a0336745aebe2a6dc2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/880021
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This change creates a state machine to handle ap uart detection. It
removes all of the ap_uart stuff from ap_state.c and moves it to
ap_uart_state.c. All boards will now use ap_uart to enable/disable ap
uart and tpm_rst_l to detect the ap state.
Separate ap uart detection from ap detection, so we can disable the ap
uart without enabling deep sleep. If the ap is in S3 on ARM devices,
Cr50 wont be in deep sleep, but the AP UART RX signal wont be pulled up.
In this case we need cr50 ap rx to be disabled and deep sleep to be
disabled.
BUG=b:35647982
BRANCH=cr50
TEST=run firmware_Cr50DeviceState on scalet and electro
Change-Id: I81336a9e232df8d44b325eef59327a1c06a80cba
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/884307
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
If during PMIC initialization, it is identified that there was a VR
fault, then dump fault registers 0x16 and 0x17 to EC console. This
information is very useful during debugging sudden power losses in
field and so it is printed out to EC console.
Additionally, add panic reason with these register values as panic
data so that OS can provide this information in cros ec
panicinfo. This helps in retaining the information even if EC console
logs overflow.
BUG=b:65026806
BRANCH=eve
TEST=Verified that on a VCCIO shutdown, PMIC VR fault is
reported: "PMIC VRFAULT: PWRSTAT1=0x80 PWRSTAT2=0x00"
Change-Id: I583e513f865aeefc7dfc9860ce0ce9789808dea2
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/896163
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Change the EC to drive the Hotplug Detect (HPD) GPIOs.
Grunt HW has these driven from EC to SOC, unlike coral which had
the TCPCs drive the HPD signals to SOC.
BUG=b:71810897
BRANCH=none
TEST=external display works using USB-C to DP adapter on both ports
Change-Id: I22ec9eecc5bdf9c6463dd3ce208d051faf15c57a
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/892099
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
CONFIG_USB_PD_DISCHARGE is now defined automatically if you specify one of
the specified options such as CONFIG_USB_PD_DISCHARGE_TCPC
BRANCH=none
BUG=none
TEST=grunt still discharges using PPC
Change-Id: I94086cfc58bebce9c62ad6aa52b7740b25276d89
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/894676
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Based on measurements, Soraka can pull more current than desired.
Decrease the programmed current limit by an additional factor,
determined by taking the worst-case power measurements across several
different Soraka devices, to ensure that Soraka never pulls more
current than desired.
BRANCH=None
BUG=b:67944740
TEST=Verify with `charger` that input current limit becomes 472mA when a
5V / 500mA charger is plugged, and 2896mA when a 5V / 3000mA charger is
plugged.
Change-Id: I2b2cb6f445533476d173cd7f5fb825d8b11d1405
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/890102
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Benson Leung <bleung@google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
If the sn5s330 PPC is being used to detect VBUS presence
(CONFIG_USB_PD_VBUS_DETECT_PPC), then enable interrupts and call
usb_charger_vbus_change when VBUS_GOOD changes.
BUG=b:72007153,b:72007492
BRANCH=none
TEST=Connect 3A and 1A USB-A chargers to each of Grunt's USB-C ports,
check that BC1.2 detection is working:
With 1A:
> chgsup
port=0/1, type=7, cur=500mA, vtg=5000mV, lsm=1
With 3A:
> chgsup
port=0/1, type=7, cur=2400mA, vtg=5000mV, lsm=1
TEST=Boot Grunt to OS, then connect USB2 mouse or USB3 flash drive to each
of Grunt's USB-C ports. Devices do not work due to b:71772180, but gpioget
shows EC is setting USB_C0/1_BC12_VBUS_ON_L correctly.
Change-Id: Iffc352105a321997adb364b9fbb8bafef248c224
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/887938
Reviewed-by: Jett Rink <jettrink@chromium.org>
- Add a vendor command that provides alert counter. Userspace can use
it e.g. for user metric analysis.
- Add 'alerts' debug console command. It provides information about
chip alerts: supported alerts, fuse status, interrupt status, alert
counter.
- Add 'alerts fire [INT]' command to fire a software defined alert
(globalsec/fwN where N is 0,1,2,3).
Signed-off-by: Anatol Pomazau <anatol@google.com>
BUG=b:63523947
TEST=ran the FW at Pyro and checked alerts data sent to host
Change-Id: I7cec0c451ed71076b44dad14a151b147ff1337e8
Reviewed-on: https://chromium-review.googlesource.com/817639
Commit-Ready: Anatol Pomazau <anatol@google.com>
Tested-by: Anatol Pomazau <anatol@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This allows the acpi_light sysfs entry to be populated with the actual
ALS data.
BUG=b:70290036
BRANCH=None
TEST=Flash meowth; read both illuminance values for the ALS devices
under iio and verify that they are both operational.
Change-Id: Ia22633629195d5bdeedc70a908ceca1411110b7d
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/888218
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
It's no longer necessary to call board_tcpc_init() from PD tasks, since
HOOK_INIT completion is guaranteed before the task starts. Also, calling
board_tcpc_init() for each PD task without a port arg is a bad idea.
BUG=b:72229154
BRANCH=none
TEST=`make buildall -j`
Change-Id: I6fba07771693b8343568041960a263e02775a8fc
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/881538
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
stm32f0 has 20 bytes (not 20 words) of VBAT-backed RAM. Make more
efficient use of our limited storage to prevent trying to use storage
that doesn't exist.
BUG=b:71333840
BRANCH=None
TEST=Negotiate PD, run "reboot" on scarlet EC console, verify reset path
is taken in pd_partner_port_reset().
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ie4c303b74a1b82b84ec971cdcc19c2b21a0032e7
Reviewed-on: https://chromium-review.googlesource.com/885461
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This is required to support mode-aware DPTF. Also, there is no need to
send mode change event in board specific code as that is already done
by dptf common code.
BUG=b:65467566
BRANCH=None
TEST=Verified that trip point temperatures get updated in the OS
depending upon the device mode.
Change-Id: I854628bcde755bdb1c6c1b73fbfa0948e1d7e420
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/887725
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Add BOARD_DEEP_SLEEP_DISABLED and BOARD_DETECT_AP_WITH_UART to
BOARD_ALL_PROPERTIES, so they will be updated after cr50 reboots.
BUG=b:35647982
BRANCH=cr50
TEST=test deep sleep on scarlet
Change-Id: I8999ae7c6c1dad6799b5fdb99ebf5d7618a21c2b
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/882343
Reviewed-by: Randall Spangler <rspangler@chromium.org>
First version of the algorithm, some TODOs are left in the code
but this, generally, works reasonably well.
When charging, we allocate input current in this general order:
- Base system (fixed, low, number)
- Lid system (based on PSYS)
- Lid battery (estimating how much current the battery actually
requires)
- Base battery (similar estimation)
- Provide everything else to lid
When discharging, we generally:
- First discharge the base battery
- Then discharge the lid battery
BRANCH=none
BUG=b:71881017
TEST=Flash lux and wand, EC-EC communication works, adapter power
is split in a sensible way, and discharging works fine.
Change-Id: I8a4f87963962fc5466b2fedf1347eb4dadd35740
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/659460
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Lux base detection is a little trickier than previous bases,
as the detection levels switch around when GPIO_EC_COMM_PD gets
enabled:
- When disconnected, low levels (~550mV) mean base got connected,
and high levels (~3300mV) mean base is still disconnected.
- When connected, low levels (~43mV) mean base got disconnected,
and high levels (~2346mV) mean base is still connected.
On reset, when base_status is unknown, we enable GPIO_EC_COMM_PD,
to be able to differentiate between connected and disconnected.
BRANCH=none
BUG=b:67029560
TEST=Connect lux/wand, check that base gets detected correctly.
TEST=Type reboot in EC console, base gets detected as well.
Change-Id: I742def8e378a93c08e2dcc155b06cbca814e7fd8
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/845543
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The way Nautilus battery checks the conditions of CHG/DSG FETs
are slightly different from the other smart batteries we use.
So the current implementation of battery_check_disconnect() doesn't work.
BUG=b:69016914
BRANCH=none
TEST=recovery from software-based battery cutoff 10/10
Change-Id: I88de64d8da55f0b57fbdde21d4529435841bdf76
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/882941
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
There are two versions of npcx7 EVB. This CL adds the definition
BOARD_VERSION (default is 2) in board.h. So we can include different
features or set CONFIG_* flags based on the value of BOARD_VERSION to
meet the default HW configuration of npcx7 EVBs.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=Change BOARD_VERSION to 1/2; "BOARD=npcx7_evb make";
Flash the image on EVB 1/2; make sure the EVBs bootup.
Change-Id: Id4556f702af8c26778a649addde7cf490b5301fc
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/873510
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
To support CR50 deep sleep mode:
In up-sequence, SYS_RST_L needs to remain asserted on the transition
to S5 and then deasserted on the transition to S0;
In down-sequence, SYS_RST_L needs to be asserted on the transition to S5.
This only affects Scarlet.
BUG=b:35647982
BRANCH=none
TEST=minitor SYS_RST_L pin to confirm it is toggled right
Change-Id: Ic73d39c531f9d28b2087a23d58613e98ec80dbd2
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/866115
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
All init hooks complete before tasks are started (since
crrev.com/c/456628), so board_tcpc_init will finish before
the PD tasks start.
Using the init hook instead of CONFIG_USB_PD_TCPC_BOARD_INIT
avoids the problem of board_tcpc_init being called by every
PD task.
BUG=b:72229154
BRANCH=none
TEST=PD still works on grunt,
board_tcpc_init is only called once,
PD task init happens after board_tcpc_init finishes
Change-Id: Ie1263dffce06e9ea2433cc2d08d1537e4a891d40
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/879358
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This is used by the keyboard backlight driver. Add support so we can
start talking to this chip.
BUG=b:69379749
BRANCH=none
TEST=i2cscan shows a device at 0x6c on bus 4 now
Change-Id: I951ecd0fa3030f9f408ed0a4504b54950b7ca174
Signed-off-by: Benjamin Gordon <bmgordon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/879081
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
This function is no longer used because proto0 boards have been
deprecated. This function is called before I2C is initialized.
This function tries to read board info and causes watchdog to
trigger because timeout is set to zero.
BUG=none
BRANCH=none
TEST=boot Fizz. reboot by 'reboot ap-off'. Observe no watchdog reset.
Change-Id: I3bdebe4fb34dbef552fc89a170efa87d753078c0
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/879355
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Host command handler prints every single host command except when
commands are repeated back-to-back. This patch allows each board
decide which commands should be ignored. When debug printf is
suppressed, a global counter is incremented. Developers know there
were commands processed but not reported to the console.
BUG=chromium:803955
BRANCH=none
TEST=Observe 0x97 and 0x98 were not printed. Global suppress
counter is incremented.
Change-Id: I05e8cde9039f602e8fc06c20e89b328e797bd733
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/876952
Reviewed-by: Randall Spangler <rspangler@chromium.org>
After 3 tries, the touchpad is reset by power-cycling it.
BRANCH=none
BUG=b:71688150
TEST=Short SDA/SCL lines, press on touchpad, see that touchpad tasks
retries transaction, and then resets the touchpad power.
TEST=Do ESD discharge, and see that touchpad always recovers.
Change-Id: If0b5eb936d4d2feb3d34a7ec8748869a1b915c34
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/872131
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
