Previously manual_mode used the current values of voltage/current to
set the desired values for each charge_request() call. Since manual
mode is entered/exited in the host command task, this can easily lead
to a race condition where the charger gets disabled in the host
command task, the reenabled by the charger task. This in turn makes
the ectool chargecontrol idle command unreliable.
This CL replaces manual mode with two variables, manual_voltage and
manual_current. The default values are -1 which means that they are
inactive. When the ectool command 'chargecontrol idle' is executed, it
sets both variables to 0. This then removes the race condition
possibility as each iteration of the charger loop will use
manual_voltage and/or manual_current if not -1.
BRANCH=coral
BUG=b:68364154
TEST=Manual
Executed 'ectool chargecontrol idle' and 'ectool chargecontrol normal'
numerous times and verified that the charging was disabled/resumed
each time as expected. Without this fix the problem could be
reproduced always in less than 10 attempts, typcially less than
5. With this CL charging is disabled reliably each time and I'm not
able to reproduce the problem.
Change-Id: I1ed9cdb42249cdf72ab34dd95b8f42c09d9a490c
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/851419
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
(cherry picked from commit b7254f38979f274acc66330905399ff5ddf4129b)
Reviewed-on: https://chromium-review.googlesource.com/922069
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
When EC sees voltage drops below BAT_LOW_VOLTAGE_THRESH,
we kick off a timer and ask AP to throttle.
When the timer expires which means EC hasn't seen under-voltage
for BAT_UVP_TIMEOUT_US, we ask AP to stop throttling.
We reset the throttling status and do nothing when AP is off (S5).
BUG=b:73050145, chromium:838754
BRANCH=scarlet
TEST=manually test on scarlet, confirm EC sends
EC_HOST_EVENT_THROTTLE_START and EC_HOST_EVENT_THROTTLE_STOP
host events when entering/exiting UVP.
Change-Id: Ia760989f760f95549f7a8a8acb1d01de23feab5a
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1064983
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
When any of battery cells are near the Cell Under Voltage, battery
enters shutdown mode. However, battery cells can continue to discharge
due to self discharge. Battery cell vendor defines the minimum
acceptable cell voltage. If the cell voltage falls below that value,
battery BMS does not close the C-FET and the battery is considered
permanently dead.
So, every time battery enters shutdown mode, the BMS executes SUV
status check to see whether cells are in safe range to charge.
Gauge IC turns on C-fet after a 5 sec delay. During this delay, the
gauge requests 0mA charging current and 0V charging voltage.
During SUV check, battery gauge monitors the external voltage by the
charger through "battery present through" setting.
If the external voltage is less than the threshold, the BMS goes to
shutdown mode again and this repeats.
This patch enables CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD so that the
EC will supply voltage & current even if the battery requests 0V, 0A
at 0% soc, which only happens when the BMS is exiting shutdown mode.
Battery gauge IC: TI BQ40Z50
Battery gauge FW version: 1.06 for BYD/ 1.07 for LG and Simplo.
BUG=b:73921750
BRANCH=none
TEST=Check dead battery can be charged battery to normal mode.
Change-Id: Ib7e12a0596d53377c58eb17c980cd7e01576de7c
Signed-off-by: raymondchou <raymond_chou@compal.corp-partner.google.com>
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/910608
Commit-Ready: Raymond Chou <raymond_chou@compal.corp-partner.google.com>
sleepmask is really useful for debugging sleep issues. Add a read only
version of sleepmask to non-DBG images. It will only be accessible once
the console is unlocked.
BUG=none
BRANCH=cr50
TEST=make sure sleepmask can be modified in DBG images and can only be
read in prod images.
Change-Id: I31ef966f6302d4a7602a014cb08c9b972d13f41e
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1062804
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
When the EC is powered solely by the servo, we do not want to try to
start the AP. If we do, we will watchdog reset in a while loop waiting
for the 3300 and 5000 rails to come up (which won't come up if powering
only on the servo)
BRANCH=none
BUG=b:79606767
TEST=powering bip with servo only does not watchdog reset boot loop
Change-Id: I132312f7f08201dc58d797900df16502240ee98c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1062502
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
Enable trackpad when entering S3, and display backlight when entering S0
and disable them on the opposite transition. Moving common code to
baseboard.
BRANCH=none
BUG=b:79900266
TEST=bip trackpad works in S3 as wake source. backlight turns off in
S0ix and S3.
Change-Id: I0937771093d87c020b3c0d94a482d108c5a5c180
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1064693
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This will be used as part of the checks for when to allow CCD open.
Add check for firmware space dev mode bit, based on the similar code
which reads the FWMP. Print the state of both bits in 'ccd get'.
BUG=b:79983505
BRANCH=cr50
TEST=With dev mode off, 'ccd get' does not report TPM: dev_mode.
Turn on dev mode via the recovery screen, and it does.
Change-Id: I6af78bb104004323cd377ed996e1db94bc36fc62
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066391
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Observed VBOOT hash failure for EC_RW. Function
spi_flash_read with size > SPI_FLASH_MAX_READ_LEN
is incorrectly incrementing the offset. For example:
0, 0x100, 0x300, 0x600, all with read size = 256.
BUG=
BRANCH=any EC using SPI flash
TEST=Trigger VBOOT hash re-calculation using EC
console hash rw command. Second test program
SPI flash with known test pattern longer than
SPI_FLASH_MAX_READ_LEN and read using EC
console flashread.
Change-Id: I5fda47f132f64b12044b94663a19d889f1c2b32a
Reviewed-on: https://chromium-review.googlesource.com/1036258
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
With CONFIG_BATTERY_REVIVE_DISCONNECT once the battery FULL flag gets
set, charge_state_v2 will call battery_get_disconnect_state. That
function had console print that's only meaningful when the battery is
actually disconnected. To avoid flooding the EC console log under this
expected condition, this CL moves the console log so that it only
happens when the battery is present, but disconnected.
BRANCH=none
BUG=b:79133101
TEST=Verfied that with full battery the console log message is no
longer showing. Also verifed that can recover from battery cutoff
condition.
Change-Id: Id2e161cbd52c0ef07f28b94608f9615071327c97
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1064975
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
ecst has two open-coded implementations of a function to inject a string
into another string (that happens to be a path). Factor out and make
sure that gcc 8.1's static analysis of string lengths is happy.
BUG=b:65441143
BRANCH=none
TEST=builds with gcc 8.1
Change-Id: I80581d26b6f75cac2c9530c18f94d12614aa1586
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1061878
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
gcc 8.1 complains about duplicate const, and while some of these really
are duplicate, others look like they were supposed to tighten the API
contract so that variables are "const pointer to const data", but didn't
have that effect.
BUG=b:65441143
BRANCH=none
TEST=building Chrome EC as part of upstream coreboot's build with a
gcc 8.1 compiler now works (better. there are other issues left)
Change-Id: I6016c5f282516471746f08d5714ea07ebdd10331
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1039812
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
GCC 8.1's linker tries to rewrite the code to match the lowest common
denominator, reintroducing references to __aeabi_idivmod and friends
even on ARM revisions that don't need them.
Tell it what it's linking for to keep it harmless.
BUG=b:65441143
BRANCH=none
TEST=make buildall works with gcc 8.1
Change-Id: I7296aa80f587aa4f004fb20958714766793ab2b5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1061693
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
there are no pullup resistors on the TCPC ALERT# pins and none on the
board, so we need to turn on internal pullups on the EC side.
BUG=b:75070158
BRANCH=none
TEST=board still boots
Change-Id: I15a7940d8b647b83c6ae304171c4a7c46b920529
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1059870
Commit-Ready: caveh jalali <caveh@chromium.org>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Before:
*** 4560 bytes still available in flash ****
After:
*** 4696 bytes still available in flash ****
BRANCH=none
BUG=b:65253310
TEST=Update Cr50 with this image and verify the keys are the same.
Change-Id: I1c722ced185c41f732ce0ed5236db01401f21dfc
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1031058
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This patch makes led_get_brightness_range return amber=100, white=100
regardless of OEM ID or led_id. This function is for ectool led command,
which is used to test basic LED connectivity.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:78489297,b:77827579
BRANCH=none
TEST=Run
1. ectool led battery white=100
2. ectool led battery amber=100
3. ectool led power white=100
4. ectool led power amber=100
Change-Id: I6c6b3a5dd26aaba3a3ff7dccd6e116794c6594c9
Reviewed-on: https://chromium-review.googlesource.com/1062077
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Gemini Lake-based chipsets support a subset of virtual wires that other
Intel processors do. The current settings prevent the GLK APs from
bootign in some situations; PLTRST# doesn't get reasserted when there is
an error.
See "eSPI Compatibility Specification (562633)" for details.
BRANCH=None
BUG=b:79778835
TEST=Successfully booted bip after a cold reset from servo
Change-Id: I02b403ab6b06cbcae61ac46132018e95988a3d43
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1064704
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
They're only used within the same file and should always be inlined.
It also helps gcc 8.1's lto linking which seems to not inline it (since
inline is just a hint) but then drops the function (presumably because
it's small, marked inline, and comes with no prototype).
BUG=b:65441143
BRANCH=none
TEST=builds with gcc 8.1
Change-Id: I881a5b9f13192dd11748d8a3060788f95a84dec0
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1061075
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
This reverts commit cfcac78e62.
Reason for revert: Removing all s3 termination support. It's not
necessary and it causes scarlet to boot into recovery.
Original change's description:
> cr50: add support for enabling terminations on ap suspend
>
> rk3399 systems need terminations on the SPI signals in S3 and all other
> low power states. Add support for enabling the pulldowns and pullups on
> the correct pins.
>
> With this change, if BOARD_NEEDS_S3_TERM is set in the board properties,
> cr50 will enable a pulldown on the AP TX Cr50 RX signal and a pulldown
> on all of the SPS signals. To keep the pulldowns from interfering with
> the sps peripheral, s3_term will also disable the input for those
> signals.
>
> BUG=b:62200096
> BRANCH=cr50
> TEST=Flash onto bob. Make sure cr50 enables and disables terminations
> when the AP suspends/resumes. Flash onto reef. Make sure it doesn't do
> anything.
>
> Change-Id: I4adaf6d66160bab1eb3cf3d343d4a79524ccf883
> Signed-off-by: Mary Ruthven <mruthven@google.com>
> Reviewed-on: https://chromium-review.googlesource.com/991338
> Commit-Ready: Mary Ruthven <mruthven@chromium.org>
> Tested-by: Mary Ruthven <mruthven@chromium.org>
> Reviewed-by: Randall Spangler <rspangler@chromium.org>
Bug: b:62200096
Change-Id: I00c5051a48d4578badf9ce6622dea1af9903f4fd
Reviewed-on: https://chromium-review.googlesource.com/1062687
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This reverts commit c24d480d90.
Reason for revert: Removing all s3 termination support. It's not
necessary and it causes scarlet to boot into recovery.
Original change's description:
> cr50: disable s3_terms during init
>
> When cr50 resumes from deep sleep term_enabled is reset to 0, but not
> all of the s3 termination settings are reset. Some of them are, because
> some of the gpios are defined in gpio.inc and cr50 will handle setting
> those up during init, but others like the sps pulldowns aren't. At this
> point, the term_enabled setting does not actually match the state of
> enabled terminations.
>
> After deep sleep reset if the AP is on, ccd update state will try to
> disable the s3 terminations, but term_enabled is 0, so s3_term thinks
> they're already disabled and wont do anything even though some of the
> terminations are actually enabled.
>
> This change initializes all of the s3_term stuff to disable during hook
> init. This way things are reset so they won't interfere with sps_init.
> This will also make sure to align the system state with term_enabled,
> before the ccd hook starts getting called. It is safer to start with
> disabling the terminations, because it wont interfere with tpm
> communication if the AP is on. If the AP is off, ccd_update_state will
> re-enable the terminations around a second after init.
>
> BUG=b:62200096,b:79214702
> BRANCH=cr50
> TEST=firwmare_Cr50DeepSleepStress.reboot on bob
>
> Change-Id: I9a90c7f7703b1406b4c494db448a8ac84d040d1c
> Signed-off-by: Mary Ruthven <mruthven@google.com>
> Reviewed-on: https://chromium-review.googlesource.com/1043152
> Commit-Ready: Mary Ruthven <mruthven@chromium.org>
> Tested-by: Mary Ruthven <mruthven@chromium.org>
> Reviewed-by: Randall Spangler <rspangler@chromium.org>
> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Bug: b:62200096, b:79214702
Change-Id: If3467352030c65365c6851cd692aa5d0e9f47667
Reviewed-on: https://chromium-review.googlesource.com/1062686
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This commit fixes a bug where the base would not be powered after the
system was power cycled without disconnecting the base.
BUG=none
BRANCH=poppy
TEST=Flash nocturne; boot to S0, attach base, shutdown to S5. Boot to
S0, verify that base is powered.
Change-Id: Ia3de500afdc29cb601c1b5571cd3355711a3b368
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1062993
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Make Esc+Refresh+Power on Grunt enter Recovery Mode.
If Power is released fast:
[0.045303 KB init state: -- 02 08 -- -- -- -- -- -- -- -- -- --]
Add CONFIG_KEYBOARD_IGNORE_REFRESH_BOOT_KEY to handle this case.
If Power is held longer:
[0.045448 KB init state: 08 0a 08 08 08 -- 08 -- 08 08 -- 08 08]
Add CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI3 to handle this case.
BUG=b:79758966
BRANCH=none
TEST=Esc+Refresh+Power gives recovery screen on Grunt
Change-Id: I43a7d485535ff7b0d9bfce59f28c0049ee989818
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1063032
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
CPRINTS() macro is already adding the newline character, no need to
include it explicitly.
BRANCH=none
BUG=none
TEST=vefied that Coral EC does not print this newline any more
Change-Id: I1f6b1fcb90818a8d4a2d18cf5060669fc46d38a7
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1062588
Reviewed-by: Jett Rink <jettrink@chromium.org>
When we exit DBGR mode on the ITE after flashing, it wedges the
SDA line, which prevents us from using dut-control cold_reset.
We do not need to exit DBGR mode since we will perform a cold reset
after we finish flashing.
BRANCH=none
BUG=b:79592483
TEST=flash bip multiple times and EC resets after flashing automatically
Change-Id: Iafbad7a88a528ec7385596fd7c674b151f276166
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1060588
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
The decimal converted value for i2c read does not work.
It just happens to work every other time I have seen it.
BUG=none
BRANCH=none
TEST=bip i2cxfer r works
Change-Id: I7d868e3fc79eea081867634b679120f2da6f9363
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1060167
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Currently, field sizes are automatically set to the smallest size
which can fit a given value. This patch makes cbi-util allow field
sizes to be specified.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:79514391
BRANCH=none
TEST=Tested as follows:
1. Create CBI image:
$ cbi-util create --file cbi.bin --board_version 0x202 \
--oem_id 0xabcd:2 --sku_id 0xff:4 --size 256
2. Verify the image:
$ cbi-util show --file cbi.bin
CBI image: /home/dnojiri/tmp/nami/tmp/cbi.new.bin
TOTAL_SIZE: 22
Data Field: name: value (hex, tag, size)
BOARD_VERSION: 514 (0x202, 0, 2)
OEM_ID: 43981 (0xabcd, 1, 2)
SKU_ID: 255 (0xff, 2, 4)
3. Verify the output matches with the previous output if field sizes
are not specified.
Change-Id: Ic7149274d6e4a118ea12bbf03199b548b7089a3e
Reviewed-on: https://chromium-review.googlesource.com/1056201
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
For Bip P0, we are using some of the Sanyo batteries. Need to add
support in battery.c/board.h so this battery is recognized and
battery disconnect and cutoff functions are supported.
BRANCH=none
BUG=b:79734977
TEST=Verfied Sanyo battery is found at EC init time and that 'cuttof'
EC console command works.
Change-Id: I4b69296869e1eed6248800eb4b7b3c35a79bae4c
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1059935
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Adding this config so that battery_get_disconnect_state() is called
directly as a condition in prevent_power_on instead of having this be
a condition battery_is_present. This change allows precharge current
to be sent to the battery when the battery is dead or recovering from
battery cutoff condition.
BRANCH=none
BUG=b:79133101
TEST=tested on Yorp and verfied that in both dead battery and battery
cutoff cases, the battery wakes up as expected.
Change-Id: Iefec578dd241ddb832630ffa2530ba7c631f9a96
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1053096
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
The ITE TCPC driver does not current support drp_toggle and so can't
have these config options defined. The driver method for drp_toggle is
set to NULL which causes the EC to reboot when power button is pressed
as that calls drp_toggle in the chipset hook.
BRANCH=none
BUG=b:79637786
TEST=Verfied that with these config options not defined the EC no
longer reboots when power button is pressed.
Change-Id: I08e27bb2541bac4fac52411d9c01a366b8874379
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1059580
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This CL adds the port number to the error messages for the TI sn5330
PPC driver. It also adds 'ppc' so that its clear where the messages
are coming from.
BRANCH=none
BUG=b:79640678
TEST=Tested on Bip MLB and verfied that PPC EC console log errors
display the port number.
Change-Id: I7988e5e4008c005bb1ef9a78331d4a2597fdcb62
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1060105
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
When running signed with dev keys and the fallback certificate is not
available, proceed installing unverified root certificate. This at
least allows to keep basic TPM functions like storing objects in NVMEM
to keep going. Added a new return value to indicate this condition.
BRANCH=cr50, cr50-mp
BUG=none
TEST=verified that it is possible to switch chromebook between prod
and dev modes when running with a dev signed Cr50.
Change-Id: I5b16d0bcbcfb25368f65075e1d2d485a69cb729f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1054990
Reviewed-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
Add the FP_CAPTURE_RESET_TEST capture mode to be able to perform the
reset pixel values test.
Update ectool accordingly and also remove the deprecated 'fpcheckpixels'
command.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=poppy
BUG=b:78597564
TEST=run 'ectool --name=cros_fp fpmode capture test_reset',
then 'ectool --name=cros_fp fpframe > test.pnm'
CQ-DEPEND=CL:*626747
Change-Id: I183f33b1cb9ba4db67219b8f7740d29dc0551f2d
Reviewed-on: https://chromium-review.googlesource.com/1061074
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
