The kernel driver to control the 3G modem LDO is not submitted yet.
Let's hardcode it for now to enable RF testing and revert this patch
later.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:17790
TEST=on Spring, boot and dump the TPS65090 configuration from the EC
command line by using "pmu" command.
See 0x1f in the register 0x11 for FET3.
Change-Id: I29aa7d1d7fb819ff1881a756e9592e272e87ad0b
Reviewed-on: https://gerrit.chromium.org/gerrit/43181
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
This uses D+/D- voltage to distinguish different Apple chargers.
BUG=chrome-os-partner:14319
TEST=Manual on Spring
BRANCH=none
Change-Id: I50075d466f6e6b1adf613748cf433d7f43c04bfe
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/42850
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When battery is nearly full, we sometimes see:
- Battery asks for no current, but slowly discharge (5-7 mA)
- Battery asks for current, but not charging.
For these cases, we consider the battery full and show green LED.
BUG=chrome-os-partner:17561
TEST=Manual
BRANCH=none
Change-Id: I2808d4c1a89d37000244fb308197cdef473ec5be
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/42688
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:14319
TEST=Attach different chargers and see corresponding PWM duty cycle set.
BRANCH=none
Change-Id: I10c6e28ddf5a959849a6f14d9ca3894be4f16e30
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/42691
This implements a basic battery LED policy:
- Charged: green
- Charging: yellow
- Error: red
- No charger: off
BUG=chrome-os-partner:17561
TEST=Manual
BRANCH=none
Change-Id: I7fa8242efa4d0382d8ef0cafe80f01d44c390397
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/42607
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Activate the pass-through for TPSchrome LDOs settings
and remove hard-coded values used for bring-up.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:14314
TEST=on Spring, with an updated bootloader, see the screen is still
coming up.
Change-Id: I7fe67640e66939b1a19074b54d81d64459a34f4a
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/41296
Reviewed-by: Vic Yang <victoryang@chromium.org>
ADC pins should be configured as analog input pins. Also sets conversion
factor to obtain voltage values in mV.
BUG=chrome-os-partner:14319
TEST=Manual
BRANCH=none
Change-Id: I7e084052062c2b669f10da4309e99bf9e2954ded
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/40199
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds USB port control to charger task. For now, it only senses
attached device type and log it to console.
BUG=chrome-os-partner:14319
TEST=Attach/detach charger and see console output.
BRANCH=none
Change-Id: I1218d520c292d9d398c868122ae3876d3fc889bc
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/40078
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
We have yet another tweak for the lightbar, but we don't want to update the
EC. This CL adds an init script that runs on the AP at every boot and pokes
the EC to modify the lightbar settings. We have to run it at every boot
because the EC will hibernate after the AP has been off (not suspended) for
an hour on battery power and will lose its settings.
There's a corresponding CL for the ec-utils ebuild that installs the
userspace scripts into the rootfs.
BUG=chrome-os-partner:16827
BRANCH=link
TEST=manual
Build the image for Link, install, reboot.
Run "ectool lightbar params". The output should match what's in
/usr/share/ec/lightbar_params.txt
Change-Id: If50ac2ef2432f7d60cdaf4c222b68dbdee80b2ec
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39979
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Richard Barnette <jrbarnette@chromium.org>
The code to re-program the IR3570A core regulator on the fly is no
longer needed as the parts should be pre-programmed correctly and it is
slow.
This will break the EVT and older boards which have bad pre-programmed
settings.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=link
BUG=chrome-os-partner:15596
TEST=on Link, run the power_Resume test and observe the firmware resume
time has decreased.
Original-Change-Id: Id4f56a68d874879bf2f50047c21fbfabea16c850
Reviewed-on: https://gerrit.chromium.org/gerrit/36417
Reviewed-by: Puneet Kumar <puneetster@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 5c59877ee1878b8de380b662601592c817a8b0a8)
Change-Id: I40937c0379a1b94c24679ee5e3110c242849986a
Reviewed-on: https://gerrit.chromium.org/gerrit/39912
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Randall Spangler <rspangler@chromium.org>
To save power, we need the ability to switch ILIM pin back to GPIO when
we are not using PWM.
BUG=chrome-os-partner:14319
TEST=In console, test 'ilim on', 'ilim off', and 'ilim 50'.
BRANCH=none
Change-Id: Ib3e0400266ef94df25fca1c6e5f118eba37b3848
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39835
This adds init code to configure PWM and a console command to adjust
duty cycle.
Also rename ILIM_1500 to BOOST_EN.
BUG=chrome-os-partner:14319
TEST=Adjust PWM duty cycle and measure voltage.
BRANCH=none
Change-Id: I23856416da19ed523d46af39e6cbc3129ac25525
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39587
for now, just control the USB pins muxing.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:14318
TEST=on Spring, put the EC UART on the micro-B connector and read it
using a modified FTDI cable.
Change-Id: Ib0c87e483fb0bbe1835bd6ea008176b88d6f12f8
Reviewed-on: https://gerrit.chromium.org/gerrit/38361
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Hardware clock uses two timers, currently TIM3 and TIM4. This CL adds an
option to select between TIM2, TIM3, and TIM4, so that we can use any
one the three timer as a PWM source.
BUG=chrome-os-partner:14319, chrome-os-partner:7463
TEST=Build and run on snow/spring. Build success on daisy.
BRANCH=none
Change-Id: I1a00b3d491ee3e131708b573f6ea70e6b56c96dd
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39584
This works around a problem where disabling +5VALW glitches +3VALW_EC,
which may cause the EC to brown out or hang.
BUG=chrome-os-partner:16600
BRANCH=link
TEST=manual
1. When the system boots, look for this line as the first x86 power state:
[0.004977 x86 power state 0 = G3, in 0x0001]
2. Boot the system. Should boot normally.
3. Shut down the system using the power button.
4. After ~10 seconds, you should see that line of output again.
5. At the EC console: 'gpioget enable_5valw' should output:
1* ENABLE_5VALW
This should ideally be combined with a hardware fix to add 30+ ms of
delay to EC_EN_5V, since when the EC is reset via power+refresh that
tri-states EC_EN_5V, and it takes ~22ms for the EC to boot and start
driving EC_EN_5V again.
Change-Id: Iba4d961d064105faf988a35c2277e9d7406e39e2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39334
Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org>
This reduces memory / code size, and gets rid of ifdefs in temp_sensor.c.
BUG=chrome-os-partner:15714
BRANCH=none
TEST=boot system and run 'ectool temps all' every few seconds
- ectool temps all
The numbers should update over time.
Change-Id: Idaac7e6e4cbc1d6689f5d3b607c623a5cc536a4f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36940
Support the keyscan test functionality on stm32.
Note: This is enabled by default so that it continues to build. But it
is unlikely that we will want this in a shipping image. I suggest we add
the facility for a dev build.
Secondly, the stack has to be larger due to a printf (which admittedly I
could just remove). Should we make the stack size conditional on the
CONFIG? Seems a bit ugly, on the other hand we don't want to waste IRAM.
BUG=chrome-os-partner:12179
BRANCH=none
TEST=manual for now:
On snow:
./ectool keyscan 20000 key_sequence.txt
See that the test passes.
Change-Id: Ic441ca0bde1be9589a924374605e2f146d16f423
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/35118
Since it handles not just power button, but also lid switch, AC
detect, and other switches.
No functional changes; just renaming.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system, power on/off with power button
Change-Id: I51628a52293f7207715f5f6bf368a08fe6c3dbce
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36821
Adds a new HOOK_TICK event which is called every 250ms (LM4) or 500ms
(STM32). This will be used to consolidate a number of tasks which do
small amounts of work infrequently, and previously needed their own
task functions.
This CL adds the tick task; subsequent CLs will consolidate watchdog
and other tasks into tick hooks.
BUG=chrome-os-partner:15714
BRANCH=none
TEST=taskinfo shows TICK task as lowest priority
Change-Id: I9068ee99d56a5bf5c12afd86ad51998c013f4954
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36908
Reviewed-by: Simon Glass <sjg@chromium.org>
ADC config structs are now chip-specific; this saves code size
(several hundred bytes on LM4, since no need for 24-entry ADC channel
to GPIO mapping table).
BUG=chrome-os-partner:15579
BRANCH=none
TEST='adc' with system on and off; ChargerCurrent should be bigger when on.
Change-Id: Ia88b3f043438bec049f2d2ad39fc42dcf86d9424
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36798
Since POWERSTATE is confusing whether it refers to battery power or
system power.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=taskinfo; see CHARGER task
Change-Id: I5a237b1329cace4ce48ae39d8954c08a9912ed4b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36707
This fixes build breaks in 'make tests'.
BUG=none
BRANCH=none
TEST=make tests (note that this still fails due to other problems;
will fix those in a followup CL)
Change-Id: I5b5ce52ed6e44ade6051e0a091a6699c0454d61a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36353
Reviewed-by: Simon Glass <sjg@chromium.org>
Previously, all hook functions returned EC_SUCCESS, which was
meaningless because nothing ever looked at the return value. Changing
the return value to void saves ~100 bytes of code size and an equal
amount of source code size.
BUG=none
BRANCH=none
TEST=code still builds; link still boots
Change-Id: I2a636339894e5a804831244967a9c9d134df7d13
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36372
This works around a potential LM4 chip problem where edges on the FRMH
status bit don't always trigger interrupts. The workaround is to look
at FRMH for each channel in the interrupt handler rather than the
interrupt status, and to trigger the interrupt every 250ms to sweep up
any missed writes. We already do this for port 80 writes; this just
extends the workaround to all channels.
BUG=chrome-os-partner:13965
BRANCH=link
TEST=manual
- boot system
- EC console should show a number of HC lines for host command
- EC console should show a number of ACPI queries
- switch to root shell; keyboard should work
- ectool version should work
Change-Id: If02d685519c69ee88c055c8374a6c655a277e637
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/35871
Reviewed-by: Simon Glass <sjg@chromium.org>
For board bring-up.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:10912 chrome-os-partner:14324
TEST=on Spring, boot the AP, issue "pmu" command on the EC console
and FET1 and FET6 (registers 0xf and 0x14) contains 0x13.
Change-Id: Ic8fd681c2e2f3e2168de2cb7f83920d4feefd485
Reviewed-on: https://gerrit.chromium.org/gerrit/33703
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Needed for easy power on until we have the full USB charge state
machine.
note: the GPIO name ILIM_1500 is somewhat misleading,
it is connected to the enable pin of the TPS43060
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:14319
TEST=manual :
plug the board and press servo power button,
see the AP rails coming up.
Change-Id: I93421d1581065bcc1e7be07086e74d11d1e1ec56
Reviewed-on: https://gerrit.chromium.org/gerrit/35271
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
S0 values are incorrect and may even need to be calibrated on a
per-system basis. Set them to 0 by default so that the EC doesn't
return inaccurate remote temperature readings before calibration data
is sent.
BUG=chrome-os-partner:15174
BRANCH=link
TEST=manual
- temps -> remote temps are all not calibrated
- t6cal 1 s0 9301
- temps -> PCH D-Object temp now returns a temperature
Change-Id: I43facc60cf947ebd9441a8a629a76f7ffc8f3959
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/35302
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This removes the need for a separate method to check sensor power, and
gets rid of temp_sensor.c knowledge of what powers each sensor.
BUG=chrome-os-partner:15174
BRANCH=link
TEST=manual
- reboot
- within a second, type 'temps'; I2C sensors should return error 1
- type 'temps' again; all sensors should return data
- power off system
- type 'temps' again; I2C sensors and PECI should return error 8
- 'gpioset enable_vs 1'
- type 'temps' again; I2C sensors should return valid data; PECI should still
return error 8.
Change-Id: I17c353b3c483bc320769307c7715008ec729089b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/35287
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
1) Use floating-point more freely, since it's on all the time now, and
the old fixed-point code no longer compiled.
2) Sensitivity and Bn values are now in a RAM-based struct in
preparation for setting them at runtime. No changes from current
values.
3) If a sensor fails to read good data, is initialized, or loses
power, its die temperature history will be set to the next good
temperature, rather than persisting an arbitrary start value or old
state. This fixes reading wildly inaccurate object temperatures for
the first few seconds following boot/resume.
4) If a sensor loses power, wait for the sensor to report data-ready
before reading temperature/voltage. Otherwise, those read as 0, which
again throws off the first few seconds of data.
BUG=chrome-os-partner:14955
BRANCH=link
TEST=Boot system and set at login screen for a minute to reach thermal
equilibrium. Then reboot system, type 'temps' repeatedly. Data from
TMP006's should initially be Error; after a second or so it should be
good, and shouldn't change more than a few degrees.
Change-Id: Id0b42b9b18e94978ba7d3a1ee33194e44b1904bc
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/35188
With this CL, if CONFIG_FPU is defined (only for Link, ATM), the EC task
switcher will enable CONTROL.FPCA and expect all stack contexts to include
floating point state as well as normal state (an additional 18 words).
To support this, we need to increase the allocated stack space for each
task. The stack sizes are already chosen empirically, so I'm just rounding
them up a bit.
BUG=chrome-os-partner:14766
BRANCH=Link
TEST=manual
There should be no noticeable change. If you run the EC command "taskinfo"
you'll see the increased size each thread's stack, but everything that was
working before should continue to work just fine.
The additional overhead required to load and store another 18 words on each
context switch is not really measurable (I tried).
Change-Id: Ibaca7d7a2565285f049fda6906f32761e83207af
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/34391
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds basic ADC support for multiple channel conversion.
BUG=chrome-os-partner:14316
BRANCH=none
TEST=1. Boot on snow.
2. Use keyboard signal as input. Check read value changes as input
signal changes.
Change-Id: I3c15c37446fa9273d098f6d581573c11ced45b5e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/33883
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
I pushed the wrong version of my previous CL I6384024a,
a warning prevents the spring board from building successfully.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:14313
TEST=make BOARD=spring
BRANCH=none
Change-Id: If0b088daf7e3db7615fb778f3289d7fd7cf69f2a
Reviewed-on: https://gerrit.chromium.org/gerrit/33700
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
the PMU VACG signal used to detect AC state is connected to a GPIO, so
it's a board specific configuration.
On top of that, Daisy variants have custom logic on that line which is
not present on the next boards, so we need to update it before doing BSP
for next-gen boards.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:14313
TEST=make BOARD=snow && make BOARD=daisy
on snow EC console, type "pmu" command with AC plugge and unplugged, see
that the "ac gpio" line reflects the right value.
BRANCH=none
Change-Id: If1e19b89b2f2de45d8dddc8340931e56c5f7f0a5
Reviewed-on: https://gerrit.chromium.org/gerrit/33630
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
This calibration has been done with black tape covering the screw in front of
the sensor to reduce machine to machine variability.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9599
TEST=compare to thermocouple measurement on a couple of Link DVT
machines at various operating points.
BRANCH=link
Change-Id: I3664acd49eaae788823a4ca87173c108659ede8c
Reviewed-on: https://gerrit.chromium.org/gerrit/33527
Reviewed-by: Sameer Nanda <snanda@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
The old spi driver has atrophied in various ways. It doesn't support
the new protocol and does not build either.
Rewrite the driver to:
- Use dma for reception (rather than just reception)
- This makes message reception more robust and allows us to process
the new multi-byte commands
- Add timeouts for rx and tx so that we don't wait forever
- Increase buffer sizes to deal with new larger messages
- Always send a preamble byte regardless of SPI clock speed
(previously above 10MHz we sometimes miss this)
- Use the NSS line to delineate transactions. When it drops, a
transaction is starting. When it rises the transaction is immediately
terminates regardless of state. This keeps the AP and EC in sync even
in the event of timeouts, bus errors and other oddities.
- Implement the new protocol which has a checksum, version byte, etc
- Set up tx dma in advance and kick it when ready, thus ensuring that
a message body is always attached immediately after the preamble
- Use the new host_cmd_handle_args structure, which makes things much
easier for us, since we don't need globals, and can use the
send_response handler to know when a slow command is complete.
- Handle the new type of 'slow' commands properly
BUG=chrome-os-partner:10533
TEST=manual
build and boot to kernel on snow
Change-Id: I11767d1a6f045a86f6c9a0b4b1e943b660e4da33
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32076
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Haven't found a use for these, so remove to reduce code size (reduces
binary by 2KB) / complexity.
These are still test-compiled on BDS so they'll be ready if needed.
BUG=chrome-os-partner:11232
BRANCH=link
TEST=build and boot firmware. 'help' should not show eeread/eewrite commands
Change-Id: I0f2e41e21efcbbb0967a5b85b7c8a2ff8147460e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/33112
Reviewed-by: Simon Glass <sjg@chromium.org>
This removes sensors U10, U13, U15, and U29
BUG=chrome-os-partner:13274
BRANCH=link
TEST=temps command should show only USB, PCH, hinge, charger die/object temps
and PECI should still be the 10th temp sensor
Change-Id: If33266ad87ec06a8d4272009d80e382fa4003e2b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32822
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
This logic doesn't really belong in drivers, since to enable another
driver (like SPI) we must repeat it all. This is tricky if we enable
both I2C and SPI.
Move the logic into host_command.
BUG=chrome-os-partner:10533
BRANCH=none
TEST=manual
Use U-Boot to test comms status functionality on snow:
SMDK5250 # mkbp write rw 40000000
SMDK5250 # mkbp erase rw
SMDK5250 # mkbp erase rw
Change-Id: I3f90aada80208cd0540be14525f73f980ad33292
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32075
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Increase stack size slightly for vboot hash task since the vboot
SHA256 function allocates ~300 bytes of stack data. Reduce stack size
for watchdog, power LED, and a few other tasks with simple call trees
where we can be sure an error path isn't going to blow past the
reduced stack.
This frees up ~1KB of RAM on STM32.
BUG=chrome-os-partner:13814
BRANCH=all
TEST=boot system; shmem should show more unused RAM; taskinfo should show
tasks still have unused stack
Change-Id: I47d6b77564a0180d15d86667cc0566a8919b776e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32608
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This (re-)configures the I2C arbitration lines as floating inputs
when the AP powers off, and restores them strictly before the AP
powers on. This is intended to prevent leakage when the AP is off
and arbitration is not needed. This CL does not impact the AP
on/suspend case.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BRANCH=snow
BUG=chrome-os-partner:12573,chrome-os-partner:12381
TEST=manual (see notes below)
- PA4: SPI1_NSS / AP_CLAIM, input w/ pull-up when AP on
- PA6: SPI1_MISO / EC_CLAIM, output when AP is on
- Both floating when AP off
8 = input with pull up/down, 4 = floating input, 1 = output
AP off (before this CL):
> rw 0x40010800
read 0x40010800 = 0x41484144
> gpioget SPI1_NSS
0* SPI1_NSS
> gpioget SPI1_MISO
1 SPI1_MISO
AP off (after this CL):
> rw 0x40010800
read 0x40010800 = 0x44444144
> gpioget SPI1_NSS
0* SPI1_NSS
> gpioget SPI1_MISO
0* SPI1_MISO
AP on or suspended (before and after this CL):
> rw 0x40010800
read 0x40010800 = 0x81484144
> gpioget SPI1_NSS
1* SPI1_NSS
> gpioget SPI1_MISO
1* SPI1_MISO
Additional testing:
- "pmu 10000" and "cros_test i2c" in u-boot only showed the FET2
control changing (as expected).
- "pmu 10000" and "while [ 1 ] ;
do i2cdump -f -y -r 0-24 4 0x48 b ; done" and ran
"suspend_stress_test" for a couple dozen iterations. The
registers only changed as expected (FET1 and FET6 turned off
when suspending).
Change-Id: I72f5cb1883d01b1faad6c2db65dfa09d477e1885
Reviewed-on: https://gerrit.chromium.org/gerrit/32078
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
