According to PD spec:
- Data role shall not be reset on soft reset.
- Data role shall be reset to power-role default on hard reset.
Implement the above. Even if both ports follow spec, it's still possible
for a data role conflict to occur if, for example, data role swap occurs
(data role mismatches power role default) followed by a hardware reset
of one port (such that data role gets reset to power role default).
Handle such cases by taking error recovery actions.
BUG=b:71333840,chromium:805040
TEST=Connect scarlet to powered Apple accessory, verify scarlet comes up
in SNK-DFP after soft reset and issuing "reboot" on EC console. After
issuing a hard reset, the port comes up in SNK-UFP (which is the
power-role default).
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I65139f277d59a0612f8323d711080f52425ff5e7
Reviewed-on: https://chromium-review.googlesource.com/885462
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In order to re-initialize our PD state variables properly following a
reset, we need to save our current power role. This commit adds a bit
in the BBRAM PD flags for the power role.
BUG=b:71333840,chromium:805040
BRANCH=None
TEST=Add code to save data role and restore both roles, verify that both
are saved accordingly.
Change-Id: I156ae8179c8e12c63322132d1f0078990bd215f8
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/979264
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
pd_get/set_saved_active() made the assumption that there were only two
ports. But now, we have a board that turned that port count all the way
up to 3. This commit adds in that new port BBRAM index. It also turns
the byte where the port information was stored into a byte of flags,
where bit 0 indicates whether there was an explicit contract in place or
not.
BUG=b:72838807
BRANCH=None
TEST=With some code to check for explicit contract state for port 2,
verify it's functional.
Change-Id: I6f062f67bd3c47dd43ea7e24e844a9286fa37af9
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/905923
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
While troubleshooting why a generic $19.99 Multiport (USB, HDMI, Type-C)
Type-C dongle didn't work on Scarlet, I noticed that Vconn Req and Vbus
Req were both set to zero in the AMA VDO. For a better user experience,
default to Vbus ON if both Vconn and Vbus Req are both zero.
BUG=b:78286905
BRANCH=NONE
TEST=manual
Tested the generic dongle with USB-Keyboard, TypeC power adapter,
and HP monitor.
Change-Id: I170eef1372c3621334de2c457bd4533eea744cc0
Signed-off-by: Sam Hurst <shurst@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1019611
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Now that board version can come from CBI, we can have a real error
reading it. We should pass that error to the console or to the
AP on the host command and let the AP firmware (or user) decided how to
handle that error case
Also update the CONFIG_BOARD_VERSION to be derived instead of needed
in most cases.
BRANCH=none
BUG=b:77972120
TEST=Error reported on EC console and AP console when CBI is
invalid on yorp
Change-Id: Ib8d80f610ea226265a61e68b61965150cdc9bb04
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1015776
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Also updated the description of the cbi command in help
BRANCH=none
BUG=none
TEST=wrote directly to flash and verified the cbi command updated
Change-Id: I54b5d995a0f06b9566622a5079da11ce575fb309
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1008831
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
The ISO7816-4 standard for APDU format says the APDU header minimum size
is 4 bytes (CLA, INS, P1, P2). The Lc field is absent if the command has
no data.
Update the size check to accept short APDU (the actual APDU
len was already computed properly for this case).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=cr50
BUG=b:72788497
TEST=adhoc
Change-Id: Ic60fa51bd4746b04016c488a38fe3ae7585e9942
Reviewed-on: https://chromium-review.googlesource.com/1005345
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
charge_prevent_power_on() had sections which were gated on the following
CONFIG_* option:
CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT
However, the block of code that this gated didn't even take the battery
percentage into account and made it very confusing as to why.
This commit simply changes the CONFIG_* option used to gate to be the
following:
CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON
This better reflects the checks that were actually being made.
Additionally, this CONFIG_* option is defined by default for boards that
have a chipset task and is initialized to 15W, which is the power that
indicates that the charger is likely to speak USB PD.
BUG=b:76174140
BRANCH=None
TEST=make -j buildall
Change-Id: Ic9158dd7109ce6082c6d00157ff266842363b295
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/977431
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
the "cutoff" command would print "Invalid argument" which is
EC_invalid but the underlying funciton actually returned EC_RES_ERROR,
so we need to map the error codes from the EC_RES_* (enum ec_status)
number space to the EC_ERROR_* (enum ec_error_list) number space.
BUG=none
BRANCH=none
TEST=cutoff command now prints "Unknown error" instead of "Unimplemented".
Change-Id: I0b2928e629cc859bc3ba5587bf6c7fd70e1084d7
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/999102
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
When using VBUS_DETECT_TCPC the charger code relied on the TCPC
alert to initialize the VBUS supply, but that happens too late in
board startup sequence to allow an initally plugged in USB-C power
supply to be chosen as the active charging port.
We can and should initialize the the supplier sooner as to prevent
the charge_manager_is_seeded() check from failing thus preventing
the board from choosing a charging port.
BRANCH=none
BUG=b:77458917
TEST=PS8751 on yorp will negotiate 20V over USB-C (which was prevent
by the charge_manager not being seeded)
Change-Id: I6f612c508932a90ece0036ce8310a20de02d8467
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/994707
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
It is important for the OS to be able to find out the state of CCD and
current capabilities settings of the device.
This patch defines a structure to use to report information about CCD
state from Cr50 to the host and adds a CCD vendor subcommand to allow
to retrieve the information from Cr50.
Some structure and variable definitions had to be moved into the .h
file to make it possible to share them between Cr50 and gsctool.
BRANCH=cr50, cr50-mp
BUG=b:72718383
TEST=with the following patch applied verified that CCD info is
properly reported. Also verified that other CCD subcommands still
work as advertised.
Change-Id: I4a783e6817ed364b9e64522ebbe968d4a657a84c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/999825
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Since the last update of the 'fpcapture' debug console command, the
requested capture mode was ignored.
Fix the 2 identically-named variables stepping on each other
(dear compiler, why are you so distracted too ?)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=poppy
BUG=b:72360575
TEST=on ZerbleBarn, run 'fpcapture 0' and 'fpcapture 1'
Change-Id: I1fefd24b988f0db8bcbb90cc3370135d01cbddee
Reviewed-on: https://chromium-review.googlesource.com/999600
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
Swapping binary blobs in the image post compilation/linking is not
working quite as expected, because some of the const data values seem
to be inlined by the compiler, the values are not looked up at run
time.
This happens to the RMA public key ID field, which is just one byte in
size. Marking the field 'volatile' seems to be fixing the issue.
BRANCH=cr50, cr50-mp
BUG=b:73296144
TEST=with the rest of the patches applied public key substitution
between test and prod works as expected.
Change-Id: I12d5d1243e7988ab59bf3bba8cdfa46f27116bd2
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/996513
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
This patch allows chips which run code in RAM to erase or write
regions even if they're active.
BUG=b:77306460
BRANCH=none
TEST=flashrom -p ec -w /tmp/ec.bin on Fizz
Change-Id: Ib536b250dde78283513acb942507c67da0a6f622
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/997022
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch adds execution-in-ram, opposite of XIP: execution-in-place
(a.k.a. XIP) to the EC features. It can be currently implied by
CONFIG_EXTERNAL_STORAGE.
BUG=b:77306460
BRANCH=none
TEST=Verify ectool prints EXEC_IN_RAM on Fizz.
Change-Id: I4a7fb3b267864debe59fd211956371eceac57613
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/995968
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch clarifies the logic which determines whether we perform EFS
or not and print different messages for each case.
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I5588018a3594be2bcad84a2f74f805b76a195f85
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/996398
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Use RMA public key definition generated based on the binary blob
containing the key and key ID.
Key generation is controlled by the make file in common/, but actual
key blob comes from the board directory.
The structure holding the key and key ID is being modified to allow
initialization using a flat array.
No more need in defining CONFIG_RMA_AUTH_SERVER_PUBLIC_KEY and
CONFIG_RMA_AUTH_SERVER_KEY_ID.
BRANCH=cr50, cr50-mp
BUG=b:73296144, b:74100307
TEST='make buildall' still succeeds.
test RMA server generated authentication codes are accepted when
unlocking RMA.
Change-Id: I8ade94de6eb69b3e49bc5b948dbac20e59962acf
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/990783
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Majority of the chipsets do not have a dedicated GPIO to trigger
AP cold reset. Current code either ignores cold reset or does a warm
reset instead or have a work around to put AP in S5 and then bring
back to S0. In order to avoid the confusion, removed the cold reset
logic and only apreset is used hence forth.
BUG=b:72426192
BRANCH=none
TEST=make buildall -j
Manually tested on GLKRVP, apreset EC command can reset AP.
Change-Id: Ie32d34f2f327ff1b61b32a4d874250dce024cf35
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/991052
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
__builtin_ffs takes an int as argument, and, therefore, does not
find bits >= 32. Fix this up when CONFIG_HOST_EVENT64.
BUG=b:69329196
BRANCH=fizz,poppy
TEST=Patch coreboot to add bit 33 in SCI mask, add EC code to send
such events, EC does not watchdog anymore
Change-Id: If868095f19fe1940b4f5924cf669a719f9535991
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/989514
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
We want to be able to replace RMA public key and its key ID in the elf
module before signing. Let's make sure they are packed together for
ease of find and replace operation.
BRANCH=cr50, cr50-mp
BUG=b:73296144
TEST=built an image, verified that RMA unlock still works.
Change-Id: I1a8e155391421f32b7422f11ab2a5f53d1ddd0ac
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/990781
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When reporting state, current code was only using the lid battery
level to determine if we are "near full" (different LED color).
Fix this to include both lid and base batteries in the logic.
BRANCH=none
BUG=b:75982704
TEST=Lid at 100%, base at 50%, LED is amber when charging.
Disconnect base => LED turns white (lid is near full)
Change-Id: I6fd44a16832cbd6d440f1bbb8c696e41c3f4699b
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/983202
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tell the base to hibernate when we are in S5, and no AC is connected.
Also, wake the base when AC status changes (S5), and when the system
transistions out of S5.
BRANCH=none
BUG=b:71874971
TEST=1. Lid EC console: apshutdown => Check that Base EC hibernates
2.a. Lid EC console: powerb; => Check that base reconnects
2.b. Connect/disconnect adapter: check that base disconnects
and reconnects
Change-Id: I5e9a4afc64a07ad92f37d171a78a914d26f07c8e
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/958814
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Allows the lid to hibernate the base.
BRANCH=none
BUG=b:71874971
TEST=With following change, lid hibernates the base when in S5,
and no AC is connected.
Change-Id: I8c8017d638442ba8b17c8117d0b1b31f3538925f
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/981914
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Currently, charge state changes (i.e. enum charge_state_v2) are not
announced. Because of this, a charge LED is controlled by HOOK_TICK
(and polling charge status by charge_get_state).
Instead of checking charge status every 200 msec (or 500 msec), we
should change a charge LED only when charge status changes.
This patch makes HOOK_BATTERY_SOC_CHANGE get notified when charge
state transitions.
BUG=chromium:824942
BRANCH=none
TEST=On Nami, try AC plug/unplug, battery connect/disconnect.
Change-Id: I47a9542035666636d55f414e857d55ec36d69638
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/981397
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
chgdualdebug allows to force the dual-battery charging algorithm
to take certain decisions.
On AC, `chgdualdebug c <current>` allocates up to `<current>` to
the base, capped at the total current available from the adapter
(`chgdualdebug c auto` re-enables the algorithm).
When no AC is connected, `chgdualdebug d <current>` set the
current to transfer from lid to base (negative to transfer from
base to lid).
BRANCH=none
BUG=b:71881017
TEST=Try the commands above, see that they do what they advertise.
Change-Id: I98ee60eadd8f9202c1d489d9fca63267c32e8178
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/958811
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The NX20P3483 is a USB PD and Type C high voltage sink/source combo
switch. This CL adds support for this PPC variant. Unlike the TI
SN5S330, the NX20P3483 does not support VCONN and does not need to be
informed of CC polarity by the TCPM. To account for these differences,
2 new PPC config options are added and the driver for the TI SN5S330
was modified to include these new options.
The SNK/SRC switch mode for the NX20P3483 is controlled by 2 GPIO
signals which may be connected the EC or directly to the TCPC. To
handle both cases, the ppc_chips structure was modified with a flags,
snk_gpio, and src_gpio elements.
BUG=b:74206647
BRANCH=none
TEST=make -j buildall and verified there are no build errors.
Change-Id: Ic4415ab7571b80e7661ea673434eaf4cf1f1fd2d
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/966926
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This change adds a new config option CONFIG_I2C_XFER_CALLBACK that
makes i2c_xfer callback into board-provided functions before the start
and after the end of every I2C transaction. This can be used by boards
to implement any I2C device-specific quirks e.g. requiring minimum
bus-free time between every I2C transaction when the slave device
cannot actually do clock stretching.
BUG=b:73147310
BRANCH=None
TEST=make -j buildall
Change-Id: I452de4f22a81ffd97ca4944e1b940a3537637df9
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/956934
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add the state machine and the interfacing to the enrollment and matching
algorithm providing by the private driver part.
Implement the host commands interface for it (based on MKBP event) along
with the console debug commands to exercise it.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:72360575
TEST=On ZerbleBarn console, use 'fpenroll' then 'fpmatch' for several
fingers.
TEST=With ZerbleBarn and a servo-v2, retrieve and upload templates with
'ectool_servo fptemplate'.
TEST=On Meowth, exercise with the prototype of biod
CrosFpBiometricsManager.
CQ-DEPEND=CL:*555078
Change-Id: I10b0d76d3faa898a682cf9a2eb7fc7e212b0c20c
Reviewed-on: https://chromium-review.googlesource.com/886401
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
These print-outs are usually very deep in the call stack (rare
error cases that do not happen often), and therefore are the
longest branches on most tasks. Replacing cprints by
cputs/cprintf helps with that.
BRANCH=none
BUG=b:75234824
TEST=make BOARD=soraka SECTION=RW analyzestack | grep Task shrinks
significantly (more than 100 bytes on some tasks)
Change-Id: I7c5bb750f4aa624cd06736e0bb6b24d307fc0196
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/966041
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
A few commands had help text of "[0 | 1]" but parse_bool()
doesn't recognize 0 and 1. Change help text to "[on | off]",
matching other commands.
BUG=b:75302458
BRANCH=none
TEST=none
Change-Id: I9b1e4a70e024d17ec8bccc015069e31d7fff08ca
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/967248
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch removes flash WP check in the EFS main. It means even
if the SPI flash is not write protected, it performs EFS.
This allows dogfood devices to boot just like normal devices.
BUG=b:74983574
BRANCH=none
TEST=Boot Fizz. Verify EFS works as expected.
HW_WP=0, SW_WP=0: No EFS
HW_WP=0, SW_WP=1: No EFS
HW_WP=1, SW_WP=0: EFS is performed (Dogfood devices)
HW_WP=1, SW_WP=1: EFS is performed (Normal devices)
Change-Id: I33b39463d6bd16fe0fc398cd49f3c92c76fa5103
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/964740
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Configure the large arrays for the image frame and template in other
SRAM memory regions to free up space for the malloc heap in the 'main'
SRAM.
Note: the template buffer is only used in future CLs.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:72360575
TEST=on ZerbleBarn, run the 'shmem' console and see 500kB of heap
available for malloc.
Change-Id: I31a1b4fb0d5e124e3229d29386cc6500e402dac0
Reviewed-on: https://chromium-review.googlesource.com/946370
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
set_resolution is only used for few sensors and is not exposed to the AP.
Remove definition when sensors have a fixed resolution.
BUG=none
BRANCH=master
TEST=compile, kevin has enough space for perform_calib.
Change-Id: I8482387e135356467edaee44da3a0e47cf1db524
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/961222
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Instead getting the time for each sample in the task code, we should be
getting it as soon as the sensor reported it added it to its fifo (so
sensor just finished integration).
Because of that each sensor should provide the time when it provides a
sample, ideally from an accurate spot like an interrupt.
Deprecate motion_sense_fifo_add_unit (without a timestamp) in favour of
motion_sense_fifo_add_data (which adds the timestamps). Update all
relevant sensors to use the new api.
Note: for now I focused on the BMI160, where I actually made it get the
time in the interrupt. The other sensors were made to use the new api,
but still don't record the time in the right place (though it's not any
worse than before).
BUG=b:67743747
TEST=In the kernel, fifo_info->info.timestamp still has sane values.
TEST=CTS should still pass
BRANCH=master
Change-Id: I9829343f8702e00cc19f9c88134fa1f258c9e1e9
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/807331
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
For PWRBTN_STATE_INIT_ON, before attempting to power the
system on, we need to wait for charger and battery to be
ready to supply sufficient power. Check every 100
milliseconds, and give up after 1 second. This allows
time for charger, battery and USB-C PD initialization.
Previously, init-on would fail because it called
set_pwrbtn_to_pch too soon (before charge current had
been initialized, and before the USB-C 3A current was
detected).
BUG=b:72645441,b:74017044
BRANCH=none
TEST=cold reset Grunt with ac/battery connected/disconnected
Change-Id: I0413e7f2d7b19a99c994b51b22f28a2f993137de
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/900049
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
yorp measures each port's vbus separately on a deticated ADC.
Also, add config to take care of ADV_VBUS -1 case too.
BRANCH=none
BUG=b:74127309
TEST=none
Change-Id: I6f4df96caffc3b527b69e67358631dd448172cde
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/956555
Reviewed-by: Edward Hill <ecgh@chromium.org>
To prevent invalid timestamping, call load_fifo only when we get a FIFO
interrupt.
In consequence, remove load_fifo entry point and only process fifo
inside the IRQ.
Add helper function to know when we are in forced mode (the EC needs to
periodically read sensor data or interrupt driven).
BUG=b:73557414
BRANCH=master
TEST=compile
Change-Id: I959e476f3f7215be95424c07223f7421e8b13da1
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/938146
Commit-Ready: Alexandru M Stan <amstan@chromium.org>
Tested-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
The exact behaviour still needs to be optimized based on actual
power consumption (for example, it might be worth providing power
to base without charging it, or charge it a bit more, then let
it slowly discharge).
BRANCH=none
BUG=b:71881017
BUG=b:74414928
TEST=Low base battery, check that lid provides power to it in S0 or
suspend.
TEST=Check that lid stops providing power in S5.
Change-Id: Idf198ab1b4358827f9db6c0898234b6e2be45808
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/956982
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When the base battery is low, we need to provide it with some power,
to make sure the battery does not fully deplete.
Instead of relying on a separate configuration value, we simply
reuse min_base_system_power. Also, we fix a bug that incorrectly
used a power value as current.
BRANCH=none
BUG=b:71881017
BUG=b:74414928
TEST=With a critically low wand (3%), lux is able to provide
enough power to charge wand battery a little (44mA), even
when backlight is fully on, and touchpad is in use.
Change-Id: I3174ac273712eeb83ce1283dda3d786ad503e6f3
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/956661
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
At present issuing several 'waitms 1000' commands immediately after each
other trips the watchdog. Add a watchdog reload to avoid this.
Also document the behaviour in the command help.
BUG=b:72542719
BRANCH=none
TEST=manually on grunt, pasting these three lines in:
waitms 1000
waitms 1000
waitms 1000
and see that it does not reset now.
Change-Id: I453708299e4e26c1bbdb5fc406f26e916e7389af
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/955927
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
This patch splits struct fan_t into two parts: base configuration
and RPM configuration. RPMs are expected to be different from
model to model while a base configuration is most likely shared.
BUG=b:73720175
BRANCH=none
TEST=make buildall
Change-Id: Iff17573f110e07e88d097dd848cf91ee98b83176
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/949382
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:73528930
BUG=b:73660652
TEST=Flash lux, check that lux adc VBUS voltage when only no
charger is connected is around 12V.
Change-Id: Iccc245c96ca3c83674446f96f78f1ce15ffa7de2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/948322
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When checking the RMA authentication code the code currently just
verifies the value, but does not act on it.
This patch directs the user input through the same vendor command path
which is used when the RMA operation is controlled using gsctool.
BRANCH=cr50, cr50-mp
BUG=b:74080723
TEST=verified that issuing 'rma_auth <code>' on the Cr50 console now
trigger CCD open and reboot.
Change-Id: Ib3fab131b6a24b65618f0b1f2504638f8df11a4b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/945311
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Set GscFullConsole to Always in RMA open. We need this to be accessible
after rma open, so that we can use RMA open as a ccd open testlab
replacement.
Commands like rddkeepalive and bitbang are needed for testlab use, so
they should be accessible after open.
BUG=b:74019846
BRANCH=cr50, cr50-mp
TEST=build, do rma open, verify commands are not locked out, and do rma
disable
Change-Id: Iaeb89cea94d478dc0eb25c92bb09d488d14cad41
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/942309
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Also define the EC_FEATURE_RWSIG feature bit if the RO firmware contains
the RWSIG task but not the RW.
Given the RWSIG verification task is not terribly useful in RW
(where it is never executed), it can be skipped there but the host
program trying to detect RWSIG usage (e.g. flashrom) still wants to be
able to detect it.
In order to be able to do so, add the HAS_TASK_xXx_RO and
HAS_TASK_xXx_RW flags which define the tasks defined in the other
partition (at compilation-time you might still run a frankeinstein combo).
Fix ectool 'inventory' to avoid segfaulting on missing feature string
definition.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:36125319
TEST=on ZerbleBarn, run 'ectool inventory', also uses flashrom to
re-flash the RW partition.
Change-Id: I224a6cc4aef956204792a2cc04ad12aaed5abf47
Reviewed-on: https://chromium-review.googlesource.com/937262
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
