Commit Graph

1588 Commits

Author SHA1 Message Date
Ben Lok
f0b33ea803 oak: Add LED control for rev3
Oak rev3 has 2 dual-color LEDs to indicate the AP power & battery
status. The behavior has been redefined and distinguish from rev2
by board version API.

BRANCH=none
BUG=none
TEST=manual
1. define CONFIG_BOARD_OAK_REV_2 in board.h
   make -j BOARD=oak
2. define CONFIG_BOARD_OAK_REV_3 in board.h
   make -j BOARD=oak
both cases should be built successfully.
And Check the PWR & BAT LED.

Change-Id: Ic60d6f91002c3534e4c12a27e5c89bc2d0a1ecfd
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/290061
Reviewed-by: Rong Chang <rongchang@chromium.org>
2015-08-05 13:32:56 +00:00
Alec Berg
e8720732b5 usb_charger: configure boards to disconnect USB when UFP.
Configure boards whose chipset cannot be a USB UFP to disconnect
USB lanes when the data role is UFP.

BUG=none
BRANCH=strago
TEST=make -j buildall. tested on glados by adding ccprintf to
usb_charger_set_switches(). verified when we are DFP, USB 2
switches are connected and when we are UFP, they are disconnected.

Change-Id: Ic8c817a0cc21b56ee67239e8cc81d5cbbda8d4de
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290422
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-08-04 20:50:20 +00:00
Alec Berg
d804e8fdbd usb_charger: cleanup: move setting usb 2 switches to usb_charger
Move function to set D+/D- switches from board directory to
usb_charger module.

BUG=none
BRANCH=strago
TEST=make -j buildall

Change-Id: I5c5997c799cecea90448444863167af860a8f3e1
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290421
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-08-04 19:22:07 +00:00
Ben Lok
ccc085dd9a oak: updates GPIO setting for rev3
Modify the GPIO seeting according to the Oak rev3 schematic.

BRANCH=none
BUG=none
TEST=manual
1. define CONFIG_BOARD_OAK_REV_2 in board.h
   make -j BOARD=oak
2. define CONFIG_BOARD_OAK_REV_3 in board.h
   make -j BOARD=oak
both cases should be built successfully.

Change-Id: I0336624a5a2d356a4c2eb9ffb812ebffb4f5f7c3
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/289475
Reviewed-by: Rong Chang <rongchang@chromium.org>
2015-08-04 19:22:01 +00:00
Dino Li
b61de792ef it8380dev: modify sspi module
We need to modify SSPI module to fix compile fail
due to SPI flash common code changed.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=console "spi_flashinfo" OK

Change-Id: I83bb645eff1e5874d849056df518eea92340c39e
Reviewed-on: https://chromium-review.googlesource.com/290089
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
2015-08-04 19:21:52 +00:00
Shawn Nematbakhsh
5dde472951 glados: Add bd99992gw temperature sensors
BUG=chrome-os-partner:42156
TEST=Manual on Glados. Boot to S0, run "temps". Verify that temperatures
start around 28C and begin to increase after system is powered-on for a long
duration.
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I3bebba4864c8e5b5b23e78947522e58311298bbd
Reviewed-on: https://chromium-review.googlesource.com/289936
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-08-03 21:16:02 +00:00
Ben Lok
252d2364f4 oak: Request different DP pin modes including multi-function.
Refer to commit 63786f24, apply same change to Oak.

BRANCH=none
BUG=none
TEST=manual,
1. hoho + oak, pin mode = 'C'
2. dingdong + oak, pin mode = 'E'.
3. apple type-C HDMI multiport + oak, pin mode = 'D' and USB device
   enumerates as SuperSpeed.

Change-Id: I14c6e7ffbe62a329be43f4157ca065db9142b44e
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/290014
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-08-03 05:26:50 +00:00
Alec Berg
37b65d5c8c pd: don't enable try.src when battery is not present or too low
Don't enable try.src when battery is not present or <1% because
try.src will temporarily cut off power to system.

BUG=chrome-os-partner:43413
BRANCH=samus
TEST=tested on samus using "battfake" ec command. when battery
<1%, verified that try.src is disabled and when battery >=1% and
the AP is on (dual-role toggling is on), then try.src is enabled.
verified boot without battery succeeds on samus and glados.

Change-Id: I64816bb7c9669bfeca61687bcd9a48da32e67945
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289854
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-08-02 08:17:09 +00:00
Aseda Aboagye
d74949e3e6 tasks: Remove most task_start_called() calls.
Now that HOOK_INIT hooks are called from a task switching context, most
calls to task_start_called() should no longer be needed. This commit
removes them.

BRANCH=None
BUG=chrome-os-partner:27226
TEST=make -j buildall tests
TEST=Flash EC image onto samus and verify EC boot, AP boot, keyboard,
lid, and tap-for-battery all functional.
TEST=Flash EC image onto samus_pd and verify charging still works.
TEST=Flash EC image onto ryu(P3) and verify that EC boot.
TEST=Added ASSERT(task_start_called()) to the places where I removed
task_start_called().  Booted samus, samus_pd, cyan, and ryu with AC
inserted and verified that no ASSERT's were hit upon boot.

Change-Id: Ic12c61862e85ca3a0a295beedbb4eeee6d5e515b
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/285635
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
2015-08-01 02:52:37 +00:00
Shawn Nematbakhsh
0085573ff4 skylake: Inhibit AP power-on until charge current limit is set
Inhibit AP power-on through the BATLOW pin, even if the system is
unprotected, until our charger and current limit are initialized.
Note that this feature is only functional on glados v2 since other
skylake boards do not have BATLOW connected.

BUG=chrome-os-partner:41258
TEST=Manual on glados v1 with rework. Remove battery and attach Zinger.
Verify EC powers on and AP doesn't boot. Run `powerbtn`, verify that AP
boots. Remove all power and attach battery, verify that EC powers on
and AP boots. Also verify compilation on glados v2.
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I55de857f7006777640f7853b7bde98ba97e8bd13
Reviewed-on: https://chromium-review.googlesource.com/287378
2015-08-01 02:52:18 +00:00
Shawn Nematbakhsh
d3cd34d8c5 glados: Free up program memory space
Remove the timerinfo console command and console help to free program
memory space.

BUG=None
TEST=Build-only
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6685bb7c83030c21bd975b64f217553d5a11c16b
Reviewed-on: https://chromium-review.googlesource.com/289922
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-08-01 02:51:58 +00:00
Shawn Nematbakhsh
c4a67803b3 mec1322: Fix dedicated SPI port access
Correct spi_rx_option table, and use correct port for kunimitsu.

BUG=chrome-os-partner:42304
TEST=Burn + boot glados
BRANCH=None

Change-Id: Ic52ecb48102a74d3c17ab06b6da24ee40659ef86
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289868
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
2015-08-01 02:51:44 +00:00
Duncan Laurie
63880317ed glados: Buffer AC status to the PCH
The AC presence input from the charger only goes to the EC and it
needs to provide this signal to the PCH.  At init time it is set to
the current value and whenever the status changes it will be updated.

This is used by PCH internal logic to determine whether to transition
into Deep S3/S5 as those are not intended to be used when running on
AC power.

This is similar to how it worked on Samus except since the EC is off
in G3 we don't need to force it low in that state and since there
are not yet any additional hacks/workarounds here we can just do the
work in a simple HOOK_AC_CHANGE handler.

BUG=chrome-os-partner:41885
BRANCH=none
TEST=boot on glados and verify PCH_ACOK is asserted when the device
starts to charge and is deasserted when no cable is connected.

Change-Id: Id7e6ca674e35c98594d09b86ab5bdf518f8b3984
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288922
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-08-01 02:51:33 +00:00
Vincent Palatin
b7d3f4e284 ryu: remove SH UART debug and leftovers
Remove the last pieces of external Sensor Hub support:
- Sensor hub UART exported over case closed debugging
- Sensor hub related GPIOs

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=smaug
BUG=chrome-os-partner:38333
TEST=plug Suzy-Q to Smaug and test debug UARTs and SPI flashing

Change-Id: I47b42f63647735bae37b9256e2704303c48b5854
Reviewed-on: https://chromium-review.googlesource.com/290115
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2015-08-01 02:51:24 +00:00
Gwendal Grignou
ddc7145e08 ryu: dynamic switch between SPI and I2C sensors configuration
boards version 6 / 7 / 8 have an I2C bus to sensors.
board version 0+ has a SPI bus to sensors

On board v0, enable 3rd SPI port and use it to accel the accelerometer.

BRANCH=smaug
BUG=chrome-os-partner:42304
TEST=Check accel on SPI enabled Ryu board,
on v7 and v0 boards, check closed case debugging and type-C features

Change-Id: Ic8de2bb0f9d8a15f86a2c1ea98ef27613f090b22
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289960
2015-08-01 02:51:14 +00:00
Gwendal Grignou
5abd6087d4 board: ryu: Enable SPI access to Accel
Enable 3rd SPI port and use it to accel the accelerometer.

BRANCH=smaug
BUG=chrome-os-partner:42304
TEST=Check accel on SPI enabled Ryu board.

Change-Id: If17eff36e2a3ea0fe59d6677aa41ba5f802e33b6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288516
2015-08-01 02:51:04 +00:00
Gwendal Grignou
fb131573bd ryu: Increase CHIPSET stack size
We are very close from the current limit (456 bytes).
Increase the limit to 640 bytes.

BRANCH=smaug
TEST=Hit the limit while debugging, check the new limit.
BUG=none

Change-Id: I6673000bcac48b88599082eb797f0782c4fee454
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289837
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-08-01 02:50:46 +00:00
Rong Chang
d3692bec9f oak: fix default input current limit
Oak takes power from type-C charger. The default input current limit
should set to 512mA default, not the maximum current for battery
charging.

BRANCH=none
BUG=none
TEST=manual
  load on oak and plug an empty battery. check EC uart console on PD
  state change when plug type-C charger.

Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I113fea5ff1e8afc053f76c21820f202e4b3edfec
Reviewed-on: https://chromium-review.googlesource.com/287610
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
2015-07-31 00:30:04 +00:00
Gwendal Grignou
ff550b0e1a stm32: Enable 3rd SPI interface
Remove assumption of only one SPI master going to the SPI flash.
SPI3 can be used as second SPI master.
Define a new module type, SPI_FLASH, that can be turned
on/off when flash is not in used without impacting other
SPI masters.

BRANCH=smaug
BUG=chrome-os-partner:42304
TEST=Test on Ryu board.

Change-Id: Ie72471cea6f0a357ffee055a610d032580a794e7
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288514
2015-07-30 19:58:09 +00:00
Gwendal Grignou
a3a5c90b54 accel: mechanical changes from i2c_addr to addr
Encode both the I2C address and SPI GPIO CS in addr field.
Mechanical change to rename i2c_addr into addr.

BRANCH=smaug
TEST=compile
BUG=chrome-os-partner:42304

Change-Id: I1c7435398deacb27211445afa27a08716d224c06
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288513
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: David James <davidjames@chromium.org>
2015-07-30 19:58:01 +00:00
Gwendal Grignou
5b71b33aba common: change interface to SPI flash
Allow more than one SPI master.
Add CONFIG variables to address the system SPI flash.

To have SPI master ports, spi_ports array must be defined.

BRANCH=smaug
TEST=compile
BUG=chrome-os-partner:42304

Change-Id: Id43869f648965c1582b7be1c7fb3a38f175fda95
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288512
Commit-Queue: David James <davidjames@chromium.org>
2015-07-30 19:57:55 +00:00
Alec Berg
511766b638 glados: implement and enable fast charging profiles
Implement and enable custom charging profiles on glados to
allow us to charge faster.

BUG=chrome-os-partner:42864
BRANCH=none
TEST=load on glados and charge at room temp. verify using
"charger" command that the battery current matches the
expected fast charging current for the given temp range.

Change-Id: I7b213fd1724e9df09ada89ca27b05e0540b4de2a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288208
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-07-29 06:38:52 +00:00
Divagar Mohandass
1344069336 cyan: Increase chipset stack size.
Chipset task is overflowing and causing runtime crash.
Increasing the chipset task stack size by 128 bytes.

BUG=chrome-os-partner:43329
BRANCH=none
TEST=Build/flash EC and boot the platform to OS.

Change-Id: I4e444cc48979c74810851ab2625b982fdabdeb73
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/289112
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-07-28 21:31:43 +00:00
Shawn Nematbakhsh
a9527fd686 acpi: Ensure continuity of memmap data with a read cache
For multi-byte ACPI memmap reads, we previously had a mutex to ensure
data continuity. A better approach is to use a read cache. Since the
kernel will enable burst mode before reading a multi-byte memmap
variable and disable it afterward, we can populate the cache on the
first read after enabling burst. This solution removes deadlock bugs, is
contained entirely in acpi.c, and saves a deferred function.

BUG=chromium:514283
TEST=Manual on Glados. Add prints in acpi_read, verify that multi-byte
reads come from cache and non-burst reads continue to function as
before.
BRANCH=Cyan

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I74e4927bf2b433e31a9ff65d72820fa087c51722
Reviewed-on: https://chromium-review.googlesource.com/288871
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-07-28 21:31:38 +00:00
Alec Berg
6eecf91b63 pd: enable try.src for necessary boards
Enable Try.Src for Glados, Kunimitsu, Strago, and Oak so that they
default to sourcing power when connecting to other dual-role
devices.

BUG=none
BRANCH=strago
TEST=make -j buildall
Tested on glados by plugging in charger, hoho, and another
dual-role device and making sure we resolve roles appropriately.

Change-Id: I9393e30b35620eeda3ef1ef56366a97e59ba8054
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288247
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-07-27 19:30:01 -07:00
Alec Berg
07951e7f93 kunimitsu: disable asserts to save flash space
BUG=none
BRANCH=none
TEST=make -j buildall

Change-Id: I8909001a093ebfd4ea482984855931b0764e2552
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288770
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-07-27 19:30:01 -07:00
Scott
198fd7f2c2 oak: Fix issue with pc_send_ec_int() function
There was a bug in this function where the bit for host_command was
being set in the ec_status variable. This caused the ALERT# GPIO
line to be held low which in turn caused the EC MCU to loop
and keep reading the ALERT register.

BUG=none
BRANCH=none
TEST=manual Tested against Zinger in both ports and Zinger and Samus
at connected into each port. Verified that it established a PD contract
for both ports and that the alert line was no longer being held low

Change-Id: I5540440a68581521eb002411f728a4eac2f22caf
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288252
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
2015-07-27 19:30:55 +00:00
Anton Staaf
af7fb66ae3 Discovery: Add OpenOCD configuration file
This allows the "make flash" command to work for the Discovery board.

Signed-off-by: Anton Staaf <robotboy@chromium.org>

BRANCH=None
BUG=None
TEST=make buildall -j
     cd board/discovery
     make flash

Change-Id: Ifa3c1eca58b80093b47a8fe25b47d29dba923d6b
Reviewed-on: https://chromium-review.googlesource.com/287439
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
2015-07-27 19:30:49 +00:00
Anton Staaf
4626177c3b Atomic: Mark the modified uint32_t volatile
The atomic_* functions are often used in contexts where the data they
will operate on are volatile (due to being shared between tasks or a
task and an interrupt handler).  Adding volatile here makes using the
atomic_* functions a little easier in those cases and removes a cast
from the call sites (which could be obscuring a bug, if for instance
the variable was modified to be a uint16_t).

Signed-off-by: Anton Staaf <robotboy@chromium.org>

BRANCH=None
BUG=None
TEST=make buildall -j

Change-Id: I71356eb3cf2c0506df38532eee767c7d78f9240e
Reviewed-on: https://chromium-review.googlesource.com/287516
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
2015-07-27 19:30:44 +00:00
Vijay Hiremath
3e9bd8027c Strago: add HPD handling to policy layer
Ported the HPD handling to policy from Glados
 Change-Id: I293224fa5189c8827f1837877ffb791fddc7fb77
 Reviewed-on: https://chromium-review.googlesource.com/285743

BUG=none
TEST=make buildall -j
BRANCH=none

Change-Id: I982c6bd162b5ba239d4c9d066995c3d2fcaa97fd
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287812
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-25 23:49:06 +00:00
Vijay Hiremath
aff095dd9b Strago: Add support for USB-C muxes
Ported the USB-C muxes from Glados
 Change-Id: I9d42108688a9070b982ae77f77633654bc6505ed
 Reviewed-on: https://chromium-review.googlesource.com/282281

BUG=none
TEST=Tested the USB & DP status from "typec" console command.
     Observed usb_mux_set() & usb_mux_get() function are getting called
     and also the polarity of the USB-C is getting detected properly.
BRANCH=none

Change-Id: I0b169032ff77af9895311680413aed6c7d0fd4e2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287464
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-25 23:48:59 +00:00
Myles Watson
065b177a4d Jerry: add "cleanup: fix all the header guards"
104f811e67

BUG=chromium:511324
TEST=make buildall -j
BRANCH=none

Change-Id: I994e11c94413d7b8683b64e86807ba45b61c7eea
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288239
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
2015-07-25 17:45:33 +00:00
Myles Watson
3348557d82 Jerry: add "cleanup: remove board_discharge_on_ac"
Apply ac1cba419a to Jerry.

BUG=chromium:511324
TEST=make buildall -j
BRANCH=none

Change-Id: I04f168f8e1a8e6a1e7c21cc3ce8c06315d9e7495
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288238
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-25 17:45:28 +00:00
Myles Watson
2476e6c9a4 Pinky: Remove obsolete board
Jerry is being used for FAFT in the lab.  Remove Pinky instead.

BUG=chromium:511324
TEST=make buildall -j
BRANCH=none0
CQ-DEPEND=CL:288258

Change-Id: I03ddc74a4e72353f3408da8e374ad925baf00a35
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288237
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
2015-07-25 17:45:22 +00:00
Kevin K Wong
43671e0348 strago: add initial PD support
Ported the PD support from Kunimitsu.
 kunimitsu: add initial PD support
 Change-Id: I0cb1edcf1703f55882f81c65e6359a45be4c1629
 Reviewed-on: https://chromium-review.googlesource.com/281833

BUG=none
TEST=Verified the PD negotiation on BCRD2.
     Device boots after plugging in the USB charger.
     Battery is getting charged.
BRANCH=none

Change-Id: If4efb0463118414fb02ad8e53700eac578a4954a
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287124
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-07-25 17:45:10 +00:00
Vadim Bendebury
15135076e2 Cr50: Enable TPM-protocol data over the SPI bus
This patch adds a module which runs on top of the SPS driver and
implements the TCG SPI TPM protocol.

Basic register read and write functions are implemented as well as
rudimentary TPM state machine (claiming/releasing locality).

An enhancement is made to the SPS driver to ensure that when the CS is
deasserted the transmit FIFO is reset too, on the off chance of the CS
going away mid transaction for whatever reason.

In this implementation the slave is guaranteed to stall the master for
a few bytes in both receive and transmit transactions, which is
further aggravated by the fact that RX FIFO threshold is set to 8
(this is the minimum number of bytes the master has to send to wake up
the slave). This could be fine tuned later, for instance made a
parameter of the receive callback registration function.

BRANCH=none
BUG=chrome-os-partner:43025
TEST=trunksd initialization (with minor changes to accommodate new
     VID/DID and some status bits, to be published) succeeds with the
     cr50 connected to the USB/SPI cable.

Change-Id: I28d37c3b57dde9adf59e81426efe4f58880cf0b0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285252
2015-07-25 08:47:37 +00:00
Vadim Bendebury
6f13628e7f cr50: Use distinct configuration option for SPI Slave support
SPI slave and master interfaces require very different code to
support, they should have separate configuration options.

Host command code printouts should use their own console channel.

Using SPS to designate SPI Slave interface is not universally
acceptable, a bug has been opened to discuss the alternatives and
clean up the code.

BRANCH=none
BUG=chromium:512613
TEST=make buildall -j

Change-Id: I6683286a221c4689ecc247fdfe8ebca529f3f458
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286469
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2015-07-25 04:20:23 +00:00
Myles Watson
24a0b31732 Jerry: Revert "Remove obsolete EC targets"
Jerry is being used for FAFT in the lab.  Remove Pinky instead.

This reverts part of commit bdc680d8ed.

BUG=chromium:511324
TEST=make buildall -j
BRANCH=none

Change-Id: I034a814ffe3397728e443f99ed270d412be1bc1d
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288236
Reviewed-by: Dan Shi <dshi@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
2015-07-25 01:22:42 +00:00
Ian Chao
14bd917343 nuc:
Add ECST tool to modify the header used by npcx booter.

Modified drivers:
1. i2c.c: Modify for i2c_port design.
2. i2c.c: Fixed bugs when mutil-tasks use the same i2c port and pull-up issue.
3. hwtimer.c: Fixed bug whcih event expired time is behide current timer.
4. lpc.c: Add intializing host settings after pltrst is deasserted.
5. uart.c/clock.c/register.h: Fixed bug which cannot enter deep-idle
   when gpio is any-edge trigger mode.
6. task.c: Add workaround method for hard fault issue.
7. keyboard_raw.c: Modified for support CONFIG_KEYBOARD_KSO_BASE
8. lpc.c: Modified for support CONFIG_KEYBOARD_IRQ_GPIO
9. lpc.c: fixed obe interrupt bug during 8042 initialization
10.Adjust path of flat files for new Makefile rules
11.Fixed build error on lpc.c without CONFIG_KEYBOARD_IRQ_GPIO

BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none

Change-Id: Icf9494174b245b4026e396be877d578f36b6f6a5
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/284036
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
2015-07-25 01:22:32 +00:00
Shawn Nematbakhsh
7de0037538 glados: Make SPI chip select a GPIO
The mec1322 SPI driver toggles CS manually (CONFIG_SPI_CS_GPIO), so the
pin needs to be a normal GPIO, not functional.

BUG=chrome-os-partner:43160
TEST=Run "flashrom -p internal:bus=lpc -r read.bin" on glados, verify
that read.bin contains actual flash data and not all zeros.
BRANCH=None

Change-Id: Ibaee03b43b4d9c25f6c074c02688d1cba20c7a02
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288321
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-25 00:10:11 +00:00
Shawn Nematbakhsh
08546e3540 glados: V2 Board Changes
Changes for glados proto 2 build. These changes are behind GLADOS_BOARD_V2,
which is not defined by default in order to support existing boards.

BUG=chrome-os-partner:42933
TEST=Verify that Glados v1 board continues to boot AP. Verify
compilation on GLADOS_BOARD_V2.
BRANCH=None

Change-Id: I68634f95f94d3d37f18d676c01219f92b6ddfc45
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287291
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-24 21:54:31 +00:00
Vincent Palatin
79fe9ee1a5 ryu: update closed lid detection algorithm
use (LID_OPEN == 0 && BASE_PRES_L == 0) as the lid closed condition to
avoid false triggers.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=smaug
BUG=chrome-os-partner:42110
TEST=on Smaug EVT2, play with magnets and the genuine lid,
check we get the right "lid open" / "lid close" messages on the console.

Change-Id: Ie0a34fb7e45e8a424ff1cfda7662543d4f336f1a
Reviewed-on: https://chromium-review.googlesource.com/287853
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
2015-07-23 22:38:11 +00:00
Alec Berg
bcb8e11c63 lucid: change charger sense resistor to 5mOhm
BUG=none
BRANCH=none
TEST=make -j buildall

Change-Id: I7c87398ff85fc241162f2bf62c05108a498ce8d6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287783
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-07-23 20:46:29 +00:00
Shawn Nematbakhsh
8cb7670b00 glados: Add LED control GPIOs
LEDs should be under control of the mec1322 specialized LED control
unit, but it's not yet functional. In order to test LEDs for the
upcoming build, add GPIOs which can be toggled through the EC console or
ectool.

BUG=chrome-os-partner:40848
TEST=Verify `gpioset CHARGE_LED_1 1` turns LED red. Verify `gpioset
CHARGE_LED_2 1` turns LED green.
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I64b5109e10aeb6a1f38ae9410dc5205f4cc6a117
Reviewed-on: https://chromium-review.googlesource.com/287675
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-23 20:46:24 +00:00
Vincent Palatin
a14029e672 pdeval-stm32f072: update documentation
Add more details about adding a new source file.
Add a reminder for pull-ups on the I2C bus.
Decode PD state machine.
Remove unused second I2C port configuration.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=none

Change-Id: If94a0f47921dac7d3fb9dc1e9879a7c69699d224
Reviewed-on: https://chromium-review.googlesource.com/287830
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2015-07-23 19:32:01 +00:00
Gwendal Grignou
709676bfe1 driver: bmm150 measurement compensation
Using Bosh reference document, compensate X,Y,Z axis
based on internal registers and R HALL values.

Change compass unites to 1/16 uT per LSB.

Reference:
https://github.com/suribi/Thunder-Kernel/blob/master/mediatek/custom/common/kernel/magnetometer/bmm150/bmm150.c

BRANCH=smaug
TEST=Check compass value in user space.
BUG=chrome-os-partner:39900

Change-Id: I0c480521771ef6004ac6e5182cc1d27e82c5bc7c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285020
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-22 23:50:31 +00:00
Alec Berg
642fa3f3bc ryu: plankton: allow plankton to send VDM to enter CCD
Create new custom VDM to notify DUT to enter case closed
debugging mode. Send this VDM from Plankton when the case
closed debugging enable button is pressed. Once DUT
receives the CCD enable VDM, CCD remains enabled until
a reboot. Note, this is polarity dependent, so cable
might need to be flipped.

BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=load on plankton and ryu. attach full feature C to C
cable (must have USB3.0 wires). make sure plankton is in
USB mode (USB_SS_USB_MODE light should be set, which can be
done by pressing DP_USB_TOGGLE button). Press CASE_CLOSE_EN
button to send VDM, and then attach micro-B to debug port
CN14 on plankton. See that VID/PID for Ryu show up in lsusb
on host, and EC console works. If device does not show up,
flip polarity of cable.

Change-Id: Ifa469e4a43e32089becd75fe6cdfe0ed462d950b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287441
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-07-22 18:04:36 +00:00
Alec Berg
0115834bb6 plankton: allow use of double CC cable
Add ability for Plankton to detect whether a single or double
CC cable is used to connect to DUT. This is done by toggling
the active CC line until a connection is detected, then toggling
once more and checking if we still have a connection. If we
can connect to the DUT in both CC polarities, then it is a
double CC cable. Before we know the cable type, keep PD
communication disabled to avoid partially negotiating and then
disconnecting. Note, this increases the time it takes for
us to connect a form a stable PD contract with the DUT.

When we detect a double CC cable, the cable flip button actually
flips the active CC polarity, thus testing all pins in the
opposite polarity.

BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=test with plankton and samus. test that we form a PD
contract with both single and double CC cables as both sink
and source. also test the cable flip button for both cables.

Change-Id: I522369302848d4cdbb70c55a40af3ad0b7c3fb8a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286589
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-07-22 18:04:29 +00:00
Gwendal Grignou
57ec5805fe ryu: Fix orientation of accel and compass
Add matrices to align sensors vectors with the device reference.
Move rotation in read routines, to allow fifo to contains processed
information.

BRANCH=smaug
TEST=Worsk on smaug
BUG=chrome-os-partner:39900

Change-Id: I009e7f24ef6ee0574ed664aeb5fd649fcd7039fd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286659
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-22 05:02:53 +00:00
Vijay Hiremath
2302647f57 kunimitsu: add HPD handling to policy layer
Ported the HPD handling to policy from Glados
 Change-Id: I293224fa5189c8827f1837877ffb791fddc7fb77
 Reviewed-on: https://chromium-review.googlesource.com/285743

BUG=none
TEST=make buildall -j
BRANCH=none

Change-Id: I72e2f0853902bfa3536ba083f8ece5785be625c4
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287410
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-22 05:02:48 +00:00