The VCC_PWRGD pin is used as an indication of VCC2 state and controls
the internal VCC_PWRGD signal. On Glower, the pin is floating so we
can't use it as is. Instead, configure the pin as a GPIO so that the
internal VCC_PWRGD is gated high.
Without this, nSIO_RESET would be kept asserted and most LPC-related
peripheral won't work.
BRANCH=None
BUG=chrome-os-partner:35308
TEST=Without this, the interrupt status of LRESET# cannot be cleared.
After applying this patch, LRESET# interrupt can be cleared properly.
Change-Id: I6e250b8dff5d38e61ee84500da8236db35395a81
Signed-off-by: Vic Yang <victoryang@google.com>
Reviewed-on: https://chromium-review.googlesource.com/242130
Tested-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
On VBUS event, only wake PD task if task_start() has already
been called.
BUG=none
BRANCH=samus
TEST=make buildall. use similar patch on ryu and sysjump
back and forth while toggling vbus and make sure we don't
crash.
Change-Id: I79152cd2325949dea080d432d80600ff62d37085
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/242231
Reviewed-by: Vic Yang <victoryang@chromium.org>
If UFP fails to enter mode after tAMETimeout, UFPs should advertise
there USB Billboard class. If at a later time, DFP does successfully
enter a mode the USB device should disconnect permanently.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33968
TEST=manual,
Change UFPs response to 'discover identity' to be busy until after
tAMETimeout and see hoho enumerate (18d1:5010). Then see it
disconnect after DisplayPort mode is entered.
Change-Id: I2d72ed968302fbf74e70f76891a758c47f3773b4
Reviewed-on: https://chromium-review.googlesource.com/242148
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
Increase debounce time to decrease the probability of misidentification
on slow plug insert.
BUG=chrome-os-partner:35633
TEST=Manual on Samus. Plug 1A Apple charger, verify detection is
correct.
BRANCH=Samus
Change-Id: I031f1cfdbf6b2aabe7c8b64e0e6a740d4b5df14d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/242093
Reviewed-by: Alec Berg <alecaberg@chromium.org>
These numbers are too low right now and keep the fans going
even in idle states. We should repopulate this table with
better numbers when we get them.
BUG=chrome-os-partner:34598, chrome-os-partner:34789
TEST=flash, check fan rpm
BRANCH=ToT, samus
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Change-Id: I651f82610b924ee9f1be5ade856bdc18d7cfc066
Reviewed-on: https://chromium-review.googlesource.com/242042
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
When VBUS is initially present, we set a type-c charge_manager supplier.
Therefore, when we clear our VBUS present flag, we also need to zero our
supplier.
BUG=None
TEST=Manual on Samus. Quickly plug + unplug SDP charger, verify that pd
correctly detects that no charger is present on the board.
BRANCH=Samus
Change-Id: Ie72503f8a9b0f749b7529cfd6ff0675bd5640257
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/242092
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds a sensor-specific attentuation factor, which will be
applied to the ALS raw sensor readings on the EC. This is to
account for the attenutation due to glass, tinting, etc.
BUG=chrome-os-partner:34590
BRANCH=ToT,Samus
TEST=manual
In a root shell, run this:
cd /sys/bus/acpi/drivers/acpi_als/ACPI0008:00/iio:device1
while true; do cat in_illuminance_raw; sleep 1 ;done
Shine a flashlight on the ALS. Note that the readings are 5X
higher than they were before this CL.
Change-Id: I2a53872ecb5fab62e5f443d43588a26d3d7e697f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241191
Reviewed-by: Bryan Freed <bfreed@chromium.org>
Increase the time from the last USB PD RX edge to allow deep sleep
to 100ms to allow us to receive retries if we miss the first attempt.
BUG=chrome-os-partner:34624
BRANCH=samus
TEST=make -j buildall
Change-Id: Id4dd5614b52c9bcd97997e95b0c5f21fbd9b2cf3
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241954
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit 74fd6f9 largely got rid of default printing of VDM traffic to console but
one in custom_vdm was missed. Lets remove it too. Note can still view these by
'pd dump 1'
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=none
TEST=manual when pd flashing samus_pd console (chan usbpd) is quiet.
Change-Id: Idc04750de09572df8d5b15afcdde63f6afc4b5e2
Reviewed-on: https://chromium-review.googlesource.com/241952
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Separate macros for defining delays to turn on and off VBUS on the
Raiden ports.
Tune the delays for Samus to provide extra headroom based off of
measured worst case times.
BUG=chrome-os-partner:34525
BRANCH=samus
TEST=load onto samus. connect two samus' and use twinkie to analyze
time between request and PS_RDY on connect and then on a power swap.
Change-Id: I65cec911e34c22a4aad136423362a3a65bc2ab2a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241761
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Do not request a voltage that is within the deadband where we
aren't sure if the boost or the boost bypass is on.
BUG=chrome-os-partner:34938
BRANCH=samus
TEST=test on samus with zinger. change the deadband to [10V, 20V]
and see that we only negotiate to 5V. change the deadband to
[13V, 20V] and see that we negotiate to 12V. change the deadband
to [10V, 13V] and see that we negotiate to 20V.
Change-Id: Id761aef35eeadfa2ab7d2ca31a48d4324625ab32
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241528
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Resetting the pericom charge detector resets all registers, so it's
necessary to restore the state of the USB data switches, in case we want
them to be open.
BUG=chrome-os-partner:35394
TEST=Manual on Samus. Trigger data swap to UFP, verify that USB switches
become open.
BRANCH=Samus
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I32b1cf92a05abaab9ecd532537790e72f8f409bc
Reviewed-on: https://chromium-review.googlesource.com/240538
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The AP informs us of the latest update image for a given device through
the EC_CMD_USB_PD_RW_HASH_ENTRY command. If the latest update image is
equivalent to our RW, we don't need to request an update.
BUG=chrome-os-partner:35510
TEST=Manual on Samus. Flash latest RW FW to Zinger. Verify that
subsequent Zinger insertion doesn't trigger the FW update host event.
Insert RO-stuck Zinger and verify that FW update host event is
triggered.
BRANCH=Samus
Change-Id: I300b150b3469e3fe32307e61273880a1a052ac5a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241172
Reviewed-by: Alec Berg <alecaberg@chromium.org>
EC_CMD_PD_HOST_EVENT_STATUS should respond with
ec_response_host_event_status, not ec_response_pd_status.
TEST=Manual on Samus. Send EC_CMD_PD_HOST_EVENT_STATUS, verify that
resonse is four bytes.
BUG=chrome-os-partner:35510
BRANCH=Samus
Change-Id: I1a38591c7825f7e71c1fde8f3c1cab4be7852971
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241193
Reviewed-by: Alec Berg <alecaberg@chromium.org>
More updates to connection state machine. Adds CONFIG option
for backwards compatible DFP (used on zinger), and change UFP
state machine to debounce CC while VBUS is not present.
BUG=chrome-os-partner:33680
BRANCH=samus
TEST=load on samus and zinger and connect a bunch of times. also
test samus to samus connection.
Change-Id: Ia967eb6a17b10aa0c05a30686235fbf8a24e9a7b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240587
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Remove learn mode workaround for backboosting on all new board
revisions, starting with board 1.
BUG=chrome-os-partner:34938
BRANCH=samus
TEST=load on board with board revision 1 and make sure local var
use_bkboost_workaround is 0.
Change-Id: Ieccd7f86baca72d231b5e1491db824e53472eff7
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241121
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Add backboost detect interrupt to latch if we ever start
backboosting. Provide console command "bkboost" to read if
this has ever happened.
BUG=none
BRANCH=samus
TEST=load on samus and test console command. Note: have not
tested that gpio actually goes high when backboosting
Change-Id: Id7520a0a7777925af1611b8cdc295203d5b36187
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241031
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In the samus power sequence steps there is a delay of 500ms when
booting without a battery attached. This delay is currently set
to happen in the S5->S3 transition time, which seems to confuse
sequencing on some boards as we have already set DPWROK and
RSMRST and so this 500ms delay can mess up timing.
Move this delay to happen after 5V is up but before any of the
triggers to the chipset to start sequencing are set.
BUG=chrome-os-partner:31583
BRANCH=samus
TEST=boot on samus pre-DVT and DVT without a battery
Change-Id: I9519c336b121c86183c8368282f6c94b32987c16
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241180
Reviewed-by: Alec Berg <alecaberg@chromium.org>
On samus, set the input current limit ~200mA lower than the
value we want to accomodate hardware inaccuracy.
BUG=chrome-os-partner:34938
BRANCH=samus
TEST=load on to unit and verify using "charger" command on
ec console that the input current limit is 192mA less than
expected.
Change-Id: Ia6f82a1a622975715bd36c8c2a23e9677a6f18f0
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240751
Reviewed-by: Shawn N <shawnn@chromium.org>
Update the thermal table to account for Tj_max changing from 100C to 105C
so the thermal shutdown temperature is 104C instead of 99C.
The warn and high(prochot) values are left the same as we do want to try
and throttle with some room before the critical threshold will pull power.
This is mostly a concern in the factory where they may run without active
cooling during MLB testing.
BUG=chrome-os-partner:35483
BRANCH=samus
TEST=build and boot on samus
Change-Id: Iae55d7ca41f81e6b7250585be374fb8dd1b6533c
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241011
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Increase this timeout to 60s to allow powerd to cleanly shutdown the
system, if we boot with a low-power charger and low battery.
BUG=chrome-os-partner:35188
TEST=Manual on Samus. Deplete battery to 2% and boot system with 5V /
500mA charger attached. Verify that OS powers down before critical
battery shutdown occurs.
BRANCH=Samus
Change-Id: I9429d05efad506a855507bfb5b76de41df2aac1e
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240816
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add a FIFO to log important events on the PD MCU and coming from the PD
accessories.
The retrieval of the accessories log from the accessories by the PD MCU
is not implemented yet.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:32785
TEST=execute "ectool --name=cros_pd pdlog"
before and after plugging Zinger charger.
Change-Id: If96d73e711ff6ad64cfb99bd3e4d2d8f2643f19a
Reviewed-on: https://chromium-review.googlesource.com/238854
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Add npcx_evb in board folder for testing
Add shared-spi arch support in common layer.
Modified drivers for
1. Fan.c: console command “pwmduty”.
2. Pwm.c: for the issue when set duty to 0.
3. System.c: for hw reset only during system reset.
4. Flash.c: Fixed access denied bug of the flash driver for host command.
5. Comments from Patch Set 1
6. Comments from Patch Set 3 (except sha256.c)
7. Add openocd and flash_ec support for npcx_evb
8. Add little FW and spi-flash upload FW in chip folder
9. Add optional make rules for PROJECT_EXTRA
10.Replace CONFIG_SHRSPI_ARCH with CONFIG_CODERAM_ARCH and remove changes
in common layer sources for shared-spi arch. (except sysjump)
11.Find the root cause of JTAG issue and use workaround method
with SUPPORT_JTAG in clock.c
12 Execute hibernate in low power RAM for better power consumption
13 Add workaround method for version console command
14 Modified coding style issues by checkpatch.pl tool
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: I5e383420642de1643e2bead837a55c8c58481786
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233742
This adds some temp limits from the motherboard die sensors to
use in determining the desired fan speed.
I'm also bumping the minimum PECI temp up a bit, since it varies
rapidly. At room temp the motherboard sensors will generally
request a little bit of cooling, but in cool environments it's
likely that the PECI changes will become the major annoying factor.
BUG=chrome-os-partner:34789
BRANCH=ToT,samus
TEST=manual
Watch/listen to fans. They shouldn't turn off and on as much.
Change-Id: I309132a053a052b456808e42261844dbf6442675
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240435
Reviewed-by: Sameer Nanda <snanda@chromium.org>
Increase discharge timeout delay to 275ms, which is the new
tSrcSettle time. Also, fix fault condition so that we reset
immediately upon receiving a fault.
BUG=chrome-os-partner:35330
BRANCH=samus
TEST=load on zinger and test with firefly many 20->5V transitions
without a discharge error
Change-Id: I13bc5d77889a37390603c6922c84b264c77d79ac
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240399
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Change the reads of output enable and discharge gpio's to use
the output data register (ODR) instead of reading input data
register (IDR) because we are really intending to read it's output
state, what we have set it to.
BUG=none
BRANCH=zinger
TEST=make -j buildall. load on zinger and use it normally.
Change-Id: I308bbb659aa26a9d0bca8caef6d1257fc1146ae9
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240398
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If we discharge directly the output voltage from 20V to 5V under load,
an undershot happens and we dip below the 5V UVP threshold.
So when doing a down voltage transition from 20V to 5V, split it into 2
steps : a 20V->12V transition then once we are reached 12V, a 12V->5V
transition.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33794
TEST=connect Zinger to a Firefly and an electronic load.
Using Firefly, ask for 20V->5V, 12V->5V and 20V->12V
transitions, check the VBUS waveforms on the scope.
Change-Id: Ie1e091ae6f1fee1fb7d4e3bd72edbe7491acd5ea
Reviewed-on: https://chromium-review.googlesource.com/229732
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
To ensure we respond fast enough to the Discover Identity VDM
(which timeout after 30ms), we need to pre-cache the RW hash at startup.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:35327
TEST=plug Zinger to a PD sink and check the PD protocol trace on Twinkie
Change-Id: I9decdff358dd1ab9ac373ce8bfdd0402f5e21f04
Reviewed-on: https://chromium-review.googlesource.com/240080
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Implement the new type-C connect state machine which removes
lock and hold times and adds a debounce time to make sure
CC lines settle before going into the attached state.
This also adds detection of accessories, but doesn't do anything
when an accessory is detected.
BUG=chrome-os-partner:33680
BRANCH=samus
TEST=test samus connected zinger and samus connected to samus. make
sure that the connection is always formed. also tested with a third
party with old state machine implementation and formed a connection
every time.
Change-Id: I91a7a6031bc35082cc19d7697142e4aa92ef46f2
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238210
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Remove PWM module which is not being used in order to save flash
space.
BUG=chrome-os-partner:34489
BRANCH=samus
TEST=make -j buildall. view .map file and see we save ~760 bytes.
Change-Id: Id107fb402a60c5ac7510982f8ace6bad46fb14d0
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/239912
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
History is written by the victors, except when they run out of flash
space.
BUG=chrome-os-partner:34489
TEST=Build samus_pd, check ec.RO.map and verify 756 bytes were saved.
Verify that 'history' no longer works on console and up arrow has no
function.
BRANCH=Samus
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: If512fe31f01cc35b0ef6fa60714b9df125818d64
Reviewed-on: https://chromium-review.googlesource.com/239971
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
VESA DisplayPort Alt Mode on USB Type-C Standard specifies:
When DisplayPort Configuration is not selected (and the converter is
driving its HPD output low), the converter shall track the current
state of HPD, ready for appropriate indication when DisplayPort
Configuration is subsequently selected.
Not only are we violating specification here but it also causes a race
between enabling DPout muxes to AUX line which in turn causes GPU to
timeout trying to read EDID/DPCD on occasion.
Change adds post_config function for DFPs alternate mode and in the
case of DP it sets the dp_on flag there. This allows attention
function to correctly defer HPD_HI that may accompany 'DP status' VDM
to be queued (deferred) until such time that AUX muxes are enabled
properly.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:35219
TEST=manual, using hoho & dingdong
With kernel bootarg drm.debug=0x6 following cases all show these
drm debug lines:
[drm:i915_hotplug_work_func], Connector DP-2 (pin 5) received
hotplug event.
[drm:intel_dp_get_dpcd], DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00
00 00 00
[drm:intel_hpd_irq_event], [CONNECTOR:38:DP-2] status updated from
disconnected to connected
case1: boot connected to external display
case2: attach dongle to external display then samus
case3: attach dongle to samus then to external display
case4: connect/disconnect rapidly on type-C side
case5: connect/disconnect rapidly on external display side.
Change-Id: I40eab797fdd5090c8ad13fae2cd053b740d9a307
Reviewed-on: https://chromium-review.googlesource.com/239420
Trybot-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Build a Twinkie firmware image with the regular Twinkie sniffer firmware
in the RO partition and a firmware behaving as a USB PD sink in the
RW partition.
The user can call the "twinkie sink" command to switch the USB PD sink
firmware in the RW partition (and call "reboot" if he changes his mind
and wants the sniffer back).
Restore the ability of building different tasklists which was broken
where the tests build was simplified.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
./board/twinkie/build_rw_variant
Try "twinkie sink" command on a Twinkie with the combined firmware.
Change-Id: Ie489ce97a774ae7a22ac639c49a3d6e412e62de8
Reviewed-on: https://chromium-review.googlesource.com/237221
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
the VCONN INA is off by default to avoid a leakage path on CC2.
Turn it on when asking for a VCONN measurement ("twinkie vconn"),
then off aftwerwards.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=On the Twinkie command-line, "tw vconn" with the Twinkie interposed
between a Samus and a DingDong.
Change-Id: I8cd78b285512644af0824a44c735585b684fee66
Reviewed-on: https://chromium-review.googlesource.com/239212
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Power up inhibit is intended to stop the AP from booting when the
battery is in certain states. It works most of the time, but sometimes
IN_PCH_SLP_S5_DEASSERTED is already set by the time we get to S5 and we
incorrectly boot the AP.
Thinking about this more, it's better to check the battery state in G3,
before we transition to S5, to prevent the needless transition back to
G3 if power up is indeed inhibited.
BUG=chrome-os-partner:35182
TEST=Manual on Samus. Drain battery to 1% and attach charger. Press
power button multiple times and verify that AP doesn't boot. Charge
better to 2% and press power button. Verify that AP boots.
BRANCH=Samus
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ib03c3f707f9d90d0a9cb07ada3738d00e2728c32
Reviewed-on: https://chromium-review.googlesource.com/239352
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
