The reboot_ec command could warm boot the EC while the host is still
running. However, this resets the internal state so that the keyboard
module is disabled on the EC side.
Check the reset cause during the keyboard init code. If it is wrm boot,
enable the keyboard (assume the host is on).
BUG=chrome-os-partner:9102
TEST=on link 1.0
% ectool version
Firmware copy: RO
% ectool reboot_ec RO
the keyboard keeps working.
Change-Id: I0009c561e2cd88789e50f9129b494538e50ee00e
Now that we have a SPI driver, we must init it when we start up.
BUG=chromium-os:28925
TEST=build on daisy and discovery; run on daisy
Change-Id: I84b458d3ebc3fed9368dce8e06d040dbfc4e9125
Signed-off-by: Simon Glass <sjg@chromium.org>
BUG=chrome-os-partner:8718
TEST=manual
1) Use 'reboot' command from console to boot image. Should end up in
image A, with last reset reason soft cold. 'sysinfo' should show we
jumped to this image.
2) sysjump RO. Should end up in RO; otherwise same as 1)
3) reboot using Power+Esc+Reload. Should end up in image RO, with last
reset reason reset pin. 'sysinfo' should show we did not jump to this
image.
4) sysjump A. Should end up in A with reset reason reset pin.
'sysinfo' should show we jumped here.
Change-Id: I2dd5595eab4ba2c91bfe8b2b2e9677d7732aca63
Signed-off-by: Randall Spangler <rspangler@chromium.org>
This is necessary at init-time for verified boot to jump from RO to
one of the RW images.
It's also used by factory EC update to update one image and then jump
to the updated image to finish the update. In this case, the x86 does
NOT reboot.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8449
TEST=manual
1) power on x86 and log in
2) sysjump a --> system is in a; x86 has not rebooted
3) sysjump ro --> system is back in RO; x86 has not rebooted
4) reboot -> system is in RO; x86 HAS rebooted
Change-Id: I9dbadcf9775e146a0718abfd4ee0758b65350a87
More modules can be disabled individually through CONFIG_ defines.
Reordered early module pre-init and init, and added comments to
explain why things are ordered in main() the way they are.
Fixed a few assorted init-related bugs along the way, like st32m
keyboard scan double-initializing.
BUG=none
TEST=build link, bds, daisy
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I04a7fa51d743adfab4be4bdddaeef68943b96dec
Board-specific features like lightbar should be config'd at the board
level, not at the chip level.
BUG=none
TEST=build link, bds, daisy
Change-Id: If1df2ca0422f7b8bdc172d0df7bd9f6a1af6a9d2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Allow to build without the power button task.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make qemu-tests
Change-Id: Ibc757a6641f195f0d10e6a673792b996694f8cec
Jumping (currently rebooting, see crosbug.com/p/8100) to the RW image should
be done by vboot_init(), not vboot_pre_init().
As currently written, vboot_init() has to come AFTER these function calls:
task_init(); // sets up interrupts so that uart will work
watchdog_init(1100); // in case we fall over somewhere
uart_init(); // we'd REALLY like to see some debugging output
system_init(); // may go away with crosbug.com/p/8100
keyboard_scan_init(); // check for F3 to go to recovery mode
flash_init(); // maybe set RO regions (this should come earlier!)
eeprom_init(); // this is where the try_b flags are kept
BUG=chrome-os-partner:7459
TEST=none
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: I0ec3f6bcc26a308bb1005a944990963853b88b60
Also prints the current timer value when inits are done, and when the
watchdog task first gets to run (after all higher priority tasks sleep
at least once).
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=none
Change-Id: I342f86ad087fd18ab064a10a5bcdd0b69ee373d0
Add build information (date/time/builder) which can be displayed at the
EC console.
Generate a version from the board name and the branch tag.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chromium-os:27013
TEST=on BDS, run version command on the console.
inspect the built binary.
Change-Id: Idb1f68898ba6b811d02919f17ab4536ed9f8934a
A temperature polling task is added to achieve temporal correction and
also reduce the latency of reading temperature.
Factor out sensor specific part to keep code clean.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:7801
TEST=On link, 'temps' shows all temperature readings.
Cover each sensor with hand and see object temperature rise.
Compilation succeeded on bds/adv/daisy/discovery.
Change-Id: I3c44c8b2e3ab2aa9ce640d3fc25e7fba56534b86
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7451
TEST=hold down no keys; KB init state should be blank
hold down reload (F3); KB init should indicate recovery key pressed
hold down F3 + ESC; same
hold down F3 + F2 + ESC; KB init should NOT indicate recovery key pressed
Change-Id: I0fbf15407b20669396f667e6499ee5a9d545a4d5
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7493
TEST='powerbtn' to boot main processor, then 'temps' and 'pecitemp'
Change-Id: Id57526ebb37c8aecb05ecebccc2824f462b9de1a
- Add #ifdef CONFIG_TEMP_SENSOR before #include'ing temp_sensor.h
which actually requires temp_sensor_id to be defined.
Revert the forward declare used earlier since it is not the
correct solution in this case.
- Add #ifdef CONFIG_CHARGER before calling charger_init()
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=None
TEST=compiled on both BDS and Discovery
Change-Id: I60b7e4ba91eb958b3ad724cc9ffa9a12fe9c3a71
Refactor board/chip-specific code into corresponding directories.
Add support of the four I2C temp sensor in Link.
Use table lookup to handle different types of temperature sensors.
BUG=chrome-os-partner:7527
TEST=Correctly read EC internal temperature on bds.
Compile for link succeeded.
Change-Id: I694cfa54e1545798d877fafdf18c5585ab5f03e2
Preparatory work to introduce a second SoC : 2nd series 3/4
Some modules won't be used on other designs, make them optional.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run the EC firmware on BDS and check that the commands from the
optional features are still available and working.
Change-Id: I979864ed94dc4da90c1010bd2e4589d84bc2d046
Preparatory work to introduce a second SoC : 2nd series 2/4
Avoid introducing platform specific dependencies in common files where
they are not necessary.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=build for BDS and Link
Change-Id: If2ccd022e4956425222b55a5a48ca7522857e7f0
You can now enable/disable tasks more easily.
To conditionally compile a C file depending on the task FOO activation,
just write something like that in the build.mk file :
common-$(CONFIG_TASK_FOO)+=foo_source.o
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make all BOARD=link && make qemu-tests
Change-Id: I760fb248e1599d13190ccd937a68ef47da17b510
Instead of using a runtime callback to register the console commands,
put them in a special linker section. So we can do a macro to "register"
them during the build.
It saves 684 bytes and a few microseconds at startup.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run a few commands from the BDS command line.
Change-Id: Id33ea210b9035bf76ed720373c74c5dd24ccd1b1
This works around a chip errata where the internal oscillator on early
EC parts (as used on proto0) is untrimmed.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7693
TEST=if it runs, it works
Change-Id: Ie82a524543f4cf25efd0de7998dbdae103bd126b
Implement TPS2543 USB charging control.
It contains routine for setting each USB port as dedicated charging port
or standard downstream port. To allow us controlling the current
distributed to each port, we can select whether to allow 500mA or 1500mA
for each port.
BUG=chrome-os-partner:7476
TEST=Added USB port definition for BDS and tested GPIO output voltage
level is correct for all modes.
Change-Id: I19bc4b30d333aa802f868ebfc3a398b30e99ba0f
This just ensures the JTAG pins are reset to JTAG function on warm reboot.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7448
TEST=none
Change-Id: I0cccdbe7a68c228db7f354898ed30598e9fabff0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7499
TEST=press and release power button; should see debug messages
Change-Id: I8909ae4643afc98753edb690771618ad43135e3e
Add LPC host command to get and set fan speed.
BUG=chrome-os-partner:7313
TEST=Connect a fan and manually test fan actual speed matches target
speed.
Change-Id: I4b6a711a1b8cca0dbd1c1936fe4f0f15240d3453
