We can get the correct chip info after the change was made.
BRANCH=none
BUG=none
TEST=console message:
[0.013915 TCPC p1 VID:0x48d PID:0x8320 DID:0x1 FWV:0xec]
[0.018054 TCPC p0 VID:0x48d PID:0x8320 DID:0x1 FWV:0xec]
Change-Id: I4eb94967acb351559e745ed1c4e34a4c58f41e14
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/487767
Reviewed-by: Randall Spangler <rspangler@chromium.org>
If charging current is set to 0mA during charging, reference of
charge current feedback amp (VREF_CHG) is set to 0V. Hence the DCDC
stops switching (because of the EA offset). To eliminate this issue,
disable/enable charger depending on the charging current is zero
or non-zero respectively.
BUG=b:37413065
BRANCH=reef
TEST=test 'ectool chargecontrol normal/idle/discharge' are working
Change-Id: Id31876afe365a476fb906e059ab519b7a0c9a7c6
Signed-off-by: james_chao <james_chao@asus.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/486101
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
(cherry picked from commit 6da9ed8786e90ee91b39934180fe84e01ac30260)
Reviewed-on: https://chromium-review.googlesource.com/489812
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
RO does not need touchpad/keyboard driver or I2C passthru, RW does
not need RW verification, let's shrink both images by only including
required config options.
BRANCH=none
BUG=b:35582031
TEST=Build and flash hammer: still functional.
build/hammer/RO/ec.RO.flat shrank by 10144 bytes: (45868 to 35724)
build/hammer/RW/ec.RW.flat shrank by 2764 bytes: (45332 to 42568)
Change-Id: Iff0feb4e8446cc9f2e32103cd383fddae3234fec
Reviewed-on: https://chromium-review.googlesource.com/479492
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
These are options for features can be implemented if they are required.
BRANCH=none
BUG=none
TEST=build 'it83xx_evb' board with pd modules.
Change-Id: I1afb7d9c2d764728a375563a6739544032394c54
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/483319
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Before entering standby mode, bit 7 (cable_det) or analog_ctrl_0 is
cleared. This allows a new cable detect event to trigger the EC to
put the ANX4329 into normal mode. However, in some cases such as when
in S3/S5/G3 chipset power states a port will be in sink only mode and
therefore won't attach when a sink only adapter is connected to the
port. This results in the an indefinite toggle of standby<->normal
mode transitions. This constant toggle floods the EC console and more
importantly prevents the ANX4329 from remaining in standby mode and
the power consumption remains at ~9.5 mW instead of ~1.2 mW when no
adapter is connected.
This CL adds logic around clearing the cable_det bit so that it's only
cleared if both CC lines are open or if an Emark cable is
attached. Emark cable is determined from the presence of Ra on one CC
line and no Rd on the other CC line. The special consideration for an
Emark cable is reqiured because when an Emark cable is connected, the
USB PD auto toggle state may require some number of iterations until
the attach event is recognized.
In order to support handle cases where the drp mode is changed via
either the EC console command or host command, added a call to
tcpm_set_drp_toggle whenever the drp state is updated. Since the drp
mode is updated upon chipset resume events, the chipset resume hook in
board.c for anx74xx_cable_det_handler() became redundant and hence it
was removed.
BUG=b:35775019,b:35586188
BRANCH=reef
TEST=Tested the following cases:
- Sink, source adapters in chipset S0. Verified that adapters
connected as expected. Also, used Emark cable to connect to both USB
PD chargers (source) and Pixel phone (sink).
- Run 'lidclose' on EC console then connect Type C -> A adatper
[3490.370125 TCPC p0 reset!]
[3490.389588 TCPC p0 Low Power Mode]
It no longer toggles indefintely and after running 'lidopen' verified
that port 0 is now in SRC_DISCOVERY.
- In S3/G3 connected USB PD charger with regular and Emark typeC
cable. Verified that port 0 is in SNK_READY state.
- use 'pd dualrole sink' and test with Type C -> A adatper. Verified
that tcpc wakes up, but goes into standby mode until entering 'pd
dualrole on'.
- When sink only adapter is connected in S3/G3, measure power level
~1.2 mW as opposed to ~10 mW in S0.
- Repeated similar tests on port 1 (parade tcpc) to verify that
adapters connected as expected.
Change-Id: Ib8de666f72723934186fee7869f9dda01381c7a8
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/463991
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: S Wang <swang@analogix.corp-partner.google.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
The cable_det signal is used to signal to the EC that the tcpc has
detected a cable being connected when low power mode is
configured. The driver then needs to take the tcpc out of suspend
state by setting PWR_EN and RESET_N high. Then bit 7 of analog_ctrl_0
needs to be set properly.
The code that is handling this transition was attempting to access the
tcpc via I2C before putting the chip in normal mode when
transitioning from suspend to normal. In addition there are issues
with calling the driver function directly from the hook task (in the
delayed ISR handler) and from the USB PD task.
This CL changes the delay ISR handler to only set the TCPC_RESET
indication so that the call to put the ANX3429 into normal from
standby to normal mode only happens in the USB PD task. The TCPC_RESET
event is only set if cable_det is high, but reset_n (to the ANX3429)
is low which indicates that the ANX3429 is currently in standby mode.
BUG=b:35775019
BRANCH=reef
TEST=Manual
Tested with various adapters in both S0 and S3/G3 chipset
states. Verified that adapters connected as expected. When in S3/G3
connecting a sink only adapter still causes an indefinite toggle, but
all calls into the driver are executed from within the USB PD 0 task
and all ANX3429 I2C accesses work as expected.
Change-Id: I6e4843e43f59afbf5ca3251feb68981b815c1c78
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/457103
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
This patch disables IADP immediately after the EC boots. We
observed noise on IADP/RESET pin causing SEL_ILIM_VAL to
randomly change. This seems the cause of b:35648317.
We enabled IADP to fix b:35647661 initially and also followed
the vendor's recommendation. However, the issue is only
reproducible on the particular board which was used for power
measurement and we did not see the issue on other boards with
IADP disabled.
Also the vendor assumed our EC doesn't control IBUS_LIM_SET
and ICC_LIM_SET. (I think they assumed like other thier customers
our EC controls ILIM by DAC connected to IADP/RESET pin.) If ILIM
is not set by EC and IADP is disabled, the system would brownout
because ILIM stays at 128mA. Therefore, it was (mistakenly)
recommended that our EC should keep IADP enabled.
Cros EC configures IBUS_LIM_SET and ICC_LIM_SET dynamically thus
the above concern does not apply.
We also found that we have too much noise on IADP/RESET pin. The
noise is not big enough to cause the chip to reset but it's big
enough to cause ILIM to fall in 128mA zone. We think this is why
the boards fail to boot from battery cutoff or no battery.
(Contrary to the vendor's explanation, it seems IADP/RESET pin
continusouly affects ILIM not only in the early chip power-up
period.)
BUG=b:35648317
BRANCH=none
TEST=Booted two Electro and two Snappy from 1) dead battery 2) no
battery 3) battery cutoff.
Change-Id: Ic675f1354b9ef222ceec8ce112b19713812d2752
Reviewed-on: https://chromium-review.googlesource.com/458676
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
PS8751 does not restore all register contents when resuming
from low power mode. This change makes tcpm call board_init
when it stops auto-toggling so that register contents can be
restored.
BUG=b:35585399
BRACH=none
TEST=On Snappy, the board_init funciton is called every time a device
is plugged in and register contents are restored.
Change-Id: I50c51334f43c02e3c4d8453e1e966bf6eb3ce769
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/454139
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If the charging current is less than the BD9995X's minimum charging current
it is overwritten to BD9995X's minimum charging current. However in idle
mode we write the charging current which is known to the charger during
that time, which can be less than the BD9995X's charging current. Hence,
do not overwrite the charging current in idle mode.
BUG=b:35984679
BRANCH=none
TEST=Manually tested on Electro. In idle mode charge current is 0mA.
Change-Id: I2e605b63c8519383c6a62d76718bc52660e7270e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/453999
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The anx74xx tcpm driver for the usb_mux_set() function is always
connecting the DP aux lines to the SBU signals regardless of whether
the bit flag MUX_DP_ENABLED was set or not. For CCD opertation the sbu
lines are used to establish a USB connection to H1. This means that if
a PD port ever attaches to a sink debug accessory, usb_mux_set would
result in interrupting the USB connection being used for CCD.
In addition, the anx74xx_tcpm_mux_exit() function had a bug where the
value read from ANALOG_CTRL_5 was being masked by 0x09 and then
written to ANALOG_CTRL_2.
Added functions anx74xx_tcpm_mux_enter_safe_mode() and
anx74xx_tcpm_mux_exit_safe_mode() so that writes to the 3 CTRL
registers that are used to configure ALT_DP mode can be easily
bookended.
BUG=b:36007652
BRANCH=reef
TEST=Connected servo_v4 to port 0 of electro, verified that H1 console
access worked. Then initiated a data role swap so that port 0 on
electro was in DFP mode and the H1 console stayed connected.
- Tested with dingdong that could connect to a 4k monitor.
- Tested with USB3 flash drive.
- Tested Anker USBC -> USBA hub
Change-Id: I2d045134fbdd21b6b492bbeabc85ab23aef73b9a
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/451837
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: S Wang <swang@analogix.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
spi_transaction() always returns success even without the sensor.
Check whoami value to make sure that the sensor is existed.
BUG=none
BRANCH=none
TEST=remove LID accel sensor from elm and see init failed log.
[1.258973 Lid Accel: 1: init failed: 4]
Change-Id: I55aa35bc9790e5dec61e22aa2f51243e29368a86
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/453579
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
IADP monitoring bit was set to the default value for the devices
with an RO image which clears the bit (and causes the issue).
This patch removes the code so that we do not touch the IADP
monitoring bit since transitioning from 0->1 may cause other issues.
BUG=b:35647661
BRANCH=reef
TEST=none
Change-Id: I4413e0bd2de3f4e3912cbe6e73b8cad641ee9245
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/453400
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/453798
Matches the pressure multiplier used with elan trackpad on Chrome OS
(3.1416). We do fixed point arithmetic to avoid the need for
floating point or non-power of 2 division.
BRANCH=none
BUG=chrome-os-partner:59083
TEST=make BOARD=hammer -j && util/flash_ec --board=hammer
Change-Id: Ic3daad2645839955734eb7cbd9a60bbdf2520ce8
Reviewed-on: https://chromium-review.googlesource.com/450994
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
There were 2 mistakes when setting the data/power roles for automatic
GOOD_CRC:
- the bit numbers for data role and power role were swapped.
- the function can only set and not reset the bits.
Try to simplify this code by:
- removing the duplicated name for register 0x9C (aka AUTO_GOODCRC_1)
- avoiding the multiple read/modify/write by using AUTO_GOODCRC_1 for
the actual settings (and letting the enable bit always on)
and GOOD_CRC_2 for enabling/disabling it, so we can do simple writes.
- answer only on SOP (not SOP' or SOP'').
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=reef
BUG=b:35648282
TEST=On Snappy, connect a given power supply, record the USB PD traces
and see that the GOOD_CRC messages are still correct after the DR_SWAP.
Change-Id: I848b1dcbc0e06806649e64a9664f3fba21bdd448
Reviewed-on: https://chromium-review.googlesource.com/448040
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: S Wang <swang@analogix.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
The function tcpm_select_rp_value() is used to set a given Rp
value. This function was not supported for boards that use the config
option CONFIG_USB_PD_TCPC. This CL adds a weak board_ function which
can be overloaded for boards that have the requirement to set Rp to
different values.
BUG=chrome-os-partner:61878
BRANCH=servo
TEST=run 'make buildall'. On plankton added a console command to trigger
a call to tcpm_select_rp_value(0, 0), verified that it returned
2 (EC_ERROR_NOT_IMPLEMENTED). Then added board_select_rp_value() to
plankton's board.c and verified that it returned 0.
Change-Id: I1cd6f0ed51717736d30575c58025bd9a1c5d6fc4
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/446685
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Port changes cl/288874 to generic kionix driver.
From cl/288874:
After we write SRST in CTRL2, there seems to be a period of time where the
accelerometer doesn't respond to i2c commmands. Instead of failing the init
just consider it as part of the timeout period.
BUG=chrome-os-partner:39269,chrome-os-partner:63146
TEST=make -j buildall
BRANCH=veyron,cave
Reviewed-on: https://chromium-review.googlesource.com/445973
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
(cherry picked from commit 4a34b0d88f6b0075ee66a18f4aa22325dc766eb6)
Change-Id: I2197aa7741d1482b76c7c07b0cb0c171aab86a59
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/446417
Eve P1 is missing the ALS_INT_L signal and so needs to poll the
Si114x. This CL adds a new config option CONFIG_ALS_SI114X_POLLING
that when defined uses a deferred callback to trigger the motion
sensor event that reads sensor registers. The deferred callback uses a
8 msec delay which is ~2x longer than the time required by the sensor
to complete the measurement.
BUG=chrome-os-partner:61470
BRANCH=none
TEST=On Eve verify that light sensor measurments are present with the
'accelinfo on 1000' command.
Change-Id: I212bebf2ceacbac87ccb0734cc4990dbc349b028
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/440377
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit 18327455c1 ("ANX74xx: add TCPC low power mode for different
DRP state") introduced new code to put ANX74xx in low power mode.
However, this broke existing boards that do not enable
CONFIG_USB_PD_TCPC_LOW_POWER (and therefore do not implement cable
detection interrupt).
BUG=chrome-os-partner:59841, chrome-os-partner:61640
BUG=chrome-os-partner:62964
BRANCH=none
TEST=on poppy, connect USB-A keyboard to ANX port via A-C adapter:
keyboard works
Change-Id: I4b66511b816afee402a7e769aa6d2c323724d071
Reviewed-on: https://chromium-review.googlesource.com/443865
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Use the motion sensor to manage ALS as well.
The current interface (via memmap) is preserved, but
we can also access the sensor via cros ec sensor stack and
send the ALS information to ARC++.
BUG=chrome-os-partner:59423
BRANCH=reef
CQ-DEPEND=CL:424217
TEST=Check the sensor is working via ACPI sensor and
cros ec sensor. Check ARC++ sees the sensors.
Change-Id: Iaf608370454ad582691b72b471ea87b511863a78
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/424323
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
This change adds an option to pdchipinfo command to force ec to get
the version from the chip instead of the cache (if it's available).
This option will be used after firmware update, which makes the cache
value stale.
BUG=chrome-os-partner:62383
BRANCH=none
TEST=Run ectool as follows:
localhost ~ # /tmp/ectool pdchipinfo 0 on
vendor_id: 0xaaaa
product_id: 0x3429
device_id: 0xad
fw_version: 0x15
localhost ~ # /tmp/ectool pdchipinfo 1 on
EC result 2 (ERROR)
Change-Id: Icefe96d7fc1208b991a4caa13aaf4f04052edba7
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441271
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The firmware version formats may vary chip to chip. fw_version field is
changed to a union of a 8 byte string and an 64-bit integer.
BUG=chrome-os-partner:62383
BRANCH=none
TEST=ectool pdchipinfo 0/1 on Electro
Change-Id: Id51e66c44338a09ed897ee61f54cd6a394400e63
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441270
Make FIFO a stack variable to save static memory,
Remove auto_inc argument, always set
Remove constant for rate 0.
Force board to declare sensor private data.
Avoid name collision in stm_mems_common
Include stm_mems_common.h in accel_lis2dh.h, caller only need to
include accel_lis2dh.h.
BUG=none
BRANCH=none
TEST=Compile with discovery_stmems board.
Change-Id: Id52b54dd4ec3cf217247c5511ad5a506067ad293
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441144
Tested-by: mario tesi <mario.tesi@st.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: mario tesi <mario.tesi@st.com>
Added code to put the ANX74xx in low power mode for different DRP state.
1. When nothing attached or system is in S3 or S5 disable the auto
toggling and put ANX74xx system in Analog control mode.
2. Using the CABLE_DET interrupt pin (attach event) enable normal power
mode.
BUG=chrome-os-partner:59841, chrome-os-partner:61640
BRANCH=None
TEST=Manually tested on Reef using below dut-control command
dut-control pp3300_pd_a_mw -r <n>
1. S0, S3, S5 - Nothing connected, ANX in low power mode.
2. In S0 SNK (display/USB dongle, eMark cable) connected & put
system to S3, ANX remains in normal mode.
3. In S0 SNK connected & put system to S5, ANX in low power** mode.
4. In S0 nothing connected, put system to S3 or S5, attach
SNK, ANX in low power** mode.
5. Attach SNK at S3/S5 & boot to S0, ANX in normal mode.
6. SRC (AC adapter) with/without eMark cable are detected in
S0, S3, S5, and continue to charge the system after S-state
transition.
low power**: ANX74xx hardware limitation that Ra/Open (Ex: E-Mark cable
only) detection will trigger CABLE_DET continuously, therefore ANX74xx
will go to normal power mode momentarily and then low power mode in a
loop.
Change-Id: I30f7fd7a85e31987fb77e2cab2fe140d59dd3629
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/415580
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Shorten certain long prints and reduce the precision of timestamp prints
when CONFIG_CONSOLE_VERBOSE is undef'd.
BUG=chromium:688743
BRANCH=gru
TEST=On kevin, cold reset the EC, boot to OS, and verify cros_ec.log
contains all data since sysjump and is < 2K bytes (~1500 bytes).
Change-Id: Ia9390867788d0ab3087f827b0296107b4e9d4bca
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/438932
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This patch adds a host command to get PD chip info.
For PS8751, tcpci_get_chip_info will fail if the chip is in
low power mode. It can be woken up by reading a random register
first then wait for 10ms.
This code doesn't have the wake-up read to avoid 10ms delay.
Instead, we call this function immediately after the chip is
initialized because it'll gurantee the chip is awake.
Once it's called, the chip info will be stored in cache, which
can be accessed by tcpc_get_chip_info without worrying about
chip states.
localhost ~ # ectool pdchipinfo 0
vendor_id: 0xaaaa
product_id: 0x3429
device_id: 0xad
fw_version: 0x15
localhost ~ # ectool pdchipinfo 1
vendor_id: 0x1da0
product_id: 0x8751
device_id: 0x1
fw_version: 0x37
BUG=chrome-os-partner:62383
BRANCH=none
TEST=ectool pdchipinfo 0/1. make buildall
Change-Id: I3f1667d00ce1826936d90882ada1df6ed6b0ea37
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/433166
The loss between PS8751 and Type-C connector is large and requires
a larger EQ and low squelch threshold for compensation.
- USB Type-c connector facing receiver equalization setting:
Compensate for channel loss up to 10.9dB
- High Speed Signal Detector threshold adjustment: -25%
BUG=chrome-os-partner:61101
BRANCH=none
TEST=Boot & charge
Change-Id: Ie74e2d0b8ad7206f5e60fb013613c382980c0eac
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/433846
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add driver for acc sensor ST lis2dh/lis2dh12
Support interrupt management for FIFO watermark
Starting to share common code with other devices
like lsm6dsm/lsm6dsl (acc/gyro) or new lis2mdl (mag)
TODO: Add all embedded functions support (click,
tap and so on)
BUG=none
BRANCH=master
TEST=Tested on discovery BOARD with sensor connected on
EC i2c master bus. Added motion sense task on discovery
board task list, added gpio info in board configuration
file and tested with motion sense console commands. Data
for acc seems ok: can successfully change ODR and
full scale range. Also FIFO and interrupt tested
Device tested is lis2dh (lis2dh12 simply differs for low
pin count but share the same registers)
Change-Id: I16abeac3f139a604094b38d8d8b857a62c93a242
Signed-off-by: Mario Tesi <mario.tesi@st.com>
Reviewed-on: https://chromium-review.googlesource.com/412700
Commit-Ready: mario tesi <mario.tesi@st.com>
Tested-by: mario tesi <mario.tesi@st.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
All boards have been transitioned to charge_state_v2.c
So charge_state_v1.c, HOOK_CHARGE_STATE_CHANGE, and
CONFIG_CHARGER_TIMEOUT_HOURS can be removed
BUG=chrome-os-partner:36272
TEST=make -j buildall
BRANCH=none
Change-Id: I3f20c5198ea75185f9894deb792575a1be31432a
Reviewed-on: https://chromium-review.googlesource.com/435467
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
charge_ramp needs to make a decision based upon the VBUS level on one
specific port - the port that is ramping. The VBUS level on any other
charge ports (if present) is not relevant.
BUG=chrome-os-partner:54099
BRANCH=reef, gru
TEST=With subsequent patches, verify charge_ramp success with a variety
of BC1.2 chargers.
Change-Id: Ie0a51a577e2b7491222560cd08dd5321ff3b7975
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/435561
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Setting the VSYSREG_SET register as per Charge State Machine of
the BD9995X datasheet.
1. Set VSYSREG_SET <= VBAT so that the charger is in Fast-Charge
state when charging.
2. Set VSYSREG_SET > VBAT so that the charger is in Pre-Charge
state when not charging or discharging.
BUG=chrome-os-partner:55220
BRANCH=none
TEST=Manually tested on Reef. Observed 'Charger State Machine Status'
register value when charging it is in Fast-Charge state and
when not charging/discharging it is in Pre-Charge state.
Change-Id: I5cd5afa92384acb4fd9d69128a2a03ae6992dc5b
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/430880
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
The nvdc voltage has a kind of deep, so that rarely observed
NVDC down at this point because of back-boosting.
Our sequence to enable charger bit and setting vsysreg
is correct but rohm introduce charger may need some more time
to be stable when between chg_en and vsys_set to start charge
BUG=chrome-os-partner:60380
BRANCH=gru
TEST=Manual on kevin, trigger battery disconnect, re-attach AC, verify
system boots cleanly. and see voltage probing on c54@60380
Change-Id: Ic05091379322ffaac16fe827a47345c76c85f3e5
Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/434252
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
- Modified src attach state to enable vbus when debug accessory is
detected.
- servo_v4 has two pd ports, but each port requires a different default
power role. Port 0 can only ever be a SNK, but port 1 which acts is
intended to be a DTS port should default to a SRC so it can be be a
source debug accessory. It may also act as a sink debug accessory, but
is not intended to toggle automatically but will swap roles if
necessary via pd role swap messaging.
- Add hook for ccd enable/disable for DTS mode
BUG=chrome-os-partner:61878
BRANCH=servo
TEST=Manual Verfied that can still build servo_v4 project. All changes
in this CL are contingent on config option CONFIG_USB_PD_DTS being enabled.
Change-Id: Iab968b6fbdfc8f2d155c4f8618921b32f313b9ec
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/428308
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(From CL 431233)
Limit battery charge voltage to prevent battery over-charge, due to
regulation inaccuracy. Since RO FW may charge > 8656 mV, ensure the
battery is not full before charging.
BUG=chrome-os-partner:61906
BRANCH=none
TEST=Manual on Electro, sysjump with battery @ 99%, verify battery
discharges, then re-charges to 100%, before discharging once again.
Change-Id: I28212c83057a442fd75e39f8ad51927a7a1f2817
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/432857
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
ISL9238 is able to measure currents when battery is discharging
(like ISL9237), and charging (new feature).
Reverse AMON (OTG output current) is also supported by ISL9238,
but isn't very interesting on our boards.
BRANCH=none
BUG=chrome-os-partner:61166
TEST=Plug charger, "amon" in EC console, check that values match
current meter + "battery" information. Unplug charger,
values match "battery" information.
Change-Id: I9ecae6bec9e2049d17ef1a4596dbd4e3ff59919e
Reviewed-on: https://chromium-review.googlesource.com/430474
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
When we switch to a state where the sensor is not powered,
we don't call set_data_rate(0), because we may trigger an i2c/spi access
to a sensor already powered off. It has the side effect to leave
data->odr to the last set sensor frequency.
When we init the BMI160, it starts in suspend mode. We will set it to
normal mode only if data->odr is 0. Therefore, we must set odr to 0 in
the init routine.
BUG=chrome-os-partner:61502
BRANCH=reef,kevin
TEST=On reef, without this change. When going to S5 (shutdown -h 0) and
power back up, sensor is stuck (on EC, accelread 1 reads old value).
With this fix, sensor is active and working.
This fix a regression due to CL:411964.
Check others driver do not check odr for setting suspend/normal mode.
Change-Id: Ibc7519d49e55a0b43b4c12ed545bd75ab0260766
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/426766
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit adds a "spoof" mode feature to the motionsense stack. It
allows the user to arbitrarily set the outputs of the sensor in order to
"spoof" the readings of the sensor. This can be useful in emulating
tablet mode or device rotations. A command is available from the EC
console named `accelspoof` and there is a corresponding motionsense
command in ectool called `spoof`.
The usage is as follows:
- EC console
> accelspoof [id] [on/off] [X Y Z]
- ectool
# ectool motionsense spoof -- [id] [0/1] [X Y Z]
If on or off(or 0/1) is not specified, the current spoof mode status of
the sensor is returned. If on is specified, but no components are
provided, the sensor will lock the current values and provide those as
the spoofed values. If the components are provided, those will be used
as the spoofed values.
BUG=chromium:675263
BRANCH=cyan,glados,gru,oak
TEST=Flash a DUT with accels. From AP console, run `ectool motionsense
lid_angle` in a loop, use 'accelspoof' EC console command to set spoofed
values. Verify that the angle is fixed regardless of the actual angle
of the DUT.
TEST=Flash a DUT with accels. From AP console, use `ectool motionsense
spoof` to spoof values and verify that `ectool motionsense` reflects the
spoofed values. Test with both provided component values and no
component values.
Change-Id: Ie30688d22f38054e7243b1af493a3092b2cdfb72
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/421280
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
ISL9237 and ISL9238 are almost identical, with few register changes,
let's make the driver generic, to support both chargers.
BRANCH=none
BUG=chrome-os-partner:61166
TEST=make buildall -j
Change-Id: I029894dd62ab7e45897d877289707ee8c1ff1d09
Reviewed-on: https://chromium-review.googlesource.com/422197
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
This error code is used to indicates the data has not changed.
Motion sense task will therefore not add any entry in the sensor FIFO.
BUG=chrome-os-partner:59423
TEST=make -j buildall
BRANCH=reef
Change-Id: I58b9be5675d8949bd682d8c89dadea1dfff9bf2e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/424856
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add support for the Texas Instruments TMP112 I2C temperature
sensor. The sensor provides a single temperature value.
BUG=none
BRANCH=none
TEST=Ran 'temp' console command over and over. Verified values with
digital thermometer.
Change-Id: Ida4c082309d245c3f7c6282ecea74ce5af746e43
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: https://chromium-review.googlesource.com/418488
Reviewed-by: Randall Spangler <rspangler@chromium.org>
sensor private structure for bmi160 and bmp280 were defined
in the drivers themselves. It worked because there was only one
instance of each sensors on a board. However, this is an error it
should be in board files, as it was done for other sensors like the kionix.
BUG=none
TEST=buildall.
BRANCH=kevin,reef
Change-Id: Ica3aba358d141a7df9a3e97251d4c1e520cbf2c8
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/424218
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Auto-role toggle on the anx74xx does not function correctly with
e-marked cables and cannot be used.
Also check for TCPC support for auto-toggle at runtime, to allow
auto-toggle supported TCPC to be used alongside an unsupported part.
(from CL:420405)
BUG=chrome-os-partner:60890
BRANCH=reef
TEST=Manual on reef, boot to S0:
`pd 0 state`: Toggling between SRC_DISCONNECTED / SNK_DISCONNECTED
`pd 1 state`: DRP_AUTO_TOGGLE
Also verify port 0 can become sink + source correctly in S0.
Change-Id: Iafdedf31773feef23923cefe1f4fb02fcffda120
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/420866
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
If a partner port sends a packet at approximately the same time as we
send a packet, we may end up with the initial packet followed by the
GOOD_CRC reply in our HW FIFO. Don't automatically discard the first
packet in the FIFO. Instead, discard the packet only if it's a GOOD_CRC
packet. And, modify our get_message function to automatically discard
GOOD_CRC in search of a meaningful packet.
In addition, due to interrupt latency, we can't rely on receiving one
interrupt per incoming packet. If our Rx FIFO is non-empty, assume that
it contains at least one packet.
BUG=chrome-os-partner:60242
BRANCH=gru
TEST=Manual on kevin, attach Apple dongle with no inputs. Attach zinger,
verify we negotiate to ~20V. Repeat 10x and verify negotiation is
successful each time.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I7e4430fc2b7ed44b1aa4b561d72c8e1e964b245a
Reviewed-on: https://chromium-review.googlesource.com/414927
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 373f5dfd75e8ea5074d26fc6392eafe83de4f905)
Reviewed-on: https://chromium-review.googlesource.com/419186
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Allow BMI160 to report temperature like other device with a temperature
sensor.
Temparature is returned in K. Although BMI160 resolution is 9bits per
degree, we round to the nearest degree.
BUG=chrome-os-partner:58894
BRANCH=reef
TEST=After enabling sensor on Reef, check we can measure the temperature
with EC console commands temp or from user space with 'ectool temps 3'
Check 'ectool tempsinfo 3' returns valid data:
Sensor name: Gyro
Sensor type: 1
Change-Id: Ib48f988e078cdee1dfbc05b23df806bd4eb09931
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/416297
Reviewed-by: Scott Collyer <scollyer@chromium.org>
We currently rely on *head == 0 as error condition, which is
fragile and inconsistent across TCPCs implementations.
Instead, let's return a proper return value on all implementations.
BRANCH=none
BUG=chrome-os-partner:60575
TEST=elm FW as of 65fb80d (later version include a fix that would
hide this issue), cherry-pick this patch, connect j5create
adapter, then HDMI, then power => no crash
Change-Id: If7235e0491e9f80fdd50ce2605477ee518f8e1aa
Reviewed-on: https://chromium-review.googlesource.com/417443
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
