This patch makes EC notify the host of BJ plug or unplug event
by triggering EC_HOST_EVENT_PD_MCU. The host can then use
EC_CMD_PD_HOST_EVENT_STATUS to get event details.
BUG=b:67060237
BRANCH=none
TEST=Boot Fizz on Type-C. Plug/unplug BJ adapter. Verify host event
is set by hostevent. Verify available_charge is set by hacking
chgsup command.
Change-Id: I1831bec9715e0191cb9610e05d08bbc08347b513
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/692848
Reviewed-by: Shawn N <shawnn@chromium.org>
TPM reset sequence when TPM wipeout is requested has a side effect of
rebooting the entire device. This is not always desirable, in some
cases other actions need to happen before the device is rebooted.
This patch makes resetting the EC the TPM reset caller's responsibility,
BRANCH=cr50
BUG=none
TEST=verified that RMA reset and WP disable properly wipe out the TPM
and reboot the device.
Change-Id: I6e827ce923a2454ae5b2e2597d1a4c9390bbb8b6
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/733813
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
When RMA process has been initialized and the user entered the
expected authentication code value, the Cr50 needs to wipe out TPM
memory, open and unlock CCD and reboot the device.
This patch adds a function to accomplish that. User response is
validated on the TPM task context, and TPM reset request also requires
TPM task processing. To decouple response processing from the
following reset, the response processing is handled by a hook task
callback, delayed for 1s to make sure that user receives the response.
After TPM has successfully reset the CCD is reinitialized with RMA
'opened' and the device is rebooted.
Just in case something goes wrong with the unlock and the hook is not
invoked, add a 10s deferred function to take the EC out of reset so
that the device still can reboot.
BRANCH=none
BUG=b:67007905
TEST=on a Bob device:
- on the Cr50 console enter 'ccd lock', verify that ccd is locked
(by examining output of the 'ccd' command)
- at the bash prompt enter gsctool -r -s -t, copy the
authentication code from the Cr50 console and pass it to gsctool.
- observe the device reset TPM wiping out its memory, enable CCD
and reboot.
Change-Id: I6fafb5e642cb2b6f2040507a7f1989607fd31316
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/729983
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
keyboard/button init are responsible for checking if user requested
manual recovery. However, by this time, hook init is not run and hence
host event set operation for manual recovery is dropped. This change
adds a call to lpc_init_mask before keyboard/button init operations
are performed.
BUG=b:68189465
BRANCH=None
TEST=Verified that manual recovery works fine. Recovery using software
command works too:
reboot ap-off
hostevent set 0x4000
powerb
Change-Id: I15cb648d4b253a523293c7ab2cd3e8e08e31a763
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/735799
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Select optimal PDOs from the charger at various discrete voltage limits
and advertise them all to the DUT, in case the DUT does not support the
"best" > 5V PDO due to voltage limits.
BUG=chromium:776809
BRANCH=servo
TEST=On {samus, scarlet, kevin}, with zinger attached to DUT port,
verify DUT + CHG negotiate to max supported voltage. On 'black' servo_v4
board, verify scarlet negotiates to 12V.
Change-Id: Iea174e4f6bc303d561e28281b9ff20afb3073c25
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/730877
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Modules in board/cr50/tpm2 are part of the TPM task, and their .bss
segment needs to be wiped out along with other TPM modules' when TPM
is reset.
The only module from this directory which has static variables is
NVMem.c. This patch groups the variables into a structure, and makes
sure that the structure is stored in the part of .bss which is zeroed
when TPM is reset.
BRANCH=none
BUG=none
TEST=verified that TPM wipeout happening during RMA reset is
successful.
Change-Id: I5f80dc5e4f5f7cdce2d1a1ed59e0fbac354c5bf6
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/733814
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
tcpm_get_cc() returns TYPEC_CC_VOLT_*, not TYPEC_CC_*. Check for RP
rather than non-open to match USB-C spec (Table B-2 Rp/Rp Charging
Current Values for a DTS Source).
BUG=chromium:775542
BRANCH=servo
TEST=Verify donette and guppy are not detected as DTS, verify suzy-qable
is detected as DTS, on kevin DUT.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I0ff5550e9171ff86b42b489525044bf63827240c
Reviewed-on: https://chromium-review.googlesource.com/733220
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
BUG=b:67663166, b:67663124
BRANCH=None
TEST=Find a reworked zoombini with the SN5S330; Flash; verify that we
can charge at up to 20V on that port.
TEST=Plug in a USB-A to USB-C cable, verify that PD state machine still
transitions out of SNK_DISCONNECTED.
TEST=Plug in a weak power source to p0, plug in a stronger power source
to p1, verify that PP2 FET is turned off when stronger source is plugged
in. Verify that PP2 FET is turned on when strong power source is
removed.
Change-Id: I669494194f42d4fcc2b3d63ef1725132b6b8d9a8
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/722105
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit adds a basic driver for the TI SN5S330. This driver just
sets up the IC and provides an API to turn on or off the PP2 FET.
BUG=b:67663166, b:67663124
BRANCH=None
TEST=Enable code for zoombini; Flash a board which has the SN5S330
stuffed; Verify that we're able to perform PD negotiation and negotiate
all the way up to 20V.
TEST=Boot only on AC. sysjump to RW, verify that board does not
brownout.
Change-Id: I9c147ee8465eed878843cf902db301d62e8f627e
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/722104
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
In the event where we don't have a battery, or the battery is criticial,
we should reject the charge port of "none" such that we don't stop
charging.
BUG=b:66516888
BRANCH=None
TEST=Flash zoombini; Unplug battery, plug in a Type-C charger, verify
that board doesn't enter a reboot loop.
TEST=Repeat the above test with all Type-C ports.
Change-Id: I794e370d5ba578adb76b3fb6edddb82ab72578bb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/678836
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This is needed to prevent some of the power rails from turning on. They
should be weak enough for the AP to still drive them.
BUG=None
BRANCH=None
TEST=Flash zoombini; Verify that PP3000 is not turned on.
Change-Id: I7aca716dc2497aaa0984a1cd033c1f45f2564bbb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/677875
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
In order for charge manager to be fully seeded, we need to initialize
all the Vbus suppliers.
Additionally, remove the hack for C0 since the TCPCs can detect Vbus
now.
BUG=None
BRANCH=None
TEST=Flash zoombini; Verify that charge manager is seeded.
Change-Id: I086f70ea26a3f804815017a5f492bd624b85ffd0
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/677874
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
The GPIO that turns on Vbus for the BQ24392 is active low. This commit
changes the driver to make it clear that the enable is active low.
Additionally, the 5V rail is turned on prior to performing detection and
will be turned off if the AP is off.
For zoombini, since the chipset task can also control the 5V rail,
CONFIG_POWER_PP5000_CONTROL is enabled to do so in a task-safe way.
BUG=b:65992382, b:65991615
BRANCH=None
TEST=Verify that Vbus is turned on and the BQ24392 can output high on
charge detect pin.
Change-Id: Ib96ef9736ccc7fa285a3642ec6f3824a1df8f931
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/676762
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
For certain cannonlake designs, the 5V rail can be controlled by both
the chipset task as well as other tasks such as the USB charger tasks to
perform BC1.2 detection. This commit introduces an API that allows the
tasks to enable/disable the 5V rail. Enable requests will immediately
enable the rail, however, attempting to disable the rail will only
result in a request. Once all tasks want to turn off the 5V rail, the
rail will be turned off.
A bitmask is introduced to keep track of the requests. Index 0 is for
the chipset task.
All of this is gated behind a config option:
CONFIG_POWER_PP5000_CONTROL
BUG=b:65991615
BRANCH=None
TEST=With other zoombini code, verify that 5V can be enabled and disabled.
Change-Id: I1722b4a272c4d6ee24408929f5a7402051bb9cf3
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/722322
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
As part of new interface MOTIONSENSE_CMD_INFO, we need to provide
sensors min and max frequency.
BUG=none
BRANCH=none
TEST=compile
Change-Id: I8bcd4e2287a79ac17b0dce58ad7704876e89bcdb
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/723601
This change prevents the floating RX console pin from entering unwanted
commands.
BRANCH=oak
BUG=b:67033247
TEST=manual
load on hana and probe USART RX pin
Change-Id: I6dc05e03f82dcc71ea6f957f93c5fe7c6b65d2bf
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/722381
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
We define battery_is_present in board/poppy/battery.c, so we should
also set CONFIG_BATTERY_PRESENT_CUSTOM.
BRANCH=none
BUG=b:67984464
TEST=Flash soraka, battery status when connected and disconnected is correct.
TEST=Recovery from battery-cutoff is fine
TEST=Device does not get stuck in reboot loop when in critical battery
condition
Change-Id: I02a597e30513a1bb4dab86a21ea107fc4876a63b
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/727444
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
If the base ADC value does not clearly indicate attach, reverse
attach, or disconnect, read the ADC value again in 500ms.
This time should be long enough that even if the ADC value is
wrong, it would not use an inconsiderate amount of power.
BRANCH=none
BUG=b:67970530
TEST=Connect 6K and 30K resistors in parallel between DET and GND
pin, EC detects an unclear 27 mV ADC value, and retries
every 500ms until the 6K resistor is removed and a clear
attach value is read (154 mV).
TEST=Connect base in reverse, ADC value is around 475 mV, and
ADC is not polled again.
TEST=Disconnect base, ADC value is at maximum (2816 mV), and ADC
is not polled again.
Change-Id: I616114afc683608b853c18d0a081c6cd1e150c75
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/727790
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This prevents problematic disabling of the keystrokes by making it
so that 0xAD can't disable keystrokes.
Also cleans up keyboard controller enable/disable code.
BRANCH=none
BUG=none
TEST=keyboard now working in UEFI bootloaders like systemd-boot
(aka gummiboot)
Change-Id: I921834fc418572c9a0f4586039ac1ce05504bf1d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/722124
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The previous method of negotiating > 5V on CHG port followed by
asynchronously negotiating > 5V on DUT port (and then switching DUT VBUS
source from internal 5V to DUT) will often not function correctly due to
VBUS glitching on the switchover. Instead, immediately switch VBUS
source to CHG when detected, and negotiate > 5V on CHG only after DUT
has requested a transition.
BUG=chromium:775542
BRANCH=servo
TEST=Attach {kevin, scarlet} to servo_v4, attach Apple charger to
servo_v4, verify DUTs charge at 9V and consoles are reachable on
scarlet.
Change-Id: I1e53f1e74e5ab1cd32a252243c23faaa8fce107b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/724683
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Allow other modules to call pd_find_pdo_index() / pd_extract_pdo_power()
in order to get information about current PDOs.
BUG=chromium:775542
TEST=Manual on kevin, verify 20V negotiation with zinger still works.
BRANCH=servo
Change-Id: I1861a0226501bda13e7d576d0971d841da9d2b74
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/724682
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
suzy-qable advertises 1.5A, but its actual capability depends on the
host USB port it is attached to. Since suzy-qable is ubiquitous and
other DTS sources may behave in the same way, ramp the input current
limit in order to find a reasonable maximum.
BUG=chromium:770296
BRANCH=None
TEST=Attach suzy-qable to kevin and reef, verify that neither OCs and EC
console via cr50 is available on reef. Also verify donette chargers
kevin at 3A and does not ramp.
Change-Id: Idd0683ede3a44111a01da6b4faab52f388ee82fd
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/693295
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
According to the USB-C spec, when a debug accessory is identified, we may
optionally establish USB PD communication over CC. Some DTS partners
(eg. servo_v4) expect us to speak PD, so let's make it so. There is no
need for special ACCESSORY states, these do not exist in the PD spec.
BRANCH=servo
BUG=chromium:737755,b:65837068
TEST=On scarlet, attach servo_v4 and verify scarlet charges. Also verify
EC and cr50 consoles are available through servo_v4.
Change-Id: I59d1ca50b4766509eccf38562cdf926578138585
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/693294
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add a new DRP policy to "freeze" the power role of each port, never
toggling automatically, though manual role swaps may still occur.
BUG=chromium:769895
BRANCH=servo
TEST=On servo_v4, verify DUT port stays in SRC role and POWER port
stays in SNK role while disconnected.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ibff3cd1ffaf0e884b030c231003763a57acbe02e
Reviewed-on: https://chromium-review.googlesource.com/715276
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chromium:769895
BRANCH=servo
TEST=On servo_v4, attach OEM Apple charger to power port and verify
negotiation to 9V and port / ILIM selection from charge_manager. Attach
samus to DUT port and verify 9V charging.
Change-Id: Icf16f6e8c99af4fbb48a83b7a36f550c20f5fd69
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/713944
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Instead of clearing out all the host events on S0ix wake, provide an
opportunity to the host to read the events and log it. Move the call
to clear events to the point where host sends a command indicating
exit from S0ix.
BUG=b:67874513
BRANCH=None
TEST=make -j buildall. Verified that host events are cleared by the
host during logging.
Change-Id: I339dc70d761bb851286d98c5c20094ccaefd238f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/724188
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
On Scarlet rev2, we see rt9467 has trouble
detecting VBUS level reliably.
Let's use TCPC to detect VBUS instead as we once
considered in b:65698085.
BUG=b:65698085, b:67917615
BRANCH=none
TEST=verify usb mouse and charging works through usb-c hub
Change-Id: I439cd3267bb26d5cdcbfd4a3c48179cf7942b870
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/725000
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Add a new mask type (ALWAYS_REPORT mask) that is set by default to
certain host events that should always be reported to the host
irrespective of the state of SCI, SMI and wake masks. This mask
includes host events like critical events resulting in shutdown or
reboot, events that are consumed by BIOS, etc.
Now that ALWAYS_REPORT mask is added, this change also updates the way
EC manages set/query operations for host events:
1. During set operation, EC will check if the host event is present in
any of the 4 masks - SCI, SMI, wake and always report. If yes, then it
is set in hostevents.
2. During query operation, EC will extract the lowest set event from
hostevents, clear it and return it back to the host.
In order to reflect the above change in EC behavior, a new feature bit
is used EC_FEATURE_UNIFIED_WAKE_MASKS. This allows the host to decide
when wake mask needs to be set before checking for host events.
BUG=None
BRANCH=None
TEST=make -j buildall. Also verified following:
1. Wake from S3 works as expected. Host is able to log correct wake
sources (Verified power button, lid open, base key press and tablet
mode change on soraka).
2. Wake from S5 works as expected. Host is able to log correct wake
sources (Verified power button, lid open on soraka).
3. Wake from S0ix works as expected (Verified power button, lid open
on soraka).
4. Software method to trigger recovery still works fine:
reboot ap-off
hostevent set 0x4000
powerb
Change-Id: I62e5c1f82247c82348cd019e082883d86ec2688f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/719578
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
In some scenarios we want to take RW updates w/o taking version numbers into consideration,
much like the behavior we get w/ CR50_DEV.
But then without the additional CR50_DEV features enabled for the rest of the code.
BRANCH=none
BUG=none
TEST=compiles
Change-Id: I7dd946ab77bbdc35850ed934cd53735418e13845
Reviewed-on: https://chromium-review.googlesource.com/724967
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Marius Schilder <mschilder@chromium.org>
Trybot-Ready: Marius Schilder <mschilder@chromium.org>
On zoombini, we were taking enough power that the voltage dipped for a
little bit. This commit adds a 1 second delay after applying SPI VREF
but before actually flashing the EC.
BUG=b:65694390
BRANCH=None
TEST=`./util/flash_ec --board zoombini` still works.
Change-Id: I431cbfcc569fd5369971b06dedb85e8d5fdb9a32
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/722354
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
While introducing support for isl9238, I accidentally used an
incorrect config option (CONFIG_ISL9237), instead of
CONFIG_CHARGER_ISL9237.
BRANCH=none
BUG=b:35585464
TEST=make buildall -j
Fixes: b1101b8ed6 charger: isl923x: Add support for ISL9238
Change-Id: I2f62f3fbefbc60cc9d83726ef88a66c5c9f1b245
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/725121
Reviewed-by: Rong Chang <rongchang@chromium.org>
Instead of duplicating the handling of host events and host event
masks in chip lpc drivers, add routines in common code to provide
basic functions like setting/getting of masks, setting/getting of
events and handling of masks transitions across sysjump.
BUG=None
BRANCH=None
TEST=make -j buildall. Verified following:
1. Event masks are correctly retained across sysjumps.
2. Wake from S3 works fine.
3. Wake from S0ix works fine.
4. SCI generated correctly.
Change-Id: Ie409f91b12788e4b902b2627e31ba5ce40ff1d27
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/707771
Reviewed-by: Shawn N <shawnn@chromium.org>
It turns out the code logic is not exactly correct: the range for
coarse trim values is 0..0xFF.
Use the fixed top of the range value and do not print messages if the
value is at the range boundary.
BRANCH=cr50
BUG=b:67788437
TEST=Observed occasional messages on the Cr50 console when
plugging/unplugging Suzy-Q, but not the constant spew.
Change-Id: I94ab581769ba8326346b636b1342136e98d61ff1
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/723981
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
