This adds a fallback directory in case SYSTEM_LOCKFILE_DIR is
unavailable. Since this is a band-aid meant to help older systems
auto-update, the fallback path is hardcoded to "/tmp" as to avoid
polluting the overall lockfile API.
BUG=chromium:616620
BRANCH=none
TEST=Tested on veyron_jaq by removing /run/lock and seeing
mosys, flashrom, and ectool run successfully with
firmware_utility_lock in /tmp.
Change-Id: Idbe63a574474ec35a5c3b6fe2b0fb3b672941492
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/348850
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Only way to set alarm previously was through
rtcalarm command on EC console. Implemented
interface through ectool so that the AP can set
it as well.
BUG=chrome-os-partner:52218
BRANCH=None
TEST=from AP console, run ectool rtcalarm <sec>
Should see [event set 0x02000000] from EC
console in approximately <sec> seconds.
Change-Id: I3202b826cb994dbca456b8b9c22bbca4dbe2766a
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347493
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
ec_readmem_dev_v2() was copy/pasted from ec_readmem_dev(), but we forgot
to switch over the fallback 'fake_it' case to the new ioctl format. This
case is used over transports like SPI, which don't implement
cmd_readmem.
BUG=none
TEST=run `ectool version` on kevin (with cros-ec-spi) and don't see:
ioctl -1, errno 25 (Inappropriate ioctl for device), EC result 255 (<unknown>)
BRANCH=none
Change-Id: I4335f8fc3d43169cf628e26cadf1ac8d263955f2
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347111
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
This allows the AP to protect a I2C passthru bus. A board-specific
function then defines what I2C commands are allowed, so that we
can white/black list some addresses (e.g. I2C address allowing
PD chip FW updating).
BRANCH=none
BUG=chrome-os-partner:52431
TEST=Book elm-rev1
Change-Id: Ib106924418b16388ea8ea53c7b6bda6ef92e1d09
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/345761
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Randall Spangler <rspangler@google.com>
This adds the basic framework for Reef including full GPIO listing,
board config file, and rudimentary functionality. It has not been
fully tested and still has several TODOs/FIXMEs. For now we just need
something that will build and can be incrementally improved.
BUG=chrome-os-partner:53035
BRANCH=none
TEST=EC and AP both boot, seems reasonably stable for now
Change-Id: I4934ad00917e251dd1d7eb759207a92c45a36136
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/339292
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Add generic PWM host commands for setting + getting duty cycle. PWMs can
be controlled through index (board-specific meaning) or by type
(currently KB backlight and display backlight are supported, more can be
added as needed).
BUG=chrome-os-partner:52002
BRANCH=None
TEST=Manual on chell.
`ectool pwmsetduty kb 100` - Verify KB backlight goes to 100%
`ectool pwmgetduty kb` - Prints 100
`ectool pwmgetduty 0` - Prints 100
`ectool pwmsetduty 0 0` - Verify KB backlight goes to 0%
`ectool pwmgetduty kb` - Prints 0
`ectool pwmgetduty disp` - Error res 3 (unsupported PWM type)
`ectool pwmsetduty 1` - Error res 3 (non-existent PWM index)
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I607c92a291e6c2e3af8238eaf22ad2bb81ffc805
Reviewed-on: https://chromium-review.googlesource.com/344012
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Some reason cause the power off during battery fw update process.
Then execute the process again, tool can't detect AC because EC
can't read data from battery. So set AC_PRESS flag after check
battery is in battery fw update mode.
BUG=None
BRANCH=None
TEST=check the battery can execute fw update in this case.
Change-Id: Iafe501eb1719a12425d5cac42d27c897e078acc1
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/341044
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Tested-by: Keith Tzeng <keith.tzeng@quantatw.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
CROS_EC_DEV_IOCRDMEM must be used on architecture where legacy IO mapped
registers are accessed inderectly via EMI. The kernel is taking care of
the translation.
TEST=Check on reks that we need to use the IOCTL.
BUG=chrome-os-partner:52550,chromium:602832
BRANCH=none
This reverts commit de45353bbd ("ectool: Remove CROS_EC_DEV_IOCRDMEM").
Change-Id: I8efad56df90c58c25bdc9ccd70a508547e629a77
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/340348
Reviewed-by: Shawn N <shawnn@chromium.org>
On !LPC EC, we can read memory via CROS_EC_DEV_IOCXCMD ioctl,
using command EC_CMD_READ_MEMMAP.
On platform that supports direct memory access (lpc), we access
the memory directly, bypassing the ioctl.
BUG=chromium:602832
TEST=On gnawty and veyron, check 'ectool battery' works.
Verify that gnawty use io mapped registers.
BRANCH=none
Change-Id: I9bfcddcf450bf8df63ead78e1df97dd7392289e6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/338853
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Elm is an oak variant that uses ANX7688 PD port controller. This CL sets
PD port count to 1 and modifies TCPC I2C address to 0x50.
Other elm changes are included in this change:
- add 2 KX022 motion sensors, remove BMI160
- remove ALS
- LED configuration changed to 2 bi-color LEDs
- remove pi3usb30532
- add ANX7688 mux driver
- change PD interrupt polarity
BRANCH=none
BUG=none
TEST=manual
make BOARD=elm -j
load and test on elm proto
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I8ad02da9acade985bc0e7e2f85d9e58db7e6b38d
Reviewed-on: https://chromium-review.googlesource.com/331453
Reviewed-by: Shawn N <shawnn@chromium.org>
Support both old and new ioctl formats at the same time.
Auto-detect the ioctl format used by the kernel.
BUG=chromium:481710
BRANCH=None
TEST=Work on Samus with kernel 4.4 and 3.8/3.14/3.18
Change-Id: I31d7ce5b517b4b5af8e2b617e386c3cfd3276f20
Signed-off-by: Guenter Roeck <groeck@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/331830
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
This is keyboard test mechanism request for "multiple key press test",
we can thru the testing to scan out kso ksi pins shortting or keyboard has
multiple key pressing, below was the testing steps:
1. Turn off internal keyboard scan function.
2. Set all scan & sense pins to input and internal push up.
3. Set start one pin to output low.
4. check other pins status if any sense low level.
5. repeat step 3~4 for all keyboard KSO/KSI pins.
6. Turn on internal keyboard scan function.
BUG=chrome-os-partner:49235
BRANCH=ToT
TEST=manual
Short any KSO or KSI pins and excute "ectool kbfactorytest", it shows failed.
if no pins short together, it shows passed.
Change-Id: Id2c4310d45e892aebc6d2c0795db22eba5a30641
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/332322
Reviewed-by: Shawn N <shawnn@chromium.org>
BRANCH=none
BUG=none
TEST=Test OK on ITE8390CX.
You can run "make -j BOARD=it8380dev" to build ec.bin
and flash the ec.bin via
"sudo ./build/it8380dev/util/iteflash -w ./build/it8380dev/ec.bin"
Change-Id: I2077012114bdbd5a8cc8f7dc29e43cdcb77d65b6
Signed-off-by: Donald Huang <donald.huang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/334176
Reviewed-by: Randall Spangler <rspangler@chromium.org>
`tempsinfo all` will probe all 24 sensor IDs, which will produce stderr
output due to host command failure if a given sensor does not exist.
Therefore, check memmap data for presence before probing a given ID.
BUG=chrome-os-partner:51026
BRANCH=None
TEST=Manual on Sentry. Verify "ectool tempsinfo all" dumps info on 4
temperature sensors and prints nothing to stderr.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I14d65c1ad03eafafc21db41781c434b3ed74cb7e
Reviewed-on: https://chromium-review.googlesource.com/333779
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Update flash_ec to allow flashing servo_micro
* Add servo_micro build
BUG=chromium:571477
BRANCH=None
TEST=updated servod is able to control gpio, gpio extender,
SPI flash, ec uart, ap uart on test yoshi
Signed-off-by: Nick Sanders <nsanders@google.com>
Change-Id: I4d69c83ae581cb41da928a27c39b7152475d7ca8
Reviewed-on: https://chromium-review.googlesource.com/327214
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Since npcx5m6g has larger than 128 KB code ram for FW, the original
alignment between RO & RW regions isn't suitable for new chip.
Therefore, we add 256KB alignment of them for npcx5m6g.
In order to program the flash used by npcx5m6g, we add new board array,
BOARDS_NPCX_5M6G_JTAG, in flash_ec to distinguish which flash layout
ec used. In npcx_cmds.tcl, add new script funcs such as flash_npcx5m5g
and flash_npcx5m6g to program flash with different layout.
Modified sources:
1. config_flash_layout.h: Add 256KB alignment of RO & RW regions for
npcx5m6g.
2. util/flash_ec: Add new board array, BOARDS_NPCX_5M6G_JTAG, to
distinguish which flash layout ec used.
3. openocd/npcx_cmds.tcl: Add new script funcs to program flash with
different layout.
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: I0ace31d96d6df2c423b66d508d30cefb0b82ed6c
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/331903
Reviewed-by: Shawn N <shawnn@chromium.org>
We're supporting a wide range of batteries, and since file name
matching is based on HWID, we don't need to maintain a separate
table of supported HWIDs in our utility.
BUG=chrome-os-partner:49589,chrome-os-partner:50469
BRANCH=None
TEST=buildall
Change-Id: I3e7c62379c07a598e23f3c543959503d3d25aee3
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/330231
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Tested-by: Bruce Wan <Bruce.Wan@quantatw.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Latest GCC gives compiler error:
util/iteflash.c: In function verify_flash:
util/iteflash.c:927:9: error: res may be used uninitialized in
this function [-Werror=maybe-uninitialized]
return res;
^
BUG=None
TEST=`make buildall -j` outside chroot
BRANCH=None
Change-Id: I184d8673020552797fd54bb98ee582a63debbf16
Signed-off-by: Anatol Pomozov <anatol.pomozov@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/330873
Reviewed-by: Shawn N <shawnn@chromium.org>
led_color_names[] should have EC_LED_COLOR_COUNT numbers of data.
A missing data cause strcasecmp() compare argv[] with NULL in
find_led_color_by_name(), that results in Bundle Image test error
BUG=chrome-os-partner:50612
BRANCH=lars
TEST=`make -j buildall`, `ectool led power blue=255` with homemade ectool.
Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Change-Id: I2132775f9d4a074517f9a98b81919dd77bc86102
Reviewed-on: https://chromium-review.googlesource.com/330075
Commit-Ready: David Wu <david_wu@quantatw.com>
Tested-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
The Filesystem Hierarchy Standard version 3.0* specifies that /run
should be used for runtime variables such as locks.
The rationale for switching to use /run instead of /var/run was
because /var might not be available at early boot. Since /run is
implemented as a tmpfs and doesn't require /var to be mounted first
it can be made available earlier.
*http://refspecs.linuxfoundation.org/FHS_3.0/fhs/ch03s15.html
BUG=chromium:591366
BRANCH=none
TEST=none
Change-Id: Ic0b5ff336c1c258db8891c0a17c836497d9793c5
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/330123
Reviewed-by: Shawn N <shawnn@chromium.org>
Some systems, such as Android, do not support SysV semaphore locks.
This implements an alternative file lock mechanism using flock().
flock() was chosen because it's pretty straight forward. It's known to
be broken when using NFS, but I doubt we'll ever store our lock on an
NFS volume.
CQ-DEPEND=CL:327407,CL:325609
BUG=chrome-os-partner:49527
BRANCH=none
TEST=tested on Smaug by running mosys and ectool while reading
firmware ROM with flashrom, all three utilities eventually
ran successfully.
Change-Id: Ic73fe0281fbc1dfaae1bb03e5683774a0c04ae5b
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329430
Reviewed-by: Shawn N <shawnn@chromium.org>
This adds a couple of helper functions for working within Android:
- in_android(): Crude test that uses getenv() to see if an Android-
specific environment variable is defined.
- android_tmpdir_path(): Android doesn't have the usual locations for
temporary file storage such as /tmp or even /var/run/locks. And to
make matters worse, there isn't even a standard location for
temporary files so it must be determined at run time.
This will be used in a follow-up patch.
BUG=chrome-os-partner:49527
BRANCH=none
TEST=tested on smaug
Change-Id: Ifb5fb4067fffb7c8cb2d4350ca4a223e884d3aa5
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329299
Reviewed-by: Shawn N <shawnn@chromium.org>
This change just copies files shared between two repositories which
have changed since the last sync up. This time it is as of @CL85098.
BRANCH=none
BUG=none
TEST=the signed image boots fine on the b1 board.
Change-Id: I7a1d1b344119e6f6729a38bbea04da75f2d3371c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329407
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This commits adds support for the auto interrogation mode. The auto
mode continually scans across the console output looking for a string
that is printed upon reboot. The string is:
Console is enabled; type HELP for help
When the EC-3PO interactive console sees this string, it knows that the
current EC image is not enhanced and therefore no longer needs to
perform an interrogation after every command. Additionally, the
enhanced EC images will print a slightly different string than from
above so that the console can detect enhanced EC images as well.
By default, the console interpreter will now start up in the 'auto' mode
instead of the 'always' mode that it used to. This removes the 300ms
delay after each console command.
BUG=chromium:588611
BRANCH=None
TEST=./util/ec3po/run_tests.sh
TEST=cros lint --debug util/ec3po/console.py
TEST=cros lint --debug util/ec3po/console_unittest.py
Change-Id: Iec7ebd437ee363c2fc01b8b1adade485a0bff7a9
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/329054
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Currently, a majority of the users don't use the experimental EC console
and as it stands, they have to wait approximately 300ms after pressing
enter after every command.
This commit adds a OOBM command to change the interrogation mode.
Additionally, it allows this command to be entered from the EC console.
Usage:
interrogate <never | always | auto> [enhanced]
Type the percent key to enter the (primitive) OOBM console. From
there a user can enter 'interrogate never' followed by enter to
completely disable the interrogation that occurs.
By default, the EC-3PO console will start in the 'always' state.
BUG=None
BRANCH=None
TEST=./util/ec3po/run_tests.sh
TEST=Run cros lint --debug for all changed files.
Change-Id: I10eef0c796eab4e0af1c232a3d3da8898ba3d348
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/327035
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
These are relevant changes in the FPGA tree since the most recent sync
up.
BRANCH=none
BUG=chrome-os-partner:50141
TEST=image signed by the new signer boots successfully.
Change-Id: Id30c5da614aa5c2496305f9687bce06030449beb
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/326483
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This key matches the private key used by the chip's rom to verify the
first stage user firmware.
By virtue of the fact that this is a public key, the signer, in case
this key is used, will look for a fob storing the matching private key
to sign the read-only portion of the image.
BRANCH=none
BUG=chrome-os-partner:49950
TEST=none yet
Change-Id: I0c55d5250a354eae8294560ef7b442fee6445b4f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/326481
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Since the stm32 MCUs are programmed over the UART, we need to make
some changes to allow the interpreter to stop listening to the UART
PTY when flash_ec needs those PTYs. Otherwise, the EC-3PO interpreter
will interfere with the programming and cause the flash to fail every
time.
BUG=chromium:571170
BRANCH=None
TEST=Use flash_ec to program both veyron_jerry and samus_pd with no
interruptions.
TEST=Use flash_ec to program veyron_jerry without servod changes with
no interruptions.
CQ-DEPEND=CL:321084
CQ-DEPEND=CL:318900
Change-Id: I350fdb708d30c4ec6f18e5dc4abd621370522381
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/320629
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
- ec_response_thermal_get_threshold.value is unsigned, so it can not be
less than zero.
- make power_button_wait_for_release() take a signed int, to match its
existing usage.
BUG=None
TEST=`make buildall -j`
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ie5748df3d9904d1e417adc38fee18f8cb3ce9750
Reviewed-on: https://chromium-review.googlesource.com/325840
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit adds an Out Of Band Managament queue which will allow the
console to receive commands outside of the PTY which it can take
action on. The first use of this is to dynamically change the logging
level. Prior to this change, changing the log level using dut-control
would not affect the log level of the console or interpreter.
BUG=None
BRANCH=None
TEST=Launch modified servod; issue dut-control loglevel:debug, verify
that debug messages from both servod and ec3po are emitted. Then
issue dut-control loglevel:info and verify that no debug messages from
either are emitted.
Change-Id: I692824742b018da9540a81305985f6f355f716e6
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/325134
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
flash_ec is used for both ec chips accessed over servo, and
standalone stm32 devices. It's not necessary to have a servo
conencted to update the standalone devices over usb.
This is useful for servo v4 and servo micro.
BUG=chromium:571477
TEST=Verify servo micro/discovery can be flashed without servo v2.
BRANCH=none
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Change-Id: I9deee1616d93feeac4d6675bc3a4f573d4906f7b
Reviewed-on: https://chromium-review.googlesource.com/321925
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@google.com>
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Updated the permissions of ec_uart_pty to match the permissions of the
other PTYs.
BUG=None
BRANCH=None
TEST=cros_workon hdctools ec-devutils, run servod, ls -l on ec_uart_pty
from dut-control, verify that permissions are 666.
Change-Id: I71c72645c5a435fea562084185b80ff6d31652b4
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/321371
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
This commit adds support for the EC-3PO interpreter to disconnect and
reconnect to the EC UART. This is handy so that other tools that need
to use the raw UART directly can do so without interference from
EC-3PO.
BUG=chromium:571170
BRANCH=None
TEST=For both enhanced and non-enhanced EC images, issue disconnect
command and verify that no debug prints were emitted and no commands
were sent to the EC. Then issue reconnect and verify that the console
works as normal and that no commands were buffered.
TEST=./util/ec3po/run_tests.sh
Change-Id: Ic572e25d24d5e45fbe2eeb84a534235c4ec98d38
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/321084
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
