This allows the acpi_light sysfs entry to be populated with the actual
ALS data.
BUG=b:70290036
BRANCH=None
TEST=Flash meowth; read both illuminance values for the ALS devices
under iio and verify that they are both operational.
Change-Id: Ia22633629195d5bdeedc70a908ceca1411110b7d
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/888218
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
In the system, RT946x is always powered by the battery.
So even in battery cutoff mode, the reg values on RT946X are not reset.
We don't want RT946x to supply VBUS when DUT boots, which could mess up
PD state. So we need to disable VBUS output when RT946x initializes.
BUG=b:72228350
BRANCH=none
TEST=Confirm OPA_MODE (bit0 in reg 0x01) is clear after RT946x
finishes initialization
Change-Id: I32795b3bea64860b164c14b06aa1cd2551ebd8a0
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/890028
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
rt946x_block_read() is not implemented right.
It not only makes rt946x_init_irq() fail but also put
RT946x i2c module in an erroneous state temporarily.
BUG=b:72228350
BRANCH=none
TEST=manually on scarlet rev3:
1)Insert Plugable USB-C hub w/o AC
2)Run cutoff command on ec console
3)Hold Pwr button for a few seconds to wake up DUT
4)Repeat 2 - 3 for 10 times without seeing PD loops
Change-Id: I9304617f924e44288483afca5ab1b2923eb68ff0
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/890027
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
It's no longer necessary to call board_tcpc_init() from PD tasks, since
HOOK_INIT completion is guaranteed before the task starts. Also, calling
board_tcpc_init() for each PD task without a port arg is a bad idea.
BUG=b:72229154
BRANCH=none
TEST=`make buildall -j`
Change-Id: I6fba07771693b8343568041960a263e02775a8fc
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/881538
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
stm32f0 has 20 bytes (not 20 words) of VBAT-backed RAM. Make more
efficient use of our limited storage to prevent trying to use storage
that doesn't exist.
BUG=b:71333840
BRANCH=None
TEST=Negotiate PD, run "reboot" on scarlet EC console, verify reset path
is taken in pd_partner_port_reset().
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ie4c303b74a1b82b84ec971cdcc19c2b21a0032e7
Reviewed-on: https://chromium-review.googlesource.com/885461
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The logic of drawing as much current as possible when no battery
is connected (on the lid), and system unlocked, makes sense during
early bringup.
However, it will not work when the base is also connected, as we
did not implement the required no-battery logic in the base/lid
power allocation algorithm (nor do we plan to, as it is only
required during very early bringup, when we should not expect
power transfer between lid and base to work properly).
Also, we need to record input_voltage in
charge_set_input_current_limit, even when lid battery is not
present (yet), otherwise the algorithm gets confused and believes
no power is available.
BRANCH=none
BUG=b:71881017
TEST=Boot lux from dead battery and base connected, lux does not
attempt to drive OTG to the base.
Change-Id: I0cdd0956a82a724dbbf9c010760dcb956a58c1bf
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/874982
Reviewed-by: Shawn N <shawnn@chromium.org>
This is required to support mode-aware DPTF. Also, there is no need to
send mode change event in board specific code as that is already done
by dptf common code.
BUG=b:65467566
BRANCH=None
TEST=Verified that trip point temperatures get updated in the OS
depending upon the device mode.
Change-Id: I854628bcde755bdb1c6c1b73fbfa0948e1d7e420
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/887725
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Add BOARD_DEEP_SLEEP_DISABLED and BOARD_DETECT_AP_WITH_UART to
BOARD_ALL_PROPERTIES, so they will be updated after cr50 reboots.
BUG=b:35647982
BRANCH=cr50
TEST=test deep sleep on scarlet
Change-Id: I8999ae7c6c1dad6799b5fdb99ebf5d7618a21c2b
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/882343
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Instead of fetching static battery information all the time, we
first fetch the dynamic information, and see if the flags changed.
If they did, refetch the static information.
This also covers the cases when the base is disconnected/reconnected.
BRANCH=none
BUG=b:71881017
TEST=ectool battery 1 shows correct static battery information after
plug/unplug.
Change-Id: I936983fc0fdc4dae0494e8a24f890927e30555dc
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/872813
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
the current 50ms delay between the capture and having the image
available was working (to some definition of it) on the current boards,
but we hit issues on the next revision of the board with new sensor
silicon (and somewhat different delay), let's put a larger 200ms delay.
This will be converted to waiting for the proper MKBP event (aka
EC_MKBP_FP_IMAGE_READY) when all the boards using this feature will have
MKBP events support validated.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:71770455
TEST=run 'ectool --name=cros_fp fpcheckpixels' on different boards.
Change-Id: Id1f2402ef85c903744054b00eeab0086221b4d7b
Reviewed-on: https://chromium-review.googlesource.com/888738
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
Allow to have CONFIG_MALLOC defined for one partition and not the other.
The typical use-case is asymetric firmware whose small RO is typically
just an updater/verifier (and RW signature verification currently
doesn't like malloc as the memory initialization is done too late).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:72360575
TEST=make buildall
Change-Id: I67cc04cd11385d4c05556ea41ef674cb7a232e65
Reviewed-on: https://chromium-review.googlesource.com/885820
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
First version of the algorithm, some TODOs are left in the code
but this, generally, works reasonably well.
When charging, we allocate input current in this general order:
- Base system (fixed, low, number)
- Lid system (based on PSYS)
- Lid battery (estimating how much current the battery actually
requires)
- Base battery (similar estimation)
- Provide everything else to lid
When discharging, we generally:
- First discharge the base battery
- Then discharge the lid battery
BRANCH=none
BUG=b:71881017
TEST=Flash lux and wand, EC-EC communication works, adapter power
is split in a sensible way, and discharging works fine.
Change-Id: I8a4f87963962fc5466b2fedf1347eb4dadd35740
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/659460
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Lux base detection is a little trickier than previous bases,
as the detection levels switch around when GPIO_EC_COMM_PD gets
enabled:
- When disconnected, low levels (~550mV) mean base got connected,
and high levels (~3300mV) mean base is still disconnected.
- When connected, low levels (~43mV) mean base got disconnected,
and high levels (~2346mV) mean base is still connected.
On reset, when base_status is unknown, we enable GPIO_EC_COMM_PD,
to be able to differentiate between connected and disconnected.
BRANCH=none
BUG=b:67029560
TEST=Connect lux/wand, check that base gets detected correctly.
TEST=Type reboot in EC console, base gets detected as well.
Change-Id: I742def8e378a93c08e2dcc155b06cbca814e7fd8
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/845543
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Some chargers don't respect the SRC.Open state within the 20ms allotted by
the usb spec. The LiteOn Charger seems to notice after ~120ms bumping to
200ms so we cutoff Vbus for even ill-behaved chargers. We expect to brown
out in the sleep.
BRANCH=none
TEST=LiteOn charge will disconnect now
BUG=b:72510370
Change-Id: Ief0e999ed52f39420eed5f07432273e741a14c7e
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/886833
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
We don't want the PPC to connect the CC lines from the
TCPC to the USB connector until the TCPC resistors are
set in a valid state (SINK initially).
If we connect the CC lines (happens in the ppc_init) before
setting the resistor values, some TCPC will be toggling the
CC line between Rp/Rd since it doesn't detect a cable yet.
In the dead battery charging case, connecting the toggling
CC lines to the charger can rail the CC lines to 3.3 V signaling
to the charger to disconnect Vbus, thus browning out the board.
BRANCH=none
BUG=b:71865251
TEST=Grunt powers on via usbc p0 with and without USB hub.
Change-Id: I8e78aa2af42075398fab89a2dccef5e7df27b260
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/882305
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
This chip controls the keyboard backlight. The backlight level is set
through PWM, but the chip needs to be enabled and configured before PWM
settings are recognized. This will be initially used for grunt and
zoombini.
BUG=b:69379749
BRANCH=none
TEST=In EC console for grunt: kblight 100; kblight 0
Change-Id: I5576d709687d8f61b5757485baa239ffd6b41a74
Signed-off-by: Benjamin Gordon <bmgordon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/879082
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
The way Nautilus battery checks the conditions of CHG/DSG FETs
are slightly different from the other smart batteries we use.
So the current implementation of battery_check_disconnect() doesn't work.
BUG=b:69016914
BRANCH=none
TEST=recovery from software-based battery cutoff 10/10
Change-Id: I88de64d8da55f0b57fbdde21d4529435841bdf76
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/882941
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
There are two versions of npcx7 EVB. This CL adds the definition
BOARD_VERSION (default is 2) in board.h. So we can include different
features or set CONFIG_* flags based on the value of BOARD_VERSION to
meet the default HW configuration of npcx7 EVBs.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=Change BOARD_VERSION to 1/2; "BOARD=npcx7_evb make";
Flash the image on EVB 1/2; make sure the EVBs bootup.
Change-Id: Id4556f702af8c26778a649addde7cf490b5301fc
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/873510
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
To support CR50 deep sleep mode:
In up-sequence, SYS_RST_L needs to remain asserted on the transition
to S5 and then deasserted on the transition to S0;
In down-sequence, SYS_RST_L needs to be asserted on the transition to S5.
This only affects Scarlet.
BUG=b:35647982
BRANCH=none
TEST=minitor SYS_RST_L pin to confirm it is toggled right
Change-Id: Ic73d39c531f9d28b2087a23d58613e98ec80dbd2
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/866115
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
All init hooks complete before tasks are started (since
crrev.com/c/456628), so board_tcpc_init will finish before
the PD tasks start.
Using the init hook instead of CONFIG_USB_PD_TCPC_BOARD_INIT
avoids the problem of board_tcpc_init being called by every
PD task.
BUG=b:72229154
BRANCH=none
TEST=PD still works on grunt,
board_tcpc_init is only called once,
PD task init happens after board_tcpc_init finishes
Change-Id: Ie1263dffce06e9ea2433cc2d08d1537e4a891d40
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/879358
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This is used by the keyboard backlight driver. Add support so we can
start talking to this chip.
BUG=b:69379749
BRANCH=none
TEST=i2cscan shows a device at 0x6c on bus 4 now
Change-Id: I951ecd0fa3030f9f408ed0a4504b54950b7ca174
Signed-off-by: Benjamin Gordon <bmgordon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/879081
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Test polling for MKBP events through the kernel cros_ec/pd/fp/.. driver
node.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:69460856
TEST=run on Eve EVT:
ectool --name=cros_fp fpmode fingerdown && \
ectool --name=cros_fp waitevent 5 10000
Change-Id: Ibdec137a3b646cf017a29afcf24ff5bbfb731198
Reviewed-on: https://chromium-review.googlesource.com/806167
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Update the FP MCU interface to include a few convenient diagnostics
functions for factory testing.
It's mostly backward compatible, but overall this interface never
shipped in anything, so not a big deal regardless.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:71986991
TEST=ectool --name=cros_fp fpinfo && ectool --name=cros_fp fpcheckpixels
CQ-DEPEND=CL:*546799
Change-Id: Ic641f891ace02d79af9339cf6cb59a2960e506a7
Reviewed-on: https://chromium-review.googlesource.com/873924
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This function is no longer used because proto0 boards have been
deprecated. This function is called before I2C is initialized.
This function tries to read board info and causes watchdog to
trigger because timeout is set to zero.
BUG=none
BRANCH=none
TEST=boot Fizz. reboot by 'reboot ap-off'. Observe no watchdog reset.
Change-Id: I3bdebe4fb34dbef552fc89a170efa87d753078c0
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/879355
Reviewed-by: Randall Spangler <rspangler@chromium.org>
VSYS_PRIORITY in the register VIN_CTRL_SET is set during bd9995x
initialization to ensure VSYS remains up and stable during deeply
discharged battery conditions. However, outside of this case, this bit
should remain cleared.
If set, there the input current limit is disabled between the time
that the boost converter is enabled (USB_SUS = 0) and charging is
enabled (CHG_EN = 1). This can lead to too much current being drawn
which results in the connecting port shutting off VBUS due to its
overcurrent protection. This has been observed when attempting to
charge one DUT from another chromebook port, or with a Type C only
charger.
This CL adds a check in the bd99965x driver implementation of
charger_get_voltage() that compares the current battery voltage to
its minimum voltage. If it's higher, then it's not a deeply discharged
battery and VSYS_PRIORITY can be cleared.
BUG=chromium:69143827,71814128
BRANCH=coral,eve
TEST=Tested with 2 Coral DUTs. Verified that VSYS_PRIORITY gets
cleared when the charger state machine gets the charger
parameters. Also verified that I can repeatedly initated charging from
one Coral device to another. Without this fix, this would fail most of
the of the time. Also tested Eve with deeply discharged battery to
make sure the startup conditon still works.
Change-Id: I5230560fa98e5bf16921eb4f2c70802eb962e7f3
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/875178
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Host command handler prints every single host command except when
commands are repeated back-to-back. This patch allows each board
decide which commands should be ignored. When debug printf is
suppressed, a global counter is incremented. Developers know there
were commands processed but not reported to the console.
BUG=chromium:803955
BRANCH=none
TEST=Observe 0x97 and 0x98 were not printed. Global suppress
counter is incremented.
Change-Id: I05e8cde9039f602e8fc06c20e89b328e797bd733
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/876952
Reviewed-by: Randall Spangler <rspangler@chromium.org>
