Commit Graph

8 Commits

Author SHA1 Message Date
Randall Spangler
ad2268e739 Simplify flash protection, part 1
1. If the flash protection state is locked, RO firmware is explicitly locked.
2. Protecting flash now locks the entire flash.

BUG=chrome-os-partner:11150
TEST=manual

flashinfo -> nothing protected
flashwp now
flashinfo -> unlocked,applied; everything protected
reboot
flashinfo -> nothing protected
flashwp lock ->
flashinfo -> locked,applied; now has 40 Y's at start and 1 at end
reboot
flashinfo -> locked,applied; now has 40 Y's at start and 1 at end
remove WP screw
reboot
flashinfo -> locked, not applied; nothing protected
flashwp unlock
flashinfo -> nothing protected

Change-Id: I2cf0e8bfe82ab7a5bf88b9161b7a05b889cae71a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27717
2012-07-18 13:48:46 -07:00
Randall Spangler
acf6f963a1 Flash pre-init reboots if it needs to clear protection registers
BUG=chrome-os-partner:11171
TEST=manual

1. Clear some of the writable-bits in the flash registers
> ww 0x400fe40c 0xffff1234
write 0x400fe40c = 0xffff1234
> rw 0x400fe40c
read 0x400fe40c = 0xffff1234
2. Reset using power+refresh
3. Register should be clear again
> rw 0x400fe40c
read 0x400fe40c = 0xffffffff
4. Sysinfo should indicate reset-pin reason AND hard-reset reason
> sysinfo
Reset flags: 0x0000000a (reset-pin power-on)
5. Reset using power+refresh
6. Sysinfo should indicate reset-pin reason only
> sysinfo
Reset flags: 0x00000002 (reset-pin)
7. Clear writable-bits again
> ww 0x400fe40c 0xffff1234
write 0x400fe40c = 0xffff1234
8. Jump to another image.  This should NOT trigger a hard reset.
> sysjump A
> sysinfo
Reset flags: 0x00000402 (reset-pin sysjump)

Change-Id: Ie1d6af2acc68217bb82faae464798ee85d63d1ea
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27540
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-07-16 17:49:10 -07:00
Simon Glass
a60fdbdfcb Fix flash_dataptr() to support flash at zero
If flash starts at zero, then flash_dataptr() will return NULL for a valid
region. Change the function around so that it can be used in this case.

BUG=chrome-os-partner:10146
TEST=manual:
Modify code it print out parameters and problems, then:
Writing 256 bytes to 0x0...
0 256 64
ok 131072
Command returned error 1
> flashwrite 0 256
Writing 256 bytes to 0x0...
0 256 64
ok 131072
Command returned error 1
> flashwrite 0 255
Writing 255 bytes to 0x0...
0 255 64
Command usage/param invalid.
Usage: flashwrite offset [size]

Change-Id: I5683fc181ef780310ceff50f120735659e973784
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26749
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
2012-07-03 23:51:09 -07:00
Simon Glass
9a4eff992f flash: Provide direct flash access with flash_dataptr()
Sometimes it is useful to get access to the flash directly, without using
flash_read(). Add a function to do this.

Since the range checking is done in every function in flash_common,
use the new function to do it for us. That way we get a slight (64 byte)
code size reduction.

BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow with SPI flash emulation, in U-Boot:

See that the 32KB of flash has been provided correctly.

Change-Id: I6622a24234edaed371dd5b9bf43d1f3974d55e39
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26174
2012-07-02 22:35:51 -07:00
Randall Spangler
b70183a9bd Implement persistent flash write protect settings
This uses the last bank of flash to hold persistent settings, and
looks at the write protect GPIO to decide whether to protect the chip
at boot (chrome-os-partner:7453).

For ease of debugging, I've temporarily hacked this so flash uses the
RECOVERYn signal (dut-control goog_rec_mode:on) to enable WP instead
of the write protect signal; this works around chrome-os-partner:8580.

Also note that if you write protect any blocks even temporarily,
you'll need to do a power-on reset to clear them before you can
reprogram the flash.  See chrome-os-partner:8632.  At the EC console,
"hibernate 1" will do that, or you can just yank the power.

This also fixes a bug in the flash write and erase commands, where
they weren't properly detecting failure if you attempted to modify a
protected block (missed an interrupt reason...)

New "flashwp" console commands work.  LPC commands need reworking.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:8448
TEST=manual

Change-Id: I49c38cc25c793094ae3331a4586fda0761b4bac6
2012-04-02 10:57:03 -07:00
Randall Spangler
2a9f80d2d9 More cleanup of board/chip configs and initialization
More modules can be disabled individually through CONFIG_ defines.

Reordered early module pre-init and init, and added comments to
explain why things are ordered in main() the way they are.

Fixed a few assorted init-related bugs along the way, like st32m
keyboard scan double-initializing.

BUG=none
TEST=build link, bds, daisy

Signed-off-by: Randall Spangler <rspangler@chromium.org>

Change-Id: I04a7fa51d743adfab4be4bdddaeef68943b96dec
2012-03-19 09:04:56 -07:00
Bill Richardson
ae8dd20d77 Make all warnings into errors.
Also fix a couple places where that makes it fail.

BUG=none
TEST=none

Change-Id: I3b434b4bfa547a579193aac67c1a9d440a2c4e51
2012-02-27 15:54:00 -08:00
Randall Spangler
bdf7da5b08 Initial sources import 1/3
source files mainly done by Randall.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

Change-Id: Iaff83a842b17f3350fb6f2a3f1597ad4c29bd12a
2011-12-07 19:10:02 +00:00