Don't check if we've jumped to this image (which preserves the reboot reason,
so was causing us to re-check).
BUG=chrome-os-partner:10890
TEST=manual
1) power+refresh; should see EC print [KB boot key 0]
2) sysjump A; should NOT see [KB boot key 0]
Change-Id: I46cc60358e1d1952484f52147787fee06e4ff69f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26155
Reviewed-by: Simon Glass <sjg@chromium.org>
Keyboard scan module now owns the recovery key state on all platforms.
And clean up a few comments to linux kernel style
BUG=chrome-os-partner:10890
TEST=manual
- Power on system. Should boot normally.
- Power+Refresh+D. Should turn dev switch on.
- Power+Refresh+F. Should turn dev switch off.
- Power+Esc. Should reboot system. Power button should power on normally.
- Power+Refresh+Esc. Should power on into recovery mode.
- Then press power to shut system down.
- Power button should power on normally (not back into recovery mode).
Change-Id: I4d16e1e8b039efeacbd41e8acec115844bc8457d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26147
Reviewed-by: Simon Glass <sjg@chromium.org>
And if RW B isn't enabled, it's not even linked.
BUG=chrome-os-partner:10881
TEST=on link, should be no B image, and 'sysjump B' should fail
On BDS, still should be A and B images
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: Icb2af07881cc7e28b9b877f45824486a22fde8d7
Reviewed-on: https://gerrit.chromium.org/gerrit/26116
panic_putc was doing an infinite loop on platforms with a UART FIFO.
(e.g. LM4F)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:10825
TEST=on Link EVT and Lucas DVT, type "rw 1" in the EC serial console and
see the panic trace.
Change-Id: I47f43183e6e938b88874c80244430ddf88c5a567
Reviewed-on: https://gerrit.chromium.org/gerrit/26052
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
EC computes a SHA-256 hash of its RW code on boot. Also adds host and
console commands to tell the EC to recompute the hash, or hash a
different section of flash memory.
BUG=chrome-os-partner:10777
TEST=manual
1) ectool echash -> should match what the EC precomputed
2a) ectool echash recalc 0 0x10000 5
2b) on EC console, 'hash 0 0x10000 5'
2c) results should agree
3a) on ec console, 'hash 0 0x3e000' then quickly 'hash abort'
3b) ectool echash -> status should be unavailable
4) ectool echash start 0 0x3e000 6 && ectool echash && ectool echash abort && sleep 2 && ectool echash
status should be busy, then unavailable
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I6806d7b4d4dca3a74f476092551b4dba875d558e
Reviewed-on: https://gerrit.chromium.org/gerrit/26023
This ensures the keyboard backlight will go off even if the chipset
shuts down due to overheating (or some other unclean shutdown).
(Also fixes inter-function line spacing to linux kernel coding style
and reformats a few comments.)
BUG=chrome-os-partner:10718
TEST=manual
1. power on system
2. turn on keyboard backlight (kblight 100 at EC console)
3. power off system (for example, via power button)
4. keyboard backlight should turn off
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I5bbcd1681ae9c972c9875e9c720617bdf51e3d64
Reviewed-on: https://gerrit.chromium.org/gerrit/26039
At this point, EC code requires EVT. If you still have a proto1,
here's what'll break:
1) Keyboard recovery mode checks refresh key, and may read unreliably due
to proto1 silego reset circuit.
2) Lightbar may not start in the correct state.
3) EC 'hibernate' command will not work.
4) Board version may read incorrectly.
BUG=chrome-os-partner:9661
TEST=manual
1) powerbtn -> system powers on, lightbar displays proper sequence
2) version -> board version 1 (EVT)
3) power+refresh+esc -> system boots into recovery mode
4) power+refresh, then power button -> system reboots, then boots normally
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I699946e365d15ae38622b69da1a0241e72d05f61
Reviewed-on: https://gerrit.chromium.org/gerrit/26053
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
When copying .data section from flash to internal RAM at startup, we
assume the content of the section is aligned on a word size in flash.
Force the alignment in the linker file.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:10823
TEST=on Link EVT, type "sysjump RO" in EC console and see you are
jumping to RO partition and not getting a watchdog reset.
Change-Id: I1a1387ef8bff01d287d85ee2a660811c9e4620c6
Reviewed-on: https://gerrit.chromium.org/gerrit/26032
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
A host command to set fan duty cycle is recently added and mock PWM
module doesn't provide the implementation. This breaks our unit test.
Let's fix this.
BUG=chrome-os-partner:10820
TEST='thermal' unit test passed.
Change-Id: I8644742cfec7d2112d7ff1e266b5ac3429c46945
Reviewed-on: https://gerrit.chromium.org/gerrit/26019
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
This forces the fan PWM duty cycle to a fixed percentage (0-100). It's only
used for airflow testing.
BUG=chrome-os-partner:10747
TEST=manual
Using this ectool, try
ectool fanduty 0
ectool pwmgetfanrpm
ectool fanduty 50
ectool pwmgetfanrpm
ectool fanduty 100
ectool pwmgetfanrpm
You should see (and hear) the fan speed up. If you have an EC console, you
can run
faninfo
and it should show that the 'Target:' is unrelated to the 'Actual:' value.
Change-Id: Iac332fb3ba63f96726cf7f64061b3ce22d2e76fd
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25965
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Update a couple of IR3571 settings :
- remove the PS override bit which is a leftover from the debug session.
- modify VR_READY and CODE REV
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:10171
TEST=run several Link EVT with this EC and check we have no kernel
warnings.
Change-Id: I873dc23ddb3ff8ac9fcdf24cd769414cb12689e5
Reviewed-on: https://gerrit.chromium.org/gerrit/25967
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
If the EC shares the I2C-2 bus with the battery and the charger, we
don't want to be a master on that bus when the AP is ON and can send us
I2C messages.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=none
TEST=on Lucas DVT, check we can read battery info when AP is OFF and we
cannot when AP is ON.
Change-Id: I920a10ae9eff31bd00e4d3a5aec19d6f03b65a33
Reviewed-on: https://gerrit.chromium.org/gerrit/25959
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
add function read/write the IR3570/71 voltage regulator settings.
This includes new settings for the IR3571 to avoid the freeze observed
on new Link boards.
Currently, these settings are not flashed permanently inside the IR3571,
they are just applied at CPU startup (when the VR powered).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:10171
TEST=on Link EVT, check in the kernel log that we are longer seeing the
warnings from the GPU driver and the jankyness.
on Link proto-1, check the IR chip version detection.
Change-Id: I0781f5285aac7a9f03c7c4eb953bf97273c6d404
Reviewed-on: https://gerrit.chromium.org/gerrit/24674
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Put the power LED in the right state (off, on, breathing) depending on
the AP state (off, running, suspending).
The power LED is connected to GPIO B3.
The AP suspend detection is done through GPIO A7.
(so we no longer configure it as SPI alternate function)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:10647
TEST=on Lucas DVT, boot/stop the board and see the LED on and off.
Change-Id: I42121aacab35e9da7a751dc9f56bcc5af7850783
Reviewed-on: https://gerrit.chromium.org/gerrit/25880
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
This sensor doesn't provide accurate case temperature. Let's
disable thermal thresholds for the object tempearture reading from this
sensor.
BUG=chrome-os-partner:9599
TEST=Build success. System works fine.
Change-Id: I9408de59a3349f944c5e215085da93f23965ebc9
Reviewed-on: https://gerrit.chromium.org/gerrit/25824
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
These options are useful for devs, so enable them.
BUG=none
TEST=manual:
build and boot on snow; See that the taskinfo command now shows non-zero
data. Type help and see command help.
Change-Id: I6bba1cc22498924ea6f151f2fe7e819ae7560e3c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25414
In addition to ASSERT(), it might be useful to panic() sometimes, so add
a tidy way of doing it which will print a message and reset.
BUG=chrome-os-partner:10149
TEST=manual
Build a special version for snow where the 'rw' command calls panic()
See that a message is produced:
> rw 0
read 0x0 = 0x20001048
** PANIC: Address is 0
Change-Id: I4512c0193f4c1d52d0c256b2deefacf551056fd9
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25413
We want our friendly ASSERT() messages.
BUG=chrome-os-partner:10149
TEST=manual
Enable the option for snow, add a failing ASSERT() to the rw command
and see the a nice message is printed now.
Change-Id: I84587b209dc4a9d72310456ed2aca178256c5811
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25412
BUG=chrome-os-partner:10747
TEST=manual
Boot the CPU (the fan is off otherwise). From the EC console run
faninfo
It should show the fan duty cycle changing to maintain a specific RPM.
Run
fanduty 50
faninfo
Now the fan duty cycle should be fixed around 50%.
Change-Id: I13e4b0a7e5b2661769d64bf93342483d0419545d
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25900
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Rather than just reset the board, report assertion failures to aid
debugging. To enable this, use CONFIG_ASSERT_HELP.
BUG=chrome-os-partner:10149
TEST=manual
Enable the option for snow, add a failing ASSERT() to the rw command
and see the a nice message is printed now.
ASSERTION FAILURE 'address' in command_read_word() at common/memory_commands.c:00000037
Change-Id: Ice59434c5daf610832dd0e1fcfa5630dc847bb67
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25411
Also removes unused recovery request, since AP handles that internally now.
BUG=chrome-os-partner:10685
TEST=manual. From root shell,
ectool reboot_ec RO -> EC reboots to RO, AP stays up
ectool reboot_ec A -> EC reboots to A, AP stays up
ectool reboot_ec cold -> EC reboots, AP shuts down
ectool reboot_ec cold at-shutdown -> (EC stores request, but doesn't reboot)
shutdown -P now -> EC reboots when AP shuts down
ectool reboot_ec cold at-shutdown -> (EC stores request, but doesn't reboot)
ectool reboot_ec cancel -> (EC stores cancel-request)
shutdown -P now -> AP shuts down, but EC doesn't reboot
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I51bbf997f6b7f94fe61f06a8a1804c3cc5c319b8
Reviewed-on: https://gerrit.chromium.org/gerrit/25791
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add this option to make panics easier to decode.
Also put panics in a new stack for snow.
BUG=chrome-os-partner:10146
TEST=manual:
build for all boards
On snow, cause a panic and see that it is reported correctly.
Change-Id: If0b90ec0cec4ccb10041bd12bc21b342581e7f62
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24506
This change is picked from daisy change:
I70f66581d0e921c83bc2051b2a521b332e18aa50
It should be reverted after rework all dev boards to new I2C config.
Issue filed against this hack: http://crosbug.com/p/10622
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:10622
TEST=manual
Console commands:
'i2c r 0x90 4' - single byte pmu read
'battery' - double bytes battery read
Change-Id: I3185d872dc5ef6673fcd7efddf8394fe73f11813
Reviewed-on: https://gerrit.chromium.org/gerrit/25743
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
This change adds battery and PMU driver to snow board configuration.
Charging is enabled in init function. EC I2C host is set to I2C2.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:10608
TEST=manual
Run uart console command 'i2c r 0x90 4'.
Change-Id: Ie09749c33c6093a46ba0ea44d42910417a67f37a
Reviewed-on: https://gerrit.chromium.org/gerrit/25501
Tested-by: Rong Chang <rongchang@chromium.org>
Commit-Ready: Rong Chang <rongchang@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Lack of this command could make u-boot pc_keyb.c failed to init (see
lines around line 143 of u-boot/files/drivers/input/pc_keyb.c).
static char * kbd_initialize(void)
{
...
kbd_write_command_w(KBD_CCMD_KBD_TEST);
if (kbd_wait_for_input() != 0x00)
return "Kbd: interface failed self test";
Change-Id: I0a906e0ee4419be74a79ce983c025ce42f02cb81
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
BUG=chrome-os-partner:10358
TEST=tested on link.
Reviewed-on: https://gerrit.chromium.org/gerrit/25619
Reviewed-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
The fault status registers sometimes have useful information, so provide
an option to display these.
This adds about 1KB to the code size.
BUG=chrome-os-partner:10146
TEST=manual:
build for all boards
On snow, cause a panic and see that it is reported correctly.
=== EXCEPTION: 03 ====== xPSR: 01000000 ===========
r0 :0000000b r1 :00000047 r2 :60000000 r3 :200013dd
r4 :00000000 r5 :080053f4 r6 :200013d0 r7 :00000002
r8 :00000000 r9 :200013de r10:00000000 r11:00000000
r12:00000000 sp :200009a0 lr :08002b85 pc :08003a8a
Precise data bus error, Forced hard fault, Vector catch, bfar = 60000000
mmfs = 00008200, shcsr = 00000000, hfsr = 40000000, dfsr = 00000008
Change-Id: I1a18c85ee63760502c92b300f5a87e57468469a5
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24505
Reviewed-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:10662
TEST=manual
1) Boot system with power+esc+refresh. gpioget ENTERING_RW --> 0
2) reboot, then gpioget ENTERING_RW --> 1
3) Check EC_IN_RW signal on AP, if possible
Change-Id: I9de43eecf71654bf337d7a0e8b21f0cbcf386cc7
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25624
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This change is a temperary hack. And it should be reverted after
finalize daisy board design.
The host port on daisy can be configured as I2C1 or I2C2. PMU is
connected directly to the host port, hence the host port can be
detected. This change unifies ec firmware image for different I2C
configurations.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:10612
TEST=manual
Build daisy ec firmware. Flash it to daisy boards with different
I2C port config. Check uart console commands:
'i2c r 0x90 4' - single byte pmu read
'battery' - double bytes battery read
Change-Id: I70f66581d0e921c83bc2051b2a521b332e18aa50
Reviewed-on: https://gerrit.chromium.org/gerrit/25502
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Mark Hayter <mdhayter@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
The script ensures that the servo parameters are correct,
and restores original servo parameters afterwards.
Daisy EC flashing works from the build tree :
./util/flash_ec --board=daisy --ro
The Link flashing is using the new openOCD 0.5.0 in the chroot.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=./util/flash_ec --board=snow --ro
./util/flash_ec --board=link
Change-Id: Ifc87a8d21a5dac6ad8c4a0fb38694aa5f5bbf992
Reviewed-on: https://gerrit.chromium.org/gerrit/21664
Reviewed-by: Luigi Semenzato <semenzato@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
1) Smaller start delay for commands
2) Reads can use the entire 128 byte parameter space
This improves read speed from 350ms/64kb to 210ms/64kb.
BUG=none
TEST=ectool flashread 81920 81920 then compare with ec.A.bin
Change-Id: I53d460bace5f21db845a3f8ec681507fca0f7b0e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25562
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The flash commands syntax has slightly evolved
and the watchdog needs to be switched off even though we are doing a
reset halt.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:7420
TEST=flash Link EC using OpenOCD inside the chroot:
sudo USE="ftdi" emerge openocd
sudo openocd -f chip/lm4/servo_v2.cfg
flash_link
Change-Id: Ieef5df682a945646525267a7b702e953796f3f00
Reviewed-on: https://gerrit.chromium.org/gerrit/25561
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chromium-os:31902
TEST=manual
1. reboot ec
2. port80; nothing there
3. powerbtn
4. retype port80 repeatedly during boot and see it fill and then scroll
Change-Id: Id227d5debbdd635332ed2f42bc0f163833031b5c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25442
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
For particularly nasty errors the stack or stack pointer may be corrupt,
or in a place that we do not want overwritten. Provide and option to
place the stack in a fresh place, assuming you can reach exception_panic().
Note that exception_panic() does not write anything to stack itself.
BUG=chrome-os-partner:10146
TEST=manual:
build for all boards
On snow, cause a panic and see that it is reported correctly.
Change-Id: I21d8b9bb12455758309d54ef20de66640d8a2df6
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24504
Rather than just reset with no information when we hit a watchdog, try
to anticipate the problem and display a trace message as on lm4.
This solution is not ideal since we must constantly reset the WWDG to make
it work. It may be better to look at dedicating a timer to this purpose
instead, since we are really just shadowing the IWDG and don't actually
need the reset functionality.
One problem is that we now have a fairly short time limit on many
operations, since if we can't service an interrupt within about 30ms then
the WWDG will reset the system.
It also affects JTAG since it seems that the watchdog goes off the first
time JTAG is invoked to program the flash. The solution here is to retry.
For these reasons it is implemented as an option, CONFIG_WATCHDOG_HELP.
BUG=chrome-os-partner:10145
TEST=manual:
build for all boards
On snow:
> waitms 500
See that there is no message
> waitms 1300
Time: 0x0000000000733ba3 us
Deadline: 0x00000000006b6db2 -> -0.511473 s from now
Active timers:
Task Ready Name Events Time (s)
0 R << idle >> 00000000 0.000000
1 R WATCHDOG 80000000 0.000000
2 KEYSCAN 00000000 0.000000
3 GAIAPOWER 00000000 0.000000
4 R CONSOLE 00000000 0.000000
5 HOSTCMD 00000000 0.000000
--- UART initialized after reboot ---
[Reset cause: watchdog]
[Image: RO, snow_v1.1.32-8c00326-dirty 2012-06-03 07:54:29 sjg@sglass.mtv.corp.google.com]
done
Change-Id: I042fcc9ecd9c21210ea3826ca69c943aab949d1f
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24398
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
We want this function to be available for all chips, so move it into a
generic place.
The task_disable_irq() from the LM4 version can be left in
watchdog_check(), to keep the watchdog_trace() function generic.
BUG=chrome-os-partner:10145
TEST=build for all boards
Change-Id: I98c60ce5958f1498b84a233ef04290a68a7838c5
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24397
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(And maybe other keyboard status in the future...)
BUG=chrome-os-partner:10358
TEST=manual
reboot
kbd -> should show disabled
power on system, wait for it to boot
ctrl+alt+F2 -> should be able to type at console
kbd -> should show enabled
kbd disable -> should no longer be able to type at console
kbd enable -> should again be able to type at console
Change-Id: Icdb38b09f318a47b0413609294b44cd810e8f389
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25353
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Tested-by: Bill Richardson <wfrichar@chromium.org>
