Matches definitons set in
chromium/chromeos/accelerometer/accelerometer_types.h.
Using that standard, the coordinate frames of the lid and base DO NOT
line up perfectly when the lid is fully closed or fully open.
Therefore, rotate the lid vector 180 along the X axis before
calculating the lid angle.
BRANCH=cyan
BUG=chrome-os-partner:40177
TEST=When the device is open 180 degrees, check the sensors
agree with each other:
Flat on the back (Z pointing to the sky):
localhost devices # cat */*raw
-1008 [keyboard : X]
-112 [keyboard : Y]
16544 [kyeboard : Z]
-256 [lid : X ]
2000 [lid : Y ]
16336 [lid : Z ]
On the right side (X pointing to the ground)
localhost devices # cat */*raw
-16928
-48
-1040
-16176
432
80
On the bottom edge (Y pointing to the sky)
localhost devices # cat */*raw
-192
15872
1648
496
15936
752
Check the angle as calculated by the EC is correct using accelinfo.
Change-Id: Ib8ee42da8cf818213f892b1f024253f37a4da488
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294716
Reviewed-by: Jonathan Ross <jonross@chromium.org>
Reviewed-by: Eric Caruso <ejcaruso@chromium.org>
PD charger voltage + current can now be limited with
EC_CMD_EXTERNAL_POWER_LIMIT. The limit is automatically cleared when the
AP transitions out of S0 into S3 / suspend.
BUG=chrome-os-partner:43285
TEST=Manual on Samus w/ zinger.
- Plug zinger, verify charging at 20V/3A.
- `ectool extpwrlimit 3000 12000 --dev=1`, verify charging at 12V/3A
- `ectool extpwrlimit 1000 5000 --dev=1`, verify charging at 5V/1A
- Plug zinger into other port, verify still charging at 5V/1A
- `powerd_dbus_suspend`, verify charging at 20V/3A
- `chglim 2000 12000`, verify charging at 12V/2A
- `ectool extpwrlimit 0xffff 0xffff --dev=1`, verify charging at 20V/3A
- `chglim 1000 20000`, verify charging at 20V/1A
- `chglim`, verify charging at 20V/3A
BRANCH=ryu
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6cd5377be91b3df75f99cb414fd3fa5a463b56cb
Reviewed-on: https://chromium-review.googlesource.com/293954
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When building components from external libraries, instead of
rsyncing the library into our build directory and building there,
just build in the library directory and have it put its generated
objects into our build tree. That will keep any build artifacts
in the library directory from polluting our builds unexpectedly.
BUG=chrome-os-partner:43025
BRANCH=none
TEST=make buildall
Change-Id: I2f07a2b49d1a0ba9fd9fff0822551486be820b70
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295044
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Oak board revisions are not global configs. Move them out of
include/config.h . This change also makes it easier to build EC
and PD image for different board revisions.
BRANCH=none
BUG=none
TEST=manual
build for board revision n and load on oak:
make BOARD=oak clean
make BOARD=oak_pd claen
make EXTRA_CFLAGS=-DBOARD_REV=n BOARD=oak -j
make EXTRA_CFLAGS=-DBOARD_REV=n BOARD=oak_pd -j
Change-Id: I331b4c5a1af94b179d7c6f7878a9c3939ea6025a
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294441
Reviewed-by: Shawn N <shawnn@chromium.org>
Oak doesn't have enough interrupt pins to detect VBUS change. This CL
enables oak TCPM power status alert.
BRANCH=none
BUG=chrome-os-partner:41226
BUG=chrome-os-partner:42610
TEST=manual
load on oak rev2. plug in normal type-c charger or legacy type-c
chargers and check charging status.
Change-Id: I9659e749b515f999fe9e81373567f52ec3fe956a
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291161
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
BUG=none
TEST=Used "shutdown -h now" Kernel console command to test on Kunimitsu.
With only battery after 1 hour, device enters to Pseudo G3 and the
V3p3A is off. With AC connected, device is in G3.
BRANCH=none
Change-Id: I955662eb69ac608e9b2d12bdcfbc1258ca83f3a5
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/292976
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Modified i2c driver into controllers and ports to support I2C0 port 0/1 at
the same time.
Modified drivers:
1. i2c.c: Support i2c controller mechanism and fixed bug for i2c_raw functions
used by i2c_wedge and i2c_unwedge.
2. gpio.c: Fixed bug for gpio_alt_sel since wrong type of func.
3. lpc.c: Fixed bug for port80. Since disabling SUPPORT_P80_SEG, we should
replace GLUE_SDP0/1 with DP80BUF.
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: I9919269e4f5e795d9ceb8a4cd2c39abbd7bb6b1a
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/294015
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The BATLOW_L signal is externally pulled up to PP3300_DSW.
Therefore, there's no need to pull this up internally to
the EC's rail. Additionally, allow BATLOW_L to be high
by default as a forthcoming power sequencing change doesn't
utilize the BATLOW_L signal.
BUG=chrome-os-partner:44081
BUG=chrome-os-partner:44082
BUG=chrome-os-partner:43475
BRANCH=None
TEST=Built and booted glados.
Change-Id: I175408d64b728cacc3f6a305680962fe0320eeb9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/293843
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
The SLP_S0_L signal lives in the primary power well of skylake
while the EC's VCC is on the DSW rail. If SLP_S0_L is pulled up
then there is leakage into the primary well when it's not on.
BUG=chrome-os-partner:44098
BRANCH=None
TEST=Built and booted glados. Default powerindebug state shows SLP_S0_L
low when in deep sleep states.
Change-Id: If9c7972fb6a8b8f90738c1c0f7eea6cf2373d64b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/293842
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Switch to V2 glados as the default, and remove support for V1.
BUG=chrome-os-partner:43075
TEST=`make buildall -j`
BRANCH=None
Change-Id: I58f33225177d259916e8877084c2c431922e7bc5
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/293303
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This patch syncs up TPM2 sources into the build area when building
cr50 image. This relies on a specific directory layout so that the ec
makefile has access to the tpm2 source tree.
The sources are copied using rsync, the tpm2 library is a dependency
for the RO/RW elf images, and is declared to be a phony make target,
which guarantees that the tpm2 make is always run when cr50 image is
built.
Include files in board/cr50/tpm2 are necessary to be able to build
tpm2 code using the bare metal toolchain used for building ec code.
memory.h is in fact empty, it is easier to add it here than to wrap it
in conditional compilation at the source.
Make variables CROSS_COMPILE and CFLAGS are exported for the benefit
of the tpm2 makefile. ROOTDIR indicates where tpm2 library should look
for .h files not available from the toolchain.
CQ-DEPEND=CL:292946
BRANCH=none
BUG=chrome-os-partner:43025
TEST=make buildall -j succeeds;
when linked with the latest tpm2 source, the combined image
starts the tmp task and reacts to the host sending the startup
command (failing due to unplugged stubs).
Change-Id: Ia3fd260588558c2bacd724df9583052fa4660ca3
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/292975
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
TPM command processing should not be happening on the interrupt
context.
This patch adds a skeleton of the task which handles TPM functions. It
initializes the TPM and then enters endless loop waiting for an event
trigger from interrupt, which happens when a valid FIFO message is
received.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=none yet
Change-Id: I63dce2762cc07370a05bf00bdf144c5d9eb6019b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289332
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
bug: when typing
> tw bufrd 3 2
in twinkie console, the command will output 3 elements
However, the third argument(3) is where it starts output
the elements; and the fourth argument(2) is the number
of elements to be printed.
Original code uses: "cnt = strtoi(argv[0], &e, 10);" to
get the count.
It should use "cnt = strtoi(argv[1], &e, 10);" instead.
Signed-off-by: Dawei Li <daweili@google.com>
Change-Id: I04cf041e47cdf72c5189e4b8446c8f8e4cc5e2e5
Reviewed-on: https://chromium-review.googlesource.com/293561
Tested-by: Dawei Li <daweili@google.com>
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Commit-Queue: Sheng-liang Song <ssl@chromium.org>
With the recent changes to the build system, RW objects are located in
the RW/ subdirectory of the output build directory. This commit fixes
the build for the variant.
BRANCH=None
BUG=chrome-os-partner:43965
TEST=./board/twinkie/build_rw_variant; build is successful.
Change-Id: Ifab1994e6e368cc61784df7358c59b7ebd87e67c
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/293344
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Dawei Li <daweili@google.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
- PMIC init can be called from HOOK_INIT now that this happens after the
scheduler has started.
- There's no need to re-initialize the PMIC on sysjump
BUG=None
TEST=Verify glados boots to S0
BRANCH=None
Change-Id: I1839e1bd357759ae2800d812b27bf4e0cd7772b4
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/293012
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Symbolic link kunimitsu_pd to glados_pd folder. Disable PD test
build until issue is fixed.
BUG=chrome-os-partner:43142
TEST=emerge-kunimitsu chromeos-ec and check EC and PD binaries
Change-Id: Ic0f1d73246333d8ec7752bb4c42b1c0ac220b5c3
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/292841
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
`tests` build was previously disabled for glados due to errors building
power/skylake.c. Properly undef the chipset config to make `tests` work
for all skylake platforms.
BUG=None
TEST=`make BOARD=glados tests`
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I7a730cdd5e30a932ff0cd1f3beef77873b9e0630
Reviewed-on: https://chromium-review.googlesource.com/292910
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Use new board-level hibernate GPIO state function to turn off LEDs in
hibernate.
BUG=chrome-os-partner:43807
TEST=Manual on Glados with subsequent commit. Run 'hibernate' on console,
verify that LED remains off. Press power button, verify that board wakes.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Id695df9b5e75514f8f807a894b63f71676b66f92
Reviewed-on: https://chromium-review.googlesource.com/292317
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The new FPGA version adds a lot of few features, while temporarily
cutting off some existing capabilities like clocking configuration
(hardwared clocks used instead), pinmux assignment for SPS interface
(hardwared connections used), etc.
This patch removes some now unused code, modifies some configuration
items and adds TODO_FGPA comment blocks highlighting code which needs
to be reviews next time FPGA version changes).
The new register definitions file is derived from hardware
description.
BRANCH=none
BUG=chrome-os-partner:43791
TEST=with these changes in place the B1 board boots to the console
prompt.
Change-Id: I78ec6b2831a44cbfd40ee726a5d3c2cc11bf2cfa
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291855
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
CONFIG_USB is a better indicator that USB related code needs to be
included.
BRANCH=none
BUG=none
TEST=none - this patch helped compartmentnalize the code when
debugging bringup on a new platform.
Change-Id: I12ef77325591853d73e2e09f7c491954e272bde9
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291854
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Enabled lid angle calculation. Clamshell/Tablet mode is decided by lid angle.
Accelerometers are set to be active in S3 also.
Trackpad is enabled/disabled by GPIO TP_INT_DISABLE.
Keyboard scan and trackpad are enabled in clamshell mode and disabled in
tablet mode.
Removed enable_keyboard() since keyboard is enabled in clamshell S0 and
S3.
BUG=chrome-os-partner:41353
TEST=Verify in clamshell mode, system can be waken up from S3 by keyboard/trackpad;
And not tablet mode.
BRANCH=None
Change-Id: Ic5fb5a562e8426288eae2fb9815a213fe5033955
Signed-off-by: li feng <li1.feng@intel.com>
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287341
Reviewed-by: Shawn N <shawnn@chromium.org>
This gives a test case for the USART driver on an STM32L. Eventually
this will be a good place to test that even in a downclocked configuration
the STM32L USART driver can handle 115200 without dropping characters.
This also gives a convenient build test for the STM32L version of the
USART driver.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Cross connect a Discovery and a Discovery-stm32f072
Change-Id: Ifb8dfc1179e8a0be84390d36e0bc3ff15f4f4685
Reviewed-on: https://chromium-review.googlesource.com/288979
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Implement LED control for glados for both red and green LED.
BUG=chrome-os-partner:40848
BRANCH=none
TEST=Manually tested on glados with following commands:
ectool led battery red
ectool led battery green
ectool led battery off
Change-Id: I1b4f8c8c8f26779a11185ea8bbc6536d1d7f97b1
Signed-off-by: Mike Hsieh <mike.m.hsieh@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/289439
Reviewed-by: Shawn N <shawnn@chromium.org>
Now that v3 support is in the cros_ec kernel driver and depthcharge,
deprecate support for the old v2 protocol. At some point in the future,
support for the v2 protocol will dropped entirely.
Boards that require support for the V2 protocol should enable the
following config option.
#define CONFIG_SPI_PROTOCOL_V2
BUG=chrome-os-partner:20533
BRANCH=None
TEST=make -j buildall tests
TEST=Flash jerry, AP & EC boot successful.
TEST=`ectool protoinfo` shows only version 3 supported on jerry.
TEST=Flashrom still works on jerry.
Change-Id: I72d3aee00879314b936cc0b1002c9883550b1f1a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/291411
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Move common USB charger code out of board directory including
setting VBUS supplier when VBUS changes, and initializing BC1.2
supplier types on init.
This also enables re-enabling of Pericom BC1.2 detection interrupts
when VBUS is changed on all boards that use USB_CHG task.
BUG=chrome-os-partner:42292
BRANCH=none
TEST=make -j buildall. Tested on glados and samus by plugging in
a few different chargers and making sure we charge.
Change-Id: Ib102fbf7a6aace998e6fcb6d35f3c97e5f03f5c2
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290453
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Oak rev3 has 2 dual-color LEDs to indicate the AP power & battery
status. The behavior has been redefined and distinguish from rev2
by board version API.
BRANCH=none
BUG=none
TEST=manual
1. define CONFIG_BOARD_OAK_REV_2 in board.h
make -j BOARD=oak
2. define CONFIG_BOARD_OAK_REV_3 in board.h
make -j BOARD=oak
both cases should be built successfully.
And Check the PWR & BAT LED.
Change-Id: Ic60d6f91002c3534e4c12a27e5c89bc2d0a1ecfd
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/290061
Reviewed-by: Rong Chang <rongchang@chromium.org>
Configure boards whose chipset cannot be a USB UFP to disconnect
USB lanes when the data role is UFP.
BUG=none
BRANCH=strago
TEST=make -j buildall. tested on glados by adding ccprintf to
usb_charger_set_switches(). verified when we are DFP, USB 2
switches are connected and when we are UFP, they are disconnected.
Change-Id: Ic8c817a0cc21b56ee67239e8cc81d5cbbda8d4de
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290422
Reviewed-by: Shawn N <shawnn@chromium.org>
Modify the GPIO seeting according to the Oak rev3 schematic.
BRANCH=none
BUG=none
TEST=manual
1. define CONFIG_BOARD_OAK_REV_2 in board.h
make -j BOARD=oak
2. define CONFIG_BOARD_OAK_REV_3 in board.h
make -j BOARD=oak
both cases should be built successfully.
Change-Id: I0336624a5a2d356a4c2eb9ffb812ebffb4f5f7c3
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/289475
Reviewed-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:42156
TEST=Manual on Glados. Boot to S0, run "temps". Verify that temperatures
start around 28C and begin to increase after system is powered-on for a long
duration.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I3bebba4864c8e5b5b23e78947522e58311298bbd
Reviewed-on: https://chromium-review.googlesource.com/289936
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Don't enable try.src when battery is not present or <1% because
try.src will temporarily cut off power to system.
BUG=chrome-os-partner:43413
BRANCH=samus
TEST=tested on samus using "battfake" ec command. when battery
<1%, verified that try.src is disabled and when battery >=1% and
the AP is on (dual-role toggling is on), then try.src is enabled.
verified boot without battery succeeds on samus and glados.
Change-Id: I64816bb7c9669bfeca61687bcd9a48da32e67945
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289854
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Now that HOOK_INIT hooks are called from a task switching context, most
calls to task_start_called() should no longer be needed. This commit
removes them.
BRANCH=None
BUG=chrome-os-partner:27226
TEST=make -j buildall tests
TEST=Flash EC image onto samus and verify EC boot, AP boot, keyboard,
lid, and tap-for-battery all functional.
TEST=Flash EC image onto samus_pd and verify charging still works.
TEST=Flash EC image onto ryu(P3) and verify that EC boot.
TEST=Added ASSERT(task_start_called()) to the places where I removed
task_start_called(). Booted samus, samus_pd, cyan, and ryu with AC
inserted and verified that no ASSERT's were hit upon boot.
Change-Id: Ic12c61862e85ca3a0a295beedbb4eeee6d5e515b
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/285635
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Inhibit AP power-on through the BATLOW pin, even if the system is
unprotected, until our charger and current limit are initialized.
Note that this feature is only functional on glados v2 since other
skylake boards do not have BATLOW connected.
BUG=chrome-os-partner:41258
TEST=Manual on glados v1 with rework. Remove battery and attach Zinger.
Verify EC powers on and AP doesn't boot. Run `powerbtn`, verify that AP
boots. Remove all power and attach battery, verify that EC powers on
and AP boots. Also verify compilation on glados v2.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I55de857f7006777640f7853b7bde98ba97e8bd13
Reviewed-on: https://chromium-review.googlesource.com/287378
The AC presence input from the charger only goes to the EC and it
needs to provide this signal to the PCH. At init time it is set to
the current value and whenever the status changes it will be updated.
This is used by PCH internal logic to determine whether to transition
into Deep S3/S5 as those are not intended to be used when running on
AC power.
This is similar to how it worked on Samus except since the EC is off
in G3 we don't need to force it low in that state and since there
are not yet any additional hacks/workarounds here we can just do the
work in a simple HOOK_AC_CHANGE handler.
BUG=chrome-os-partner:41885
BRANCH=none
TEST=boot on glados and verify PCH_ACOK is asserted when the device
starts to charge and is deasserted when no cable is connected.
Change-Id: Id7e6ca674e35c98594d09b86ab5bdf518f8b3984
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288922
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Remove the last pieces of external Sensor Hub support:
- Sensor hub UART exported over case closed debugging
- Sensor hub related GPIOs
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:38333
TEST=plug Suzy-Q to Smaug and test debug UARTs and SPI flashing
Change-Id: I47b42f63647735bae37b9256e2704303c48b5854
Reviewed-on: https://chromium-review.googlesource.com/290115
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
boards version 6 / 7 / 8 have an I2C bus to sensors.
board version 0+ has a SPI bus to sensors
On board v0, enable 3rd SPI port and use it to accel the accelerometer.
BRANCH=smaug
BUG=chrome-os-partner:42304
TEST=Check accel on SPI enabled Ryu board,
on v7 and v0 boards, check closed case debugging and type-C features
Change-Id: Ic8de2bb0f9d8a15f86a2c1ea98ef27613f090b22
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289960
Enable 3rd SPI port and use it to accel the accelerometer.
BRANCH=smaug
BUG=chrome-os-partner:42304
TEST=Check accel on SPI enabled Ryu board.
Change-Id: If17eff36e2a3ea0fe59d6677aa41ba5f802e33b6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288516
We are very close from the current limit (456 bytes).
Increase the limit to 640 bytes.
BRANCH=smaug
TEST=Hit the limit while debugging, check the new limit.
BUG=none
Change-Id: I6673000bcac48b88599082eb797f0782c4fee454
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289837
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Oak takes power from type-C charger. The default input current limit
should set to 512mA default, not the maximum current for battery
charging.
BRANCH=none
BUG=none
TEST=manual
load on oak and plug an empty battery. check EC uart console on PD
state change when plug type-C charger.
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I113fea5ff1e8afc053f76c21820f202e4b3edfec
Reviewed-on: https://chromium-review.googlesource.com/287610
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
