Add a mask of custom events reserved for IRQ based sensors.
Copy data from raw_xzy to xyz while filling the FIFO
when FIFO is enabled.
BRANCH=smaug
TEST=Test with si1141 driver, check irq works for both driver.
BUG=chrome-os-partner:32829
Change-Id: I5e106df0c121e3bf1385f635195717395235ccc3
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291334
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Matches definitons set in
chromium/chromeos/accelerometer/accelerometer_types.h.
Using that standard, the coordinate frames of the lid and base DO NOT
line up perfectly when the lid is fully closed or fully open.
Therefore, rotate the lid vector 180 along the X axis before
calculating the lid angle.
BRANCH=cyan
BUG=chrome-os-partner:40177
TEST=When the device is open 180 degrees, check the sensors
agree with each other:
Flat on the back (Z pointing to the sky):
localhost devices # cat */*raw
-1008 [keyboard : X]
-112 [keyboard : Y]
16544 [kyeboard : Z]
-256 [lid : X ]
2000 [lid : Y ]
16336 [lid : Z ]
On the right side (X pointing to the ground)
localhost devices # cat */*raw
-16928
-48
-1040
-16176
432
80
On the bottom edge (Y pointing to the sky)
localhost devices # cat */*raw
-192
15872
1648
496
15936
752
Check the angle as calculated by the EC is correct using accelinfo.
Change-Id: Ib8ee42da8cf818213f892b1f024253f37a4da488
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294716
Reviewed-by: Jonathan Ross <jonross@chromium.org>
Reviewed-by: Eric Caruso <ejcaruso@chromium.org>
On sysjump we attempt to lock all i2c ports in use, but locking is
by-controller. This leads to a deadlock if two ports from the same
controller are in use. Fix this by directly locking all controllers
present in the system.
BUG=chrome-os-partner:44214
TEST=`sysjump rw` and then `sysjump ro` on glados
BRANCH=None
Change-Id: I21d65cd4455769414216016a5c97ad118a712117
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294959
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The current logic breaks out of the for() loop if SCL gets unwedged
(goes high), but still falls through to the "I2C unwedge failed,
SCL is being held low" case. Fix this so that we only hit the
"SCL is being held low" case if SCL actually is stuck low.
BUG=none
BRANCH=None
TEST=compile-test only, on samus
Change-Id: I39df1966dc25517ee03a56109e7d0b740c5ca12b
Signed-off-by: Kevin Cernekee <cernekee@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295043
Reviewed-by: Randall Spangler <rspangler@chromium.org>
PD charger voltage + current can now be limited with
EC_CMD_EXTERNAL_POWER_LIMIT. The limit is automatically cleared when the
AP transitions out of S0 into S3 / suspend.
BUG=chrome-os-partner:43285
TEST=Manual on Samus w/ zinger.
- Plug zinger, verify charging at 20V/3A.
- `ectool extpwrlimit 3000 12000 --dev=1`, verify charging at 12V/3A
- `ectool extpwrlimit 1000 5000 --dev=1`, verify charging at 5V/1A
- Plug zinger into other port, verify still charging at 5V/1A
- `powerd_dbus_suspend`, verify charging at 20V/3A
- `chglim 2000 12000`, verify charging at 12V/2A
- `ectool extpwrlimit 0xffff 0xffff --dev=1`, verify charging at 20V/3A
- `chglim 1000 20000`, verify charging at 20V/1A
- `chglim`, verify charging at 20V/3A
BRANCH=ryu
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6cd5377be91b3df75f99cb414fd3fa5a463b56cb
Reviewed-on: https://chromium-review.googlesource.com/293954
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When building components from external libraries, instead of
rsyncing the library into our build directory and building there,
just build in the library directory and have it put its generated
objects into our build tree. That will keep any build artifacts
in the library directory from polluting our builds unexpectedly.
BUG=chrome-os-partner:43025
BRANCH=none
TEST=make buildall
Change-Id: I2f07a2b49d1a0ba9fd9fff0822551486be820b70
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295044
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This patch closes the loop of processing TPM commands, the response
generated by ExecCommand() is placed in the buffer to be returned
through FIFO read accesses.
State machine and register states are updated as per TCG Platform
Specification. A lot of debug output is generated, this is useful for
debugging, will be filtered eventually.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=with the appropriate tpm2 and trunks patches in place trunksd
successfully initializes the CR50, sending such commands as
Startup, GetCapability (three times) and SelfTest.
Change-Id: Ibbd952b53930e4530461db7dcdbc510a8022412c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/293910
Reviewed-by: Utkarsh Sanghi <usanghi@chromium.org>
Modified TCPC layer to utilize the Power_Status and Power_Status_Mask
registers. VBUS status is stored in Power_Status and when a change
is detected, it's communicated to the TCPM via the ALERT# line.
BUG=chrome-os-partner:43440
BRANCH=none
TEST=Tested the feature on Glados and Oak connecting to both Ziger
and Samus. Verfied that VBUS status is communicated via the TCPCI and
that PD contracts are established without using the VBUS_WAKE GPIO
lines on Glados and Oak.
Change-Id: Ie5aa32eecc887f3cb00880a285f1e710b7064384
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289931
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
We will soon have a need to independently set a charge ceiling from both
the PD state machine and from incoming host commands. Store these
ceilings separately, and have the minimum take effect.
BUG=chrome-os-partner:43285
TEST=Pass unit tests. Also, host command current limit takes effect with
subsequent commit.
BRANCH=None
Change-Id: I0ecfe888a7df0d5da5a68999c164c7c841da348b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/293818
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This patch syncs up TPM2 sources into the build area when building
cr50 image. This relies on a specific directory layout so that the ec
makefile has access to the tpm2 source tree.
The sources are copied using rsync, the tpm2 library is a dependency
for the RO/RW elf images, and is declared to be a phony make target,
which guarantees that the tpm2 make is always run when cr50 image is
built.
Include files in board/cr50/tpm2 are necessary to be able to build
tpm2 code using the bare metal toolchain used for building ec code.
memory.h is in fact empty, it is easier to add it here than to wrap it
in conditional compilation at the source.
Make variables CROSS_COMPILE and CFLAGS are exported for the benefit
of the tpm2 makefile. ROOTDIR indicates where tpm2 library should look
for .h files not available from the toolchain.
CQ-DEPEND=CL:292946
BRANCH=none
BUG=chrome-os-partner:43025
TEST=make buildall -j succeeds;
when linked with the latest tpm2 source, the combined image
starts the tmp task and reacts to the host sending the startup
command (failing due to unplugged stubs).
Change-Id: Ia3fd260588558c2bacd724df9583052fa4660ca3
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/292975
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
TPM command processing should not be happening on the interrupt
context.
This patch adds a skeleton of the task which handles TPM functions. It
initializes the TPM and then enters endless loop waiting for an event
trigger from interrupt, which happens when a valid FIFO message is
received.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=none yet
Change-Id: I63dce2762cc07370a05bf00bdf144c5d9eb6019b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289332
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
If we have a lightbar, but no PD, then plugging the device in will
not trigger the battery-level pattern. This allows us to trigger
it from the charger task instead if we change AC status and don't
have a PD.
BRANCH=ToT
BUG=None
TEST=plug and unplug charger from device, make sure the lightbar
plays the right pattern
Change-Id: I8f37aaff2ddb9d936e13489cb404caee822418a1
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/292943
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Enabled lid angle calculation. Clamshell/Tablet mode is decided by lid angle.
Accelerometers are set to be active in S3 also.
Trackpad is enabled/disabled by GPIO TP_INT_DISABLE.
Keyboard scan and trackpad are enabled in clamshell mode and disabled in
tablet mode.
Removed enable_keyboard() since keyboard is enabled in clamshell S0 and
S3.
BUG=chrome-os-partner:41353
TEST=Verify in clamshell mode, system can be waken up from S3 by keyboard/trackpad;
And not tablet mode.
BRANCH=None
Change-Id: Ic5fb5a562e8426288eae2fb9815a213fe5033955
Signed-off-by: li feng <li1.feng@intel.com>
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287341
Reviewed-by: Shawn N <shawnn@chromium.org>
Early hardware bringup often is complicated by exceptions happening in
the code all over the place. Using interrupt based console output to
trace startup progress is inefficient - a lot of text gets buffered
and never shows up on the console.
The new config option enables the mode where the console output is
supposed to be happening in polling mode, the character transmit
function not exiting until the entire character is transmitted.
BRANCH=none
BUG=chrome-os-partner:43791
TEST=with the new config enabled (and the appropriate changes to
chip/g/uart.c) was able to debug bringup on the new version.
Change-Id: I85fd2f3990ac1d31097d58bd6a7fa658b2b5146e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291852
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The motion sense task was checking to see that every single motion
sensor was ready (active, initialized, and reading), before performing
the lid angle calculations. This amount of checking is unnecessary.
This commit reduces the condition to only check if the sensors required
for lid angle calculation are ready.
BUG=chrome-os-partner:36132
BRANCH=None
TEST=Build and flash on samus. Verify that the lid still works.
TEST=make -j buildall tests
Change-Id: Ibaa5cc8358cdcc6023a50aed247fce2e599fef58
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/291301
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Move common USB charger code out of board directory including
setting VBUS supplier when VBUS changes, and initializing BC1.2
supplier types on init.
This also enables re-enabling of Pericom BC1.2 detection interrupts
when VBUS is changed on all boards that use USB_CHG task.
BUG=chrome-os-partner:42292
BRANCH=none
TEST=make -j buildall. Tested on glados and samus by plugging in
a few different chargers and making sure we charge.
Change-Id: Ib102fbf7a6aace998e6fcb6d35f3c97e5f03f5c2
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290453
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Fix buffer overrun bug when retrieving a PD message. Bug was
introduced in CL:289005
BUG=chrome-os-partner:43482
BRANCH=none
TEST=tested on samus. plug and unplug zinger on both ports and
make sure PD MCU never crashes.
Change-Id: I9d2dec0cab07f389fd935d616ab7443da412d4bd
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290417
Reviewed-by: Shawn N <shawnn@chromium.org>
Don't enable try.src when battery is not present or <1% because
try.src will temporarily cut off power to system.
BUG=chrome-os-partner:43413
BRANCH=samus
TEST=tested on samus using "battfake" ec command. when battery
<1%, verified that try.src is disabled and when battery >=1% and
the AP is on (dual-role toggling is on), then try.src is enabled.
verified boot without battery succeeds on samus and glados.
Change-Id: I64816bb7c9669bfeca61687bcd9a48da32e67945
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289854
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add RX message buffer to the TCPC (currently two deep). If
the buffer is full and message is received, don't send goodCRC.
BUG=chrome-os-partner:43482
BRANCH=none
TEST=tested on glados. saw that with back to back PD
packets, we send goodCRC to both packets and process them in
order, taking about 7ms per packet. also tested buffer size
of 1 and verified that with back to back PD packets, we don't
send goodCRC to second packet.
Change-Id: I7f44b3c3a186ae61be8ca03017deec6e6b6c6f9f
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289005
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch implements FIFO mode state machine transitions as described
in Table 22 of the PC Client Platform document.
The 'go' command is still not being handled, as processing needs to
run on a task, not on interrupt context. FIFO block integrity is
somewhat verified by comparing the actual block size to the length
value in the block body.
BRANCH=None
BUG=chrome-os-partner:43025
TEST=not much. Observed trunksd happily initializing the session and
sending the Startup command. The target reports:
fifo_reg_write: received fifo command 0x0144
Change-Id: I76d8b0fc3a52db2cc487c781fe92799df0ee259e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288365
Reviewed-by: Utkarsh Sanghi <usanghi@chromium.org>
When LPC mode is used, there is an assumption that the first
2 sensors are accelerometers, and the optional 3rd is a gyro.
Put the code that fill lpc_data with #ifdef.
Prevent lpc space corruption if more than 3 sensors are present.
BRANCH=smaug
TEST=Compile. Smaug works
BUG=None
Change-Id: I12c9b823efb57d7b190a1813228f6f02fa0bebcb
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290073
We need to call irq_handler and load_fifo even if the
first sensor is disable. Nothing is done on otherwise.
Move code to recalculate sample rate to the right place.
BRANCH=smaug
TEST=Check data is collected when accel is disabled.
BUG=chrome-os-partner:39900
Change-Id: Ia6025a670abaf2e71ccbe784bce24e08becf399e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289838
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Allow more than one SPI master.
Add CONFIG variables to address the system SPI flash.
To have SPI master ports, spi_ports array must be defined.
BRANCH=smaug
TEST=compile
BUG=chrome-os-partner:42304
Change-Id: Id43869f648965c1582b7be1c7fb3a38f175fda95
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288512
Commit-Queue: David James <davidjames@chromium.org>
Modify host_command_pd.c to loop over sending of PD status
host command and processing the response as long as the
alert GPIO is active.
This fixes a potential bug that if the alert line is held
low for more than one PD status host command, then we would
not process the return status.
Also, fix a bug in which we could call alert() for a
non-existent port.
BUG=none
BRANCH=strago
TEST=verified on samus and glados. connected charger and verified
that we negotiate a contract and set appropriate input currnet limit.
Change-Id: I3b2db87b51f55fc2b20a4695bd466ff8bb09ea55
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288819
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: David James <davidjames@chromium.org>
For multi-byte ACPI memmap reads, we previously had a mutex to ensure
data continuity. A better approach is to use a read cache. Since the
kernel will enable burst mode before reading a multi-byte memmap
variable and disable it afterward, we can populate the cache on the
first read after enabling burst. This solution removes deadlock bugs, is
contained entirely in acpi.c, and saves a deferred function.
BUG=chromium:514283
TEST=Manual on Glados. Add prints in acpi_read, verify that multi-byte
reads come from cache and non-burst reads continue to function as
before.
BRANCH=Cyan
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I74e4927bf2b433e31a9ff65d72820fa087c51722
Reviewed-on: https://chromium-review.googlesource.com/288871
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
active state is global, remove it from motion_sensor structure.
Reinit sensors when entering RW, fix regression introduced by CL:284616.
Improve EC polling rate calculation by excluding suspended sensors.
Wake up sensor thread in case the motion task was in deep sleep.
Do not send sense interrupt while suspened. Will revisit once wakeup
sensors are implemented.
BRANCH=smaug
TEST=Check when in RW the sensors are exposed.
Check EC rate are correct in different power state.
Check when jumping from RO to RW and back, after setting the
frequencies parameters via sysfs properly, AndroSensor acquires
the data properly.
BUG=chrome-os-partner:43132,chrome-os-partner:40741
Change-Id: Ie70732b135a432d64935eead4200ddc0e1a7c0b4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288201
Reviewed-by: Alec Berg <alecaberg@chromium.org>
After I2C unwedge, *all* I2C ports will be re-initialized in
i2c_raw_mode() by gpio_config_module(MODULE_I2C, 1);
This means *all* I2C pins will be programmed as GPIO then enable I2C
alternate function.
If I2C Unwedge happened while there is an active I2C transacation on
another port, the active I2C transaction will be corrupted, since the
pins will be temporary programmed as GPIO Output High.
BUG=chrome-os-partner:40519
TEST=Warm-reboot test on Cyan EVT and no discharging while AC is on.
BRANCH=none
Change-Id: I3be1d5c60bf4ab385bc077202406ec7abd8b2add
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287493
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Denny Iriawan <denny.iriawan@intel.com>
This patch adds a module which runs on top of the SPS driver and
implements the TCG SPI TPM protocol.
Basic register read and write functions are implemented as well as
rudimentary TPM state machine (claiming/releasing locality).
An enhancement is made to the SPS driver to ensure that when the CS is
deasserted the transmit FIFO is reset too, on the off chance of the CS
going away mid transaction for whatever reason.
In this implementation the slave is guaranteed to stall the master for
a few bytes in both receive and transmit transactions, which is
further aggravated by the fact that RX FIFO threshold is set to 8
(this is the minimum number of bytes the master has to send to wake up
the slave). This could be fine tuned later, for instance made a
parameter of the receive callback registration function.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=trunksd initialization (with minor changes to accommodate new
VID/DID and some status bits, to be published) succeeds with the
cr50 connected to the USB/SPI cable.
Change-Id: I28d37c3b57dde9adf59e81426efe4f58880cf0b0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285252
As new features come along the console channel space limited at 32
becomes very tight. But not all features are present all the time.
Let's make some of the channels compile time configurable. This makes
for uglier code but allows to support more channels.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: Id21560d4aa05c0e5245872c50ae19340cda8fd3e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286610
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
SPI slave and master interfaces require very different code to
support, they should have separate configuration options.
Host command code printouts should use their own console channel.
Using SPS to designate SPI Slave interface is not universally
acceptable, a bug has been opened to discuss the alternatives and
clean up the code.
BRANCH=none
BUG=chromium:512613
TEST=make buildall -j
Change-Id: I6683286a221c4689ecc247fdfe8ebca529f3f458
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286469
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Move TCPC initialized bit from alert register into error status
register. This is not part of the TCPCI spec, but the existing
code creates a bug that if TCPM reboots without TCPC also rebooting,
then we will never get the initialized alert from TCPC since
it has already happened, so the TCPM will loop indefinitely
waiting for TCPC to be ready. This fixes the bug by moving the
bit to a status register, which is more appropriate.
BUG=none
BRANCH=none
TEST=load on glados, reboot and make sure TCPM see's that the
TCPC is initialized.
Change-Id: I8e96b59031e01a4faec8f519727df1fa95f498bc
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288342
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add a X-macro CONFIG_LID_SWITCH_GPIO_LIST to be able to optionally
specify more than one GPIO to check to find out whether the lid is open.
By default, use GPIO_LID_OPEN as before.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42110
TEST=on Smaug EVT2, define CONFIG_LID_SWITCH_GPIO_LIST as
LID_GPIO(GPIO_LID_OPEN) LID_GPIO(GPIO_BASE_PRES_L) and play with magnets
and the genuine lid, check we get the right "lid open" / "lid close"
messages on the console.
Change-Id: I9e7c67bb39f36f254d31d5861d535d69db754faa
Reviewed-on: https://chromium-review.googlesource.com/287852
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
It's sometimes desirable to boot without a battery, but we may brown out
if we don't have sufficient current. Inhibit AP power-on, even if the system
is unprotected, until our charger and current limit are initialized.
BUG=chrome-os-partner:41258
TEST=Manual on reworked glados with subsequent commit. Remove battery and
attach Zinger. Verify EC powers on and AP doesn't boot. Run `powerbtn`,
verify that AP boots. Remove all power and attach battery, verify that EC
powers on and AP boots.
BRANCH=None
Change-Id: Ifc3d16f8288a035854e9fd05812ce6de33170d6a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/280563
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add matrices to align sensors vectors with the device reference.
Move rotation in read routines, to allow fifo to contains processed
information.
BRANCH=smaug
TEST=Worsk on smaug
BUG=chrome-os-partner:39900
Change-Id: I009e7f24ef6ee0574ed664aeb5fd649fcd7039fd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286659
Reviewed-by: Alec Berg <alecaberg@chromium.org>
math library can be set independentely.
It is implied when motion sensor drivers are compiled in.
BRANCH=smaug
TEST=Build strago board specific tests, host test and ran
ryu image.
BUG=chromium:512329
Change-Id: I743ea7b44e4a3783602c11f3928cb3fa4b105ec4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287371
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Make the PD port state string more friendly with console limited to
64-byte wide string (eg current USB console).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=on Smaug, open the USB-console to the EC and type "pd 0 state" and
see the current type-C port state string.
Change-Id: I6903fd0f0b7371aef978f696370a6e3a200c7fa5
Reviewed-on: https://chromium-review.googlesource.com/286785
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
This commit adds the 8042 scancodes to the shared objects library saving
504 bytes from the RW image. To enable the space savings, define
CONFIG_SHAREDLIB in the target's board.h file.
BUG=none
BRANCH=none
TEST=make -j buildall tests
TEST=Built samus EC image and verified keyboard still worked in RO and
RW.
TEST=Built samus EC image with CONFIG_SHAREDLIB enabled and verified
that the keyboard still worked in RO and RW.
TEST=Enabled CONFIG_SHAREDLIB for glados and cyan and watched build
fail.
CQ-DEPEND=CL:275344
Change-Id: I1241506c6b34d63e270677d4e8d0531a8a4236c9
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/276212
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
This commit introduces the build infrastructure changes needed for
creating a shared RO library. (libsharedobjs). The end goal is for the
library to contain various objects that can be shared with both the RO
and RW EC images.
Now, there are 3 make goals: ro, rw, and libsharedobjs.
In order for changes that are only specific to a single image (ie: RW
only) to be applied correctly, the object files are now built separately
for the RO, RW, shared objects library targets.
NOTE: Certain EC targets are incompatible with this model due to the
fact that only one image is present within flash at a time.
BRANCH=none
BUG=None
TEST=make -j buildall tests
TEST=make -j BOARD=cr50 xrefs
TEST=make BOARD=samus dis
TEST=Built samus EC image and compared that the final EC image was
identical to the upstream version (except for the git SHAs & version
strings).
CQ-DEPEND=CL:285934
Change-Id: I8e67f089710be9c6d7017718109262394bdad2f5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/274079
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Fixes cyan/board.h to use correct SPI part
* Adds new flash protection regions in spi_flash_reg.c
* Sets SRP register in flash_physical_protect_at_boot()
* Fixes a bug in COMPARE_BIT macro
* Makes spi_flash_set_status() fail only when both HW pin is asserted
AND SRP(s) are set
* Makes sure set_flash_set_status() completes before returning
BUG=chrome-os-partner:40908
BRANCH=master
TEST=on Cyan:
With WP pin de-asserted:
flashrom -p ec --wp-enable
flashrom -p ec --wp-status, make sure it is enabled
flashrom -p ec --wp-disable
flashrom -p ec --status, make sure it is disabled
flashrom -p ec --wp-enable
Assert WP pin (either with screwdriver or dut-control)
flashrom -p ec --wp-disable
make sure it failed
Change-Id: I338cc906b73e723fdbb37f7c2fd0c4da358b6c8e
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/276671
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
To ease driver loading in the kernel, add a bit in the feature field
to indicate the EC has an internal software FIFO for sensor events.
BRANCH=smaug
BUG=chrome-os-partner:39900
TEST=compile, kernel modules load as expected on Smaug.
Change-Id: I1ae0b9ebb587bb4939745e8a0e16d73d95ba31d7
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285774
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Previously all access to the queue was done by adding or removing units
with no access to the underlying byte array, or ability to notify the
queue that the byte array had been updated. This prevented direct DMA
transfers to and from the underlying byte array.
This change adds a new struct, a queue_chunk, that represents a
contiguous region of the queues byte array. Regions of valid units as
well as free space can be requested. And there are now update functions
to signal to the queue that new units were added or existing units were
read from these chunks. A chunk can be queried and used to initialize
a DMA transfer, as interrupts or polling indicates that the DMA is
working the queue indicies can be updated and the policy activated as
needed.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I7e37d937c56153122f0a3c73ba8064b656106e3a
Reviewed-on: https://chromium-review.googlesource.com/285556
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Even a decent type-C device SHALL respond SNK_CAP query message when we are in
SRC_READY state, but in the case its mal implementation shouldn't get us being
trapped in an infinite loop of SRC_READY / SRC_GET_SNK_CAP states.
Introduce a counter to give up sending of SNK_CAP and just print a ERR
indication log when the partner device ignores SNK_CAP query.
BUG=none
BRANCH=samus
TEST=make buildall
manual testing against the failing USB-C device
Change-Id: I4c4251b2264230d7dd30bd2b9fc2b56027ff0d5a
Signed-off-by: Bernard Shyu <bernard_shyu@bizlinktech.com>
Reviewed-on: https://chromium-review.googlesource.com/284035
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
