This commit changes the way in which tasks are started. Instead of
having all tasks marked as ready to run upon initialization, only the
hooks task is marked as ready to run. HOOK_INITs are now run at the
beginning of the hooks task. After the HOOK_INITs, the hooks task calls
back to enable the rest of the tasks, reschedules, and proceeds as
usual. This also allows the removal of checks for task_start_called().
BUG=chrome-os-partner:27226
BRANCH=None
TEST=Built and flash EC image for samus and verified that EC boot was
successful as well as AP boot. Additionally, verified that charging,
keyboard, tap-for-battery were all still functional.
TEST=make -j buildall tests
Change-Id: Iea53670222c803c2985e9c86c96974386888a4fe
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/283657
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Add CONFIG_LTO to use GCC Link-Time Optimizations to try to reduce the
flash footprint of the firmware.
Add additional protection to some functions/data to avoid removal by the
linker when their usage is not obvious.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall (with and without LTO enable on all boards)
Change-Id: I586b8c1eda4592b416c85383b65153c1d5ab0059
Reviewed-on: https://chromium-review.googlesource.com/271291
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
For accessories without software-sync mechanism, add the option to do a
RSA-based signature verification of the Read-Write firmware.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:31192
TEST=enable the configuration on Fruitpie and see the RW firmware
validated and jump to. Tried with good and bad RW images.
Change-Id: I3c886c2cbe17ca9543e19bf8599061c3f9751d4f
Reviewed-on: https://chromium-review.googlesource.com/229594
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
When this option is configured, two changes take place.
First, the AP doesn't power on by default when the EC reboots. To boot it,
you can run the "powerbtn" command, or poke the power button manually, or
any of the normal things.
Second, we watch for power-related signal changes (anything that's connected
to the power_signal_interrupt() function) and keep track of them as they
happen. After a second with no further changes, we print the time and value
of each change. For example:
[19.939212 Port 80: 0x29]
[19.967971 HC 0x23]
[19.976236 Port 80: 0x3a]
[19.995700 HC 0x87]
[20.567884 Port 80: 0x73]
11 signal changes:
19.638241 +0.000000 PCH_SLP_SUS_L => 1
19.654378 +0.016137 PCH_SLP_S5_L => 1
19.654457 +0.000079 PCH_SLP_A_L => 1
19.654535 +0.000078 PCH_SLP_S3_L => 1
19.654587 +0.000052 PCH_SLP_S4_L => 1
19.659630 +0.005043 PGOOD_1_5V_DDR => 1
19.663199 +0.003569 PGOOD_1_5V_PCH => 1
19.664751 +0.001552 PGOOD_1_8VS => 1
19.668735 +0.003984 PGOOD_VCCP => 1
19.671883 +0.003148 PGOOD_VCCSA => 1
19.868406 +0.196523 PGOOD_CPU_CORE => 1
[21.908551 Port 80: 0xf0]
[21.908855 HC 0x48]
BUG=none
BRANCH=ToT
TEST=manual
Build with CONFIG_BRINGUP, notice those two changes.
Change-Id: I55fd2021a0eae7dbfd1aaf5d93971f65bf2367b9
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202574
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Our code base contains a lot of debug messages in this pattern:
CPRINTF("[%T xxx]\n") or ccprintf("[%T xxx]\n")
The strings are taking up spaces in the EC binaries, so let's refactor
this by adding cprints() and ccprints().
cprints() is just like cprintf(), except that it adds the brackets
and the timestamp. ccprints() is equivalent to cprints(CC_CONSOLE, ...)
This saves us hundreds of bytes in EC binaries.
BUG=chromium:374575
TEST=Build and check flash size
BRANCH=None
Change-Id: Ifafe8dc1b80e698b28ed42b70518c7917b49ee51
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200490
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This is in preparation for enabling DMA-based UART transfers, to
improve UART performance on STM32.
BUG=chrome-os-partner:20485
BRANCH=none
TEST=Boot pit. Host commands should still be received; this verifies DMA
is still operational.
Change-Id: Ibc3b2e2cd187547eb61b85e4a086704accd7f2fb
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/168810
This is the first version of pthread-based RTOS emulator. With this, we
will be able to test high-level modules entirely on the host machine.
BUG=chrome-os-partner:19325
TEST='make runtests' and see tests passing.
BRANCH=None
Change-Id: I1f5fcd76aa84bdb46c7d35c5e60ae5d92fd3a319
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49954
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
CONFIG_ macros should be set directly. Expanding the task names in the same
way made it difficult to tell what was a configuration choice and what was
due to changes in ec.tasklist
BUG=chrome-os-partner:18343
TEST=build all, run link
BRANCH=none
Change-Id: Ib82e34f974238ee2dd216f33b701b6f4c6a4f1f1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49098
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Board configuration interfaces are now defined in board_config.h, not
in every board.h file.
Tidied /alphabetized CONFIG defines.
No functional changes, just rearranging code.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all targets
Change-Id: I6196591784f8fa9ce6dfccd31891b679fb200063
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47419
This is a cleaner way of deferring work from interrupt-time to
task-time without requiring a task for each module which needs this.
Replaces/supersedes delayed hook notification, which didn't scale well
(since every function would have needed to be its own hook type).
BUG=chrome-os-partner:18473
BRANCH=none
TEST=boot system. plug/unplug AC power; notifies the host properly
Change-Id: I50263fe1ce37e74c1ef8db3671379098997102ed
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/46953
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This is part one of a series to merge the keyboard scan interface to
be common across all platforms.
This change just moves and renames files and APIs and removes some
read code, and sets up protocol-specific CONFIG options. It makes the
next CL which actually merges keyboard scanning easier to parse.
BUG=chrome-os-partner:18360
BRANCH=none
TEST=compile all boards; test keyboard on spring and link
Change-Id: I815a40aae4e5d5f333b8501aff9656080533d913
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/46549
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
And change some direct uart_printf()/uart_puts() output to console
output methods instead. Disable unused comxtest debug command. No
other functional changes.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system; should still see debug output with reset flags
Change-Id: I57fe6bb781a1ba7884afa6d090b74a92f45a53cc
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36835
Previously, all hook functions returned EC_SUCCESS, which was
meaningless because nothing ever looked at the return value. Changing
the return value to void saves ~100 bytes of code size and an equal
amount of source code size.
BUG=none
BRANCH=none
TEST=code still builds; link still boots
Change-Id: I2a636339894e5a804831244967a9c9d134df7d13
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36372
It is useful to be able to perform some board init after GPIOs are
set up. When defined, configure_board_late() will be called after
GPIOs are ready.
BUG=chrome-os-partner:13064
BRANCH=snow,link
TEST=manual
build and boot on snow with later changes. See the AC power GPIO does
not change when un/plugging power.
Change-Id: Idc56c0acde9f7bd46b4379731b973d1fce760b3f
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/31303
It was previously only enabled for 1500us during boot, but in a way
that triggered a needless round of notifications to other modules.
This is cleaner.
This also fixes adc_init() not initializing the task IDs to wake when
interrupts come in, and removes some unneeded code from other init
functions.
BUG=chrome-os-partner:12472
TEST=boot system and run adc command. Should still provide reasonable data.
Change-Id: I9ae5857d988c727caf5d53f551a2f12b30974c0f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29806
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Superseded by EC software sync (hash-based).
Sig-based vboot was correctly implemented, but ended up being too slow
to be useful given the limited processing power of the EC chips, and
we also couldn't come up with a manageable way to handle A/B
autoupdate of signed EC firmware.
This change and an associated vboot_reference change shrinks the EC
binary by ~2KB.
BUG=chrome-os-partner:11232
TEST=build link,snow; boot link and check that 'hash' command still works.
Change-Id: I3f03ae2d0a4030977826980d6ec5613181e154c2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29496
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reasons are really bitflags, not a single reason. This will make it
easier to implement flash protection on LM4, where hibernate is a
subset of power-on reasons.
Also added some additional flags we pass in a hibernate register so...
1) We don't recognize spurious RTC wake reasons
2) Hard reset via system_reset(1) is detected as a hard reset, not a RTC wake
BUG=chrome-os-partner:11368
TEST=manual
1. Keyboard reset = power-on reset-pin
2. Pull battery = power-on
3. reboot = soft
4. reboot hard = power-on rtc-alarm
5. hibernate 10 then push power button = power-on wake-pin
6. reboot 3 sec later = soft
7. hibernate 1 = power-on rtc-alarm
Change-Id: Icbbdbcf6dfd13c8a6a4f80a23f64cebebbfba26e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27417
EC software sync still needs to be able to sysjump later after the AP
decides which image the EC should be running.
BUG=chrome-os-partner:11087
TEST=manual
sysjump A
sysjump RO
sysjump A
sysjump RO
Change-Id: I74eaf10dacf6eaa6aeabae2ff3b21ad387517605
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26896
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Use the same prototype for watchdog_init() everywhere. One version takes
a parameters and one doesn't. We don't need the parameter since we have
a #define. Tidy this up.
Also move watchdog defines into watchdog.h.
BUG=chrome-os-partner:10145
TEST=build for all boards
Change-Id: I38ae63d7cc137b93017c850e767703d5f90f56ad
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24394
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This returns true when both HW and SW write protect are enabled.
Once WP is enabled, sysjump will be locked out.
system_is_locked() can be used to gate other dangerous-ish commands too.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7468
TEST=manual
sysinfo -> unlocked, copy A
sysjump B -> works
flashwp lock
reboot
(make sure flashinfo shows WP asserted and flash locked; note there is a
HW bug on proto1 which makes this flaky)
sysinfo -> locked, copy A
sysjump B -> fails
(remove WP screw)
reboot hard
flashwp unlock
Change-Id: I849b573675c2c1cb4c44b9a05d6973e38247ca23
This helps us keep track of how long vboot is taking on the EC.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9651
TEST=reboot system and look at debug log. time shouldn't start over after it jumps to image A.
Change-Id: Iad86e90d42dabf1c67b2c2be80dda1151cf9a288
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9647
TEST=hack code to put a uart_puts() immediately following uart_init()
It shouldn't crash.
Change-Id: Ia1867a631934dbd457a23183010fdf9f5c284873
this fixes the build breakage on stm32-based platforms.
In the linker script, remove the ASSERT since this macro is not designed
to work in that context and this size condition is already verified by
the linker by setting the "length" of the "FLASH" memory region.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make BOARD=link && make BOARD=daisy
boot on Link and Daisy
Change-Id: I08964749d44f47caa0a359bc93c303a9611e5d73
1) When frequency changes, reload the watchdog timer right away, or it
may expire before the next reload. (Only matters when re-enabling the
PLL.)
2) Split out the timer/task debug output used by the watchdog into
their own routines, instead of assuming it's safe to call the command
handlers. Also make the flushes in those print routines safe to call
from interrupt level.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=waitms 1500; should print task dump again
Change-Id: I07e0ed24a526ae499566dab0bbeb0f5755cd5be6
This saves power.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8798
TEST=manual
Get a proto1 system modified with INA current sensor
1) From chroot:
dut-control i2c_mux_en:on i2c_mux:rem
dut-control pp3300_alw_mv pp3300_alw_ma
2) From EC console:
pll
(this should turn the PLL back on; it'll report clock frequency ~66MHz)
3) From chroot:
dut-control i2c_mux_en:on i2c_mux:rem
dut-control pp3300_alw_mv pp3300_alw_ma
Current (ma) should be bigger than in step 1
Change-Id: I806953684c57fd60bf481acb01dddffe2f2ad0ed
During the reboot_ec command, the keyboard state is lost after jump.
We need to restore info including:
- code set
- controller_ram[0]:
- XLATE
- KB/TP disabled
- KB/TP IRQ enabled
Remove the un-necessary keyboard_init() function.
BUG=chrome-os-partner:9102
TEST=tested on link.
EC runs on A
% ectool reboot_ec A
keyboard still working
% ectool reboot_ec RO
keybaord still working
% ectool reboot_ec RO
keybaord still working
ESC + power yo reset all system
repeat above steps and the keyboard keeps working.
Change-Id: I0fe21f7876459fc8047ff018fbfaaef5311cc49b
This covers modules which need to initialize before task_start(), but
don't particularly care in what order they're initialized.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=if it boots, it works
Change-Id: I69829aac8d1c3c14ee04916a794b84bbf03a09eb
We can clear the reset cause in system pre-init now because of a
previous change which preserves it across a sysjump.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=if it boots, it works
Change-Id: I1d8b99df5a0be0de9545d22ad1a6b7fb3140f813
The reboot_ec command could warm boot the EC while the host is still
running. However, this resets the internal state so that the keyboard
module is disabled on the EC side.
Check the reset cause during the keyboard init code. If it is wrm boot,
enable the keyboard (assume the host is on).
BUG=chrome-os-partner:9102
TEST=on link 1.0
% ectool version
Firmware copy: RO
% ectool reboot_ec RO
the keyboard keeps working.
Change-Id: I0009c561e2cd88789e50f9129b494538e50ee00e
Now that we have a SPI driver, we must init it when we start up.
BUG=chromium-os:28925
TEST=build on daisy and discovery; run on daisy
Change-Id: I84b458d3ebc3fed9368dce8e06d040dbfc4e9125
Signed-off-by: Simon Glass <sjg@chromium.org>
BUG=chrome-os-partner:8718
TEST=manual
1) Use 'reboot' command from console to boot image. Should end up in
image A, with last reset reason soft cold. 'sysinfo' should show we
jumped to this image.
2) sysjump RO. Should end up in RO; otherwise same as 1)
3) reboot using Power+Esc+Reload. Should end up in image RO, with last
reset reason reset pin. 'sysinfo' should show we did not jump to this
image.
4) sysjump A. Should end up in A with reset reason reset pin.
'sysinfo' should show we jumped here.
Change-Id: I2dd5595eab4ba2c91bfe8b2b2e9677d7732aca63
Signed-off-by: Randall Spangler <rspangler@chromium.org>
This is necessary at init-time for verified boot to jump from RO to
one of the RW images.
It's also used by factory EC update to update one image and then jump
to the updated image to finish the update. In this case, the x86 does
NOT reboot.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8449
TEST=manual
1) power on x86 and log in
2) sysjump a --> system is in a; x86 has not rebooted
3) sysjump ro --> system is back in RO; x86 has not rebooted
4) reboot -> system is in RO; x86 HAS rebooted
Change-Id: I9dbadcf9775e146a0718abfd4ee0758b65350a87
More modules can be disabled individually through CONFIG_ defines.
Reordered early module pre-init and init, and added comments to
explain why things are ordered in main() the way they are.
Fixed a few assorted init-related bugs along the way, like st32m
keyboard scan double-initializing.
BUG=none
TEST=build link, bds, daisy
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I04a7fa51d743adfab4be4bdddaeef68943b96dec
Board-specific features like lightbar should be config'd at the board
level, not at the chip level.
BUG=none
TEST=build link, bds, daisy
Change-Id: If1df2ca0422f7b8bdc172d0df7bd9f6a1af6a9d2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Allow to build without the power button task.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make qemu-tests
Change-Id: Ibc757a6641f195f0d10e6a673792b996694f8cec
Jumping (currently rebooting, see crosbug.com/p/8100) to the RW image should
be done by vboot_init(), not vboot_pre_init().
As currently written, vboot_init() has to come AFTER these function calls:
task_init(); // sets up interrupts so that uart will work
watchdog_init(1100); // in case we fall over somewhere
uart_init(); // we'd REALLY like to see some debugging output
system_init(); // may go away with crosbug.com/p/8100
keyboard_scan_init(); // check for F3 to go to recovery mode
flash_init(); // maybe set RO regions (this should come earlier!)
eeprom_init(); // this is where the try_b flags are kept
BUG=chrome-os-partner:7459
TEST=none
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: I0ec3f6bcc26a308bb1005a944990963853b88b60
Also prints the current timer value when inits are done, and when the
watchdog task first gets to run (after all higher priority tasks sleep
at least once).
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=none
Change-Id: I342f86ad087fd18ab064a10a5bcdd0b69ee373d0
Add build information (date/time/builder) which can be displayed at the
EC console.
Generate a version from the board name and the branch tag.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chromium-os:27013
TEST=on BDS, run version command on the console.
inspect the built binary.
Change-Id: Idb1f68898ba6b811d02919f17ab4536ed9f8934a
A temperature polling task is added to achieve temporal correction and
also reduce the latency of reading temperature.
Factor out sensor specific part to keep code clean.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:7801
TEST=On link, 'temps' shows all temperature readings.
Cover each sensor with hand and see object temperature rise.
Compilation succeeded on bds/adv/daisy/discovery.
Change-Id: I3c44c8b2e3ab2aa9ce640d3fc25e7fba56534b86
