Commit Graph

299 Commits

Author SHA1 Message Date
Gwendal Grignou
bbbbde0fc0 driver: si114x: Add ALS/Proxy sensor SI114x
Add the Silicon Image sensors, add it to the motion_sense module
to be used with the FIFO.

BRANCH=smaug
TEST=Check light and proxy on Smaug:
Check Light value in Lux are reasonable.
Check Proxy is detecting object, but value are in opposite of distance.
BUG=chrome-os-partner:32829

Change-Id: I11419a0f0613f0fae9323f99deedf5a1e6c6e29c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291335
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
2015-08-22 09:31:50 +00:00
Gwendal Grignou
59138ad097 motion_sense: Allow multiple IRQ based sensors
Add a mask of custom events reserved for IRQ based sensors.
Copy data from raw_xzy to xyz while filling the FIFO
when FIFO is enabled.

BRANCH=smaug
TEST=Test with si1141 driver, check irq works for both driver.
BUG=chrome-os-partner:32829

Change-Id: I5e106df0c121e3bf1385f635195717395235ccc3
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291334
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
2015-08-22 09:31:45 +00:00
Shawn Nematbakhsh
ad8ce3f806 usb_pd: Add host command to limit external charger voltage / current
PD charger voltage + current can now be limited with
EC_CMD_EXTERNAL_POWER_LIMIT. The limit is automatically cleared when the
AP transitions out of S0 into S3 / suspend.

BUG=chrome-os-partner:43285
TEST=Manual on Samus w/ zinger.
- Plug zinger, verify charging at 20V/3A.
- `ectool extpwrlimit 3000 12000 --dev=1`, verify charging at 12V/3A
- `ectool extpwrlimit 1000 5000 --dev=1`, verify charging at 5V/1A
- Plug zinger into other port, verify still charging at 5V/1A
- `powerd_dbus_suspend`, verify charging at 20V/3A
- `chglim 2000 12000`, verify charging at 12V/2A
- `ectool extpwrlimit 0xffff 0xffff --dev=1`, verify charging at 20V/3A
- `chglim 1000 20000`, verify charging at 20V/1A
- `chglim`, verify charging at 20V/3A
BRANCH=ryu

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6cd5377be91b3df75f99cb414fd3fa5a463b56cb
Reviewed-on: https://chromium-review.googlesource.com/293954
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-08-22 01:37:38 +00:00
Vadim Bendebury
6f8637a6df cortex-m: provide ability to insert free space into RO image base
Some platforms might expect the header of the image to be a certain
platform specific blob. This patch adds an ability to insert an
arbitrary size header in the binary blob, if so desired, the intention
is to have the platform specific tools to postprocess the image and
replace the header with sensible data.

Ideally we should be able to produce an image which is mapped to start
at an offset to the FLASH_BASE, but the macros in ec.S.lds files are
way too smart for this.

BRANCH=none
BUG=chrome-os-partner:43025
TEST=with this and other changes the latest cr50 image gets signed and
     booted properly.

Change-Id: Icabf00c6b90657b0ae3370ddad3567ccedf3ff49
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295200
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-08-22 01:37:31 +00:00
Rong Chang
c2ebc9e477 oak: use EXTRA_CLFAGS instead of CONFIG_BOARD_OAK_REV
Oak board revisions are not global configs. Move them out of
include/config.h . This change also makes it easier to build EC
and PD image for different board revisions.

BRANCH=none
BUG=none
TEST=manual
  build for board revision n and load on oak:
    make BOARD=oak clean
    make BOARD=oak_pd claen
    make EXTRA_CFLAGS=-DBOARD_REV=n BOARD=oak -j
    make EXTRA_CFLAGS=-DBOARD_REV=n BOARD=oak_pd -j

Change-Id: I331b4c5a1af94b179d7c6f7878a9c3939ea6025a
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294441
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-08-21 08:10:23 +00:00
Scott
d862dd0598 pd: Enable detection of VBUS via the TCPM/TCPCI interface
Modified TCPC layer to utilize the Power_Status and Power_Status_Mask
registers. VBUS status is stored in Power_Status and when a change
is detected, it's communicated to the TCPM via the ALERT# line.

BUG=chrome-os-partner:43440
BRANCH=none
TEST=Tested the feature on Glados and Oak connecting to both Ziger
and Samus. Verfied that VBUS status is communicated via the TCPCI and
that PD contracts are established without using the VBUS_WAKE GPIO
lines on Glados and Oak.

Change-Id: Ie5aa32eecc887f3cb00880a285f1e710b7064384
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289931
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
2015-08-21 08:10:03 +00:00
Vijay Hiremath
646760bb20 Skylake: Add low power Pseudo G3 support
BUG=none
TEST=Used "shutdown -h now" Kernel console command to test on Kunimitsu.
     With only battery after 1 hour, device enters to Pseudo G3 and the
     V3p3A is off. With AC connected, device is in G3.
BRANCH=none

Change-Id: I955662eb69ac608e9b2d12bdcfbc1258ca83f3a5
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/292976
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-08-21 03:46:19 +00:00
Todd Broch
82bc3c7028 bq2589x: Add CONFIG_CHARGER_TERM_CURRENT_LIMIT support.
Create a config to allow customization of a board's charger
termination current and add support to bq2589x charger.

Note, BQ2589X_TERM_CURRENT_LIMIT_DEFAULT, currently set to 64 to make
CL benign to ryu board.  Future CL will change to 256 as thats the POR
value for that charger.

Signed-off-by: Todd Broch <tbroch@chromium.org>

BRANCH=smaug
BUG=chrome-os-partner:42848
TEST=manual, read charger IC register and see its termination current
set to 64mA

Change-Id: I79348ed62a077a6432c8d8db6ac90e1e4e92dbc7
Reviewed-on: https://chromium-review.googlesource.com/293095
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
2015-08-20 07:49:48 +00:00
Shawn Nematbakhsh
c41174c5e5 glados: Enable tests build
`tests` build was previously disabled for glados due to errors building
power/skylake.c. Properly undef the chipset config to make `tests` work
for all skylake platforms.

BUG=None
TEST=`make BOARD=glados tests`
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I7a730cdd5e30a932ff0cd1f3beef77873b9e0630
Reviewed-on: https://chromium-review.googlesource.com/292910
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-08-12 04:25:14 +00:00
li feng
2911e38022 Cyan: Added Clamshell/Tablet mode support
Enabled lid angle calculation. Clamshell/Tablet mode is decided by lid angle.
Accelerometers are set to be active in S3 also.
Trackpad is enabled/disabled by GPIO TP_INT_DISABLE.
Keyboard scan and trackpad are enabled in clamshell mode and disabled in
tablet mode.
Removed enable_keyboard() since keyboard is enabled in clamshell S0 and
S3.

BUG=chrome-os-partner:41353
TEST=Verify in clamshell mode, system can be waken up from S3 by keyboard/trackpad;
And not tablet mode.
BRANCH=None

Change-Id: Ic5fb5a562e8426288eae2fb9815a213fe5033955
Signed-off-by: li feng <li1.feng@intel.com>
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287341
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-08-10 20:42:18 +00:00
Vadim Bendebury
6cb2008348 uart: provide polling mode of operation
Early hardware bringup often is complicated by exceptions happening in
the code all over the place. Using interrupt based console output to
trace startup progress is inefficient - a lot of text gets buffered
and never shows up on the console.

The new config option enables the mode where the console output is
supposed to be happening in polling mode, the character transmit
function not exiting until the entire character is transmitted.

BRANCH=none
BUG=chrome-os-partner:43791
TEST=with the new config enabled (and the appropriate changes to
     chip/g/uart.c) was able to debug bringup on the new version.

Change-Id: I85fd2f3990ac1d31097d58bd6a7fa658b2b5146e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291852
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2015-08-08 04:26:40 +00:00
Aseda Aboagye
c124e8cbc7 stm32: Deprecate SPI protocol version 2.
Now that v3 support is in the cros_ec kernel driver and depthcharge,
deprecate support for the old v2 protocol.  At some point in the future,
support for the v2 protocol will dropped entirely.

Boards that require support for the V2 protocol should enable the
following config option.

    #define CONFIG_SPI_PROTOCOL_V2

BUG=chrome-os-partner:20533
BRANCH=None
TEST=make -j buildall tests
TEST=Flash jerry, AP & EC boot successful.
TEST=`ectool protoinfo` shows only version 3 supported on jerry.
TEST=Flashrom still works on jerry.

Change-Id: I72d3aee00879314b936cc0b1002c9883550b1f1a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/291411
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
2015-08-08 04:26:33 +00:00
Dino Li
b61de792ef it8380dev: modify sspi module
We need to modify SSPI module to fix compile fail
due to SPI flash common code changed.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=console "spi_flashinfo" OK

Change-Id: I83bb645eff1e5874d849056df518eea92340c39e
Reviewed-on: https://chromium-review.googlesource.com/290089
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
2015-08-04 19:21:52 +00:00
Shawn Nematbakhsh
2bb093151f driver/temp_sensor: Add support for BD99992GW
Add support for ADC / thermistor reads on the BD99992GW PMIC.

BUG=chrome-os-partner:42156
TEST=Manual on Glados with subsequent commit. Boot to S0, run "temps".
Verify that temperatures start around 28C and begin to increase after
system is powered-on for a long duration.
BRANCH=None

Change-Id: Ic15f41046130317a0e0c3bce4a923ba624328c0d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289935
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-08-03 21:15:56 +00:00
Alec Berg
37b65d5c8c pd: don't enable try.src when battery is not present or too low
Don't enable try.src when battery is not present or <1% because
try.src will temporarily cut off power to system.

BUG=chrome-os-partner:43413
BRANCH=samus
TEST=tested on samus using "battfake" ec command. when battery
<1%, verified that try.src is disabled and when battery >=1% and
the AP is on (dual-role toggling is on), then try.src is enabled.
verified boot without battery succeeds on samus and glados.

Change-Id: I64816bb7c9669bfeca61687bcd9a48da32e67945
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289854
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-08-02 08:17:09 +00:00
Gwendal Grignou
e94152b7e8 driver: bmi160: Add SPI access support
Add interface to access the sensor using SPI interface.

BRANCH=smaug
TEST=compile and work on new Ryu board
BUG=chrome-os-partner:42304

Change-Id: I987259a7e378de8ada3b3b55b3662e5028ea31b2
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288515
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-08-01 02:50:34 +00:00
Gwendal Grignou
5b71b33aba common: change interface to SPI flash
Allow more than one SPI master.
Add CONFIG variables to address the system SPI flash.

To have SPI master ports, spi_ports array must be defined.

BRANCH=smaug
TEST=compile
BUG=chrome-os-partner:42304

Change-Id: Id43869f648965c1582b7be1c7fb3a38f175fda95
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288512
Commit-Queue: David James <davidjames@chromium.org>
2015-07-30 19:57:55 +00:00
Vijay Hiremath
1b45f6ed71 Driver: Add macros to conditionally compile the console commands
Added macros to conditionally compile the console commands to save the
memory. These macros can be enabled/disabled in the board specific files.

BUG=none
TEST=make buildall -j
BRANCH=none

Change-Id: I108a072c333762cd24ea973612202c9cc4d40914
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/288950
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-07-29 21:18:25 +00:00
Vadim Bendebury
15135076e2 Cr50: Enable TPM-protocol data over the SPI bus
This patch adds a module which runs on top of the SPS driver and
implements the TCG SPI TPM protocol.

Basic register read and write functions are implemented as well as
rudimentary TPM state machine (claiming/releasing locality).

An enhancement is made to the SPS driver to ensure that when the CS is
deasserted the transmit FIFO is reset too, on the off chance of the CS
going away mid transaction for whatever reason.

In this implementation the slave is guaranteed to stall the master for
a few bytes in both receive and transmit transactions, which is
further aggravated by the fact that RX FIFO threshold is set to 8
(this is the minimum number of bytes the master has to send to wake up
the slave). This could be fine tuned later, for instance made a
parameter of the receive callback registration function.

BRANCH=none
BUG=chrome-os-partner:43025
TEST=trunksd initialization (with minor changes to accommodate new
     VID/DID and some status bits, to be published) succeeds with the
     cr50 connected to the USB/SPI cable.

Change-Id: I28d37c3b57dde9adf59e81426efe4f58880cf0b0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285252
2015-07-25 08:47:37 +00:00
Vadim Bendebury
6f13628e7f cr50: Use distinct configuration option for SPI Slave support
SPI slave and master interfaces require very different code to
support, they should have separate configuration options.

Host command code printouts should use their own console channel.

Using SPS to designate SPI Slave interface is not universally
acceptable, a bug has been opened to discuss the alternatives and
clean up the code.

BRANCH=none
BUG=chromium:512613
TEST=make buildall -j

Change-Id: I6683286a221c4689ecc247fdfe8ebca529f3f458
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286469
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2015-07-25 04:20:23 +00:00
Vincent Palatin
a834638b29 lid_switch: allow to specify several lid GPIOs
Add a X-macro CONFIG_LID_SWITCH_GPIO_LIST to be able to optionally
specify more than one GPIO to check to find out whether the lid is open.
By default, use GPIO_LID_OPEN as before.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=smaug
BUG=chrome-os-partner:42110
TEST=on Smaug EVT2, define CONFIG_LID_SWITCH_GPIO_LIST as
LID_GPIO(GPIO_LID_OPEN) LID_GPIO(GPIO_BASE_PRES_L) and play with magnets
and the genuine lid, check we get the right "lid open" / "lid close"
messages on the console.

Change-Id: I9e7c67bb39f36f254d31d5861d535d69db754faa
Reviewed-on: https://chromium-review.googlesource.com/287852
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
2015-07-23 22:38:06 +00:00
Shawn Nematbakhsh
d286fbd7f8 cleanup: Clarify usage of CONFIG_CHARGER_INPUT_CURRENT
Add additional comments on the usage of CONFIG_CHARGER_INPUT_CURRENT for
type-C.

BUG=chrome-os-partner:42933
TEST=Passes pre-submit check
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I00458c16fa4671f26fb00fe3ca1265ebc22a74c8
Reviewed-on: https://chromium-review.googlesource.com/287377
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-22 23:50:24 +00:00
Gwendal Grignou
d1002e798e common: Untie math_util from motion sense.
math library can be set independentely.
It is implied when motion sensor drivers are compiled in.

BRANCH=smaug
TEST=Build strago board specific tests, host test and ran
ryu image.
BUG=chromium:512329

Change-Id: I743ea7b44e4a3783602c11f3928cb3fa4b105ec4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287371
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-07-22 03:39:52 +00:00
Vijay Hiremath
cd0df39ba5 Driver: OPT3001: Add TI OPT3001 light sensor driver
BUG=none
BRANCH=none
TEST=Added OPT3001 config to test the sensor in Kunimitsu.
     Able to read the als data from "als" console command.
     Varied the light intensity and the als reading are changing.
     Driver fits into the existing ALS framework.

Change-Id: Idb2e6f9f50b6d0d6c8f64c11336efd3f2c76d498
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286782
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-07-21 01:34:27 +00:00
Vijay Hiremath
26db470b39 Skylake: Add G3 sleep mode support
BUG=none
TEST=Enabled the config and tested on Kunimitsu.
     Enter "shutdown -h now" form the Kernel console.
     Device goes to Sleep mode in G3 and charger LED turns off.
BRANCH=none

Change-Id: I962018dcfac2998ee0a11784adeceb09931b930d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286781
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-07-21 01:34:21 +00:00
Shawn Nematbakhsh
0c8ade4164 mec1322: hibernate: Fix wake-on-AC for USB-C
Fix hibernate so that plugging a USB-C charger properly wakes the
system. In addition, change the default hibernate behavior to restart
after wake.

BUG=chrome-os-partner:42104
TEST=Run 'hibernate' on Glados. Verify that wakes occur when power
button is pressed, lid switch is toggled, or when a charger is attached
to either USB-C port.
BRANCH=None

Change-Id: I54b8d58e20c35f25883238df24e7f23bb743abaa
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286660
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-20 19:13:25 +00:00
Aseda Aboagye
ce063e0829 build-infr: Add support for shared RO library.
This commit introduces the build infrastructure changes needed for
creating a shared RO library. (libsharedobjs).  The end goal is for the
library to contain various objects that can be shared with both the RO
and RW EC images.

Now, there are 3 make goals: ro, rw, and libsharedobjs.

In order for changes that are only specific to a single image (ie: RW
only) to be applied correctly, the object files are now built separately
for the RO, RW, shared objects library targets.

NOTE: Certain EC targets are incompatible with this model due to the
fact that only one image is present within flash at a time.

BRANCH=none
BUG=None
TEST=make -j buildall tests
TEST=make -j BOARD=cr50 xrefs
TEST=make BOARD=samus dis
TEST=Built samus EC image and compared that the final EC image was
identical to the upstream version (except for the git SHAs & version
strings).

CQ-DEPEND=CL:285934

Change-Id: I8e67f089710be9c6d7017718109262394bdad2f5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/274079
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
2015-07-17 03:17:50 +00:00
Andrey Petrov
ef4d930f88 cyan: fix issues with write protection
* Fixes cyan/board.h to use correct SPI part
* Adds new flash protection regions in spi_flash_reg.c
* Sets SRP register in flash_physical_protect_at_boot()
* Fixes a bug in COMPARE_BIT macro
* Makes spi_flash_set_status() fail only when both HW pin is asserted
  AND SRP(s) are set
* Makes sure set_flash_set_status() completes before returning

BUG=chrome-os-partner:40908
BRANCH=master
TEST=on Cyan:
With WP pin de-asserted:
flashrom -p ec --wp-enable
flashrom -p ec --wp-status, make sure it is enabled
flashrom -p ec --wp-disable
flashrom -p ec --status, make sure it is disabled
flashrom -p ec --wp-enable
Assert WP pin (either with screwdriver or dut-control)
flashrom -p ec --wp-disable
make sure it failed

Change-Id: I338cc906b73e723fdbb37f7c2fd0c4da358b6c8e
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/276671
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
2015-07-16 18:47:22 +00:00
Shawn Nematbakhsh
78016324ac mec1322: Allow multiple hibernate wake sources
Allow multiple GPIOs to wake the EC from hibernate by requiring boards
to define hibernate_wake_pins and hibernate_wake_pins_used. In addition,
clean up the GPIO-skipping hibernate code, and skip setting PCH_RTCRST
as an input due to a bug on certain boards.

BUG=chrome-os-partner:42104
TEST=Manual on Glados. Run 'hibernate' from EC console, verify that EC
wakes with power button press or with "dut-control lid_open:no".
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I13a6e062393cab8ed7129eda253585951f771109
Reviewed-on: https://chromium-review.googlesource.com/285924
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-07-16 05:15:29 +00:00
Kyoung Kim
0a8c6c0396 Braswell: Add support for PMIC
Added support for PMIC in Braswell power sequencing code to support
the PMIC enabled Braswell devices.

BUG=none
TEST=Tested S3, S5, G3 & PG3 on BCRD2.
BRANCH=none

Change-Id: I247ef9506d0e8065c761bfb00b9141ec8ff5ada8
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/283579
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-07-15 03:39:29 +00:00
Alec Berg
ac1cba419a cleanup: remove board_discharge_on_ac() unless custom func needed
Remove duplicate board_discharge_on_ac() functions and create
CONFIG_CHARGER_DISCHARGE_ON_AC_CUSTOM for boards that have a
unique implementation of board_discharge_on_ac().

BUG=chrome-os-partner:42294
BRANCH=none
TEST=make -j buildall.
load on samus and test 'ectool chargecontrol discharge' forces
discharging on AC, and 'ectool chargecontrol normal' resumes normal
charging.

Change-Id: I2b7c04b9278d07748d6d41798ceab1a7e90684e4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284911
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2015-07-14 22:39:36 +00:00
Kevin K Wong
776ea6b118 Braswell: Added SOC G3 / Pseudo G3 support
BUG=none
TEST=Tested on DVT 1.1, verified V3p3A is off in Pseudo G3
BRANCH=none

Change-Id: Id73b42d9f2e49239e82fad7931bbcc63e36a2c0b
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/283602
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Commit-Queue: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
2015-07-14 07:35:27 +00:00
Gwendal Grignou
a7c4132d25 driver: bmi160: Add FIFO and interrupt support
Add FIFO support, where bmi160 hardware FIFO is copied in local fifo.
Add rudimentary support for single/double tap and lift detection.

BUG=chrome-os-partner:39900
BRANCH=smaug
TEST=Check on F411 that FIFO data is retrieved and correct.
Check on Smaug as well, with proper kernel the collect the FIFO:
- check that increasing sampling_frequency we are collecting
the FIFO less often
- check no frames are lost.
- check tap/lift interrupts are working
- if latency is less than 100ms, check we are collecting much faster.

Change-Id: Ic2317c27fad0ef31dacd6e18cd5f71ccd2cec807
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274227
2015-07-10 03:40:19 +00:00
Bill Richardson
4271b631a3 Cr50: Implement host commands over SPI bus
This adds a module that attaches to the SPS driver to process
host commands delivered over the SPI slave interface.

BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall

This feature is not yet enabled, so there's nothing new to test.
That will come next.

Change-Id: If57a6fce698a7eb050e2a68b7f4d18d8b0e2956f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284010
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2015-07-08 22:29:57 +00:00
Scott
e9cd229216 pd: Add Try.SRC functionality to the pd_protocol state machine
1. Added new config option CONFIG_USB_PD_TRY_SRC
	2. Added pd_try_source_enable global flag with console command
	3. Added bit to pd.flags to indicate Try.SRC states are active

BUG=chrome-os-partner:39724
TEST=Manual samus to samus with the Try.SRC enabled on both and just
     one samus. Tested Samus to Honeybuns and Samus to Zinger connections.
BRANCH=TOT

Change-Id: Ifa5d5d82e443f376e546aaf852ff24d92ef04d72
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/282052
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
2015-07-08 19:34:14 +00:00
Dino Li
a69c63bae5 it8380dev: add flash module and fix system jump
1. Add flash control module for emulation board.
2. Fix system jump for Andes core.
3. Change the physical size of the flash on the chip to 256KB.

note:
1. Only IT839x series supports flash write protect by registers.
2. Static DMA method of flash code only for IT839x series and IT838x Dx.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=1. console command flashwp and flashinfo
       1-a. flashwp enable
       1-b. WP asserted and reboot
       1-c. flashinfo RO protected now
       1-d. WP deasserted and reboot
       1-e. No protected
       1-f. flashwp disable
       1-g. WP asserted and reboot
       1-h. No protected
     2. console sysjump and sysinfo
       2-a. sysjump rw
       2-b. jumping to image RW
       2-c. sysinfo, Copy : RW, Jumped : yes
       2-d. sysjump ro
       2-e. jumping to image RO
       2-f. sysinfo, Copy : RO, Jumped : yes
     3. RO/RW firmware image test
       3-a. sysjump rw
       3-b. use console command "eflash" to erase RO region,
            erase OK and system still work.
       3-c. reflash firmware
       3-d. sysjump rw, sysjump ro
       3-e. use console command "eflash" to erase RW region,
            erase OK and system still work.

Change-Id: I7666a095e73026a02fb812e5143bc5172ab713e8
Reviewed-on: https://chromium-review.googlesource.com/271390
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
2015-07-08 09:25:48 +00:00
Bill Richardson
806cc81491 Cr50: Simplify the API for the SPS driver
The SPS (SPI Slave) driver handles incoming traffic from the SPI
master. This abstracts the basic hardware functions into a clean
API so that the response to the SPI bytes can be put into
separate files.

BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall

If CONFIG_SPI is not defined, incoming SPI traffic is completely ignored.

Even when it's enabled, nothing is reacting to the traffic so
incoming SPI bytes return 0xFF bytes to the master (SPI traffic
is always bidirectional).

Change-Id: I9bbcebc9c5223b942362200fe43a11ac57dfff40
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283581
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
2015-07-07 09:01:32 +00:00
Vincent Palatin
cdef497a4e bq2598x: ryu: take into account hardware input current optimizer
Take profit of the hardware input current ramping/back-off integrated
in the BQ2589x charger by setting the current limits higher for BC1.2
USB modes and letting the hardware adjust to the actual charger
limitation depending on the VBUS voltage droop.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=smaug
BUG=chrome-os-partner:42045
TEST=Connect a Nexus 9 DCP charger to Smaug and see the input current
adjusted to 1650mA without brown-out, read back the value properly from
the AP:
$ ectool usbpdpower
Port 0: SNK Charger DCP 4958mV / 1650mA, max 5000mV / 1650mA / 8250mW

Change-Id: I348e5ee4980a5652f72f279ab4e3a7126583b093
Reviewed-on: https://chromium-review.googlesource.com/282584
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
2015-07-01 02:15:19 +00:00
Shawn Nematbakhsh
4a56579f21 usb_mux: Add support for Parade PS8740 chip
Initial support for Parade PS8740 Type-C redriving switch.

BUG=chrome-os-partner:41696
TEST=Manual on Glados in subsequent commit. Verify set() and get()
functions set and return consistent values. Verify that USB SS device
functions when muxes are set to dock or USB.
BRANCH=None

Change-Id: Iedbe53cc76f30ecd969c2ca99a7377ed3b193729
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/282280
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-06-30 17:18:40 +00:00
Shawn Nematbakhsh
1ef8c7dc20 usb_mux: Add driver interface for USB-C muxes
In preparation for adding support for additional USB-C mux chips, add a
new high-level USB-C mux interface usb_mux.c. usb_mux functions are now
called from pd code instead of board-level functions. usb_mux calls down
into a mux chip-specific driver (currently pi3usb30532) or
board-specific drivers which toggle GPIOs (for legacy boards).

BUG=chrome-os-partner:41696
TEST=Manual on Glados in subsequent commit. Verify set() and get()
functions set and return consistent values. Verify that USB SS device
functions when muxes are set to dock or USB. Also, verify that DP
dongle and USB SS device are functional on both PD ports on samus_pd.
BRANCH=None

Change-Id: Ib6477f489310f3be1430585ea09fea26f57e3752
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/281435
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-06-30 17:18:37 +00:00
Dino Li
60e110acd1 it8380dev: add i2c control module
Add i2c control module for emulation board.
To rename CONFIG_ to CONFIG_IT83XX_ for IT83XX series configuration.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=1. console command "i2cscan" found devices correctly.
     2. console command "i2cxfer".
         2-a. port2 + battery, i2cxfer r, r16, and rlen OK.
         2-b. port1 + slave evb, i2cxfer r, r16, rlen, w, and w16 OK.

Change-Id: I67165f7dcdef538ba6dd03b47f1621a73cc68379
Reviewed-on: https://chromium-review.googlesource.com/263678
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
2015-06-30 12:22:02 +00:00
Aseda Aboagye
52ee6aa131 config: Add missing config options to config.h
There were many CONFIG_* options that were not defined in
include/config.h.  This commit fixes that by adding those config options
that were missing with a brief description of each.

BUG=chromium:496893
BRANCH=none
TEST=Verified that every mention of CONFIG_* is in include/config.h.
TEST=make -j buildall tests

Change-Id: Ie60756a8dd48d12b3e9b775639f409455dc5656f
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/281785
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
2015-06-25 03:49:40 +00:00
Vincent Palatin
4fd15f8d91 power: ryu: ignore lid open events
Do not start the AP on lid open events,
in order to avoid spurious startup due to magnet magic.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=smaug
BUG=chrome-os-partner:41601
TEST=Play with 2 Ryu EVT2 stacked one on top of the other.

Change-Id: I530d54f61d0674caddf20d1b17268c971f639f2f
Reviewed-on: https://chromium-review.googlesource.com/281667
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2015-06-25 02:11:56 +00:00
Vincent Palatin
564256d2ee bq2589x: ryu: enable IR compensation
Set the resistance compensation for the charger IC according to the EE
team measurements :
- Resistance compensation = 60 mOhm
- Voltage clamping = 160 mV
- Thermal regulation = 120C

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=smaug
BUG=chrome-os-partner:38603
TEST=dump the BQ25892 registers by using the "bq25" command and see that
REG08 contains 0x77.

Change-Id: I90e9ea4569d77fd90ed0290ec78e66810d744648
Reviewed-on: https://chromium-review.googlesource.com/281660
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
2015-06-24 23:13:23 +00:00
Alec Berg
43db841066 pd: allow pdcmd task to check TCPC alert status w/o sending HC
Modify PDCMD task to allow for TCPCs that do not support host
commands.

CONFIG_HOSTCMD_PD is a new config option to be used by TCPCs
that implement our host command protocol such as the PD MCU on
glados and oak. Otherwise, the PDCMD task will not send host
commands and will be used simply to check TCPC interrupt status.

BUG=none
BRANCH=none
TEST=test on glados and samus and make sure we can send host
commands from the EC to the PD and that we can negotiate a PD
contract.

Change-Id: I618badb5db3f9e490ae4eedfdb2a0c54513496ff
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/278215
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2015-06-23 20:41:03 +00:00
Ben Lok
65adf18a63 oak: fixing hardware tests build errors for oak
To avoid hardware tests build errors of oak

BRANCH=None
BUG=None
TEST=make -j BOARD=oak tests

Change-Id: Ia1874c2d271508414e32e89a05763c144d9e3b84
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/277625
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Rong Chang <rongchang@chromium.org>
2015-06-15 21:08:43 +00:00
Vincent Palatin
1dfd58daf6 pd: ryu: set data role to UFP with debug accessory
When a USB-PD debug accessory is plugged, set the default data role to
UFP (USB device) on Ryu.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=smaug
BUG=none
TEST=On Ryu, plug a SuzyQ and connect with ADB using a A-A cable.

Change-Id: Ifa62b097532880ab5cadb7f2ab7774eec752f1e6
Reviewed-on: https://chromium-review.googlesource.com/277276
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
2015-06-13 02:53:48 +00:00
Shawn Nematbakhsh
2af21940a3 core: Assert if task_get_current() cannot return a valid task ID
If task_get_current() is called early during initialization when we have
not yet done a context switch, our current_task pointer is invalid. Add
an assert to detect this case and put it behind CONFIG_DEBUG_BRINGUP, a
new config that's intended to enable possibly-costly pre-production
debugging.

BUG=chrome-os-partner:40677
TEST=Manual on glados. Define CONFIG_DEBUG_BRINGUP, then call i2c_write from
board_init and verify the new assert fails. Remove the i2c_write and verify
the new assert passes.
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6014ccf739dcc4c8f4f960be2b89f01e423b65b5
Reviewed-on: https://chromium-review.googlesource.com/273541
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2015-06-12 22:21:15 +00:00
Shawn Nematbakhsh
5b7cfac64e usb: pi3usb9281: Allow flexible chip configurations
Previously we supported using a single pi3usb9281 chip, or using two
chips on the same i2c bus behind a mux. Now that we need to support a
third configuration of multiple chips on different busses, it makes
sense to be able to configure the configuration freely at the board
level.

BUG=chrome-os-partner:40920
TEST=Manual on samus_pd. Plug USB charger, verify detection is correct
on both charge ports.
BRANCH=None

Change-Id: I120dcb1c3ceb6f013b92407effcd8cb66e7ffcce
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276511
Reviewed-by: Alec Berg <alecaberg@chromium.org>
2015-06-12 16:37:39 +00:00
Anton Staaf
bd7e885ae7 Stream: Remove in_stream/out_stream interface
The in_stream and out_stream interfaces were a first attempt
at providing an abstraction for multiple stream like devices
(usart, USB, I2C/LPC host interfaces...).  But, by baking
the queue into the device it proved to be hard to use and
required additional resources (task or deferred hook) to handle
passing data from one stream to another.

Since then the queue policy and producer/consumer interfaces
have replaced the stream interfaces.  This CL removes the old
stream interfaces and updates the only users (deleting the
test echo code from the discovery-stm32f072 board and updating
the mcdp28x0 driver to use the queue interfaces).

Signed-off-by: Anton Staaf <robotboy@chromium.org>

BRANCH=None
BUG=None
TEST=make buildall -j

Change-Id: Ic0d2abf81eafc4fb2e61172540151f2d0ba45caf
Reviewed-on: https://chromium-review.googlesource.com/276163
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
2015-06-11 00:08:49 +00:00