We share the same shared memory fields for both batteries. When
the host wants to switch battery to read out:
- The host sets EC_ACPI_MEM_BATTERY_INDEX to the required index
- EC then swaps the data is the shared memory fields, then update
EC_MEMMAP_BATT_INDEX
- Host waits for EC_MEMMAP_BATT_INDEX to have the required value,
then fetches the data
BRANCH=none
BUG=b:65697620
TEST=Boot lux, both /sys/class/power_supply/BAT0 and BAT1 are
present, data is valid.
TEST=Unplug base, BAT1 goes away, replug, BAT1 comes back.
Change-Id: Icce12f9eef2f6f8cde9bae0a968a65e1703d0369
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/888382
Reviewed-by: Gwendal Grignou <gwendal@google.com>
We want to build the shmalloc common code in test mode *only* for the
shmalloc test not for all test binaries (which are missing the helper
functions).
The previous version was broken for any board declaring CONFIG_SHMALLOC
(but none were excepted cr50 which has tests disabled)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:72360575
TEST=emerge-meowth chromeos-ec
Change-Id: Ic89c74569fbadbc75d9090b084adab8f40ddfa5d
Reviewed-on: https://chromium-review.googlesource.com/909210
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This allows hashing or dumping SPI flash from the Cr50 console even on
a locked device, so you can verify the RO Firmware on a system via CCD.
See design doc: go/verify-ro-firmware
(more specifically, "Cr50 console commands for option 1")
BUG=chromium:804507
BRANCH=cr50 release (after testing)
TEST=manual:
# Sample sequence
spihash ap -> requires physical presence; tap power button
spihash 0 1024 -> gives a hash; compare with first 1KB of image.bin
spihash 0 128 dump -> dumps first 128 bytes; compare with image.bin
spihash 128 128 -> offset works
spihash 0 0x100000 -> gives a hash; doesn't watchdog reset
spihdev ec
spihash 0 1024 -> compare with ec.bin
spihash disable
# Test timeout
spihash ap
# Wait 30 seconds
spihash 0 1024 -> still works
# Wait 60 seconds; goes back disabled automatically
spihash 0 1024 -> fails because spihash is disabled
# Presence not required when CCD opened
ccd open
spihash ap -> no PP required
spihash 0 1024 -> works
spihash disable
# Possible for owner to disable via CCD config
ccd -> HashFlash is "Always"
ccd set HashFlash IfOpened
ccd lock
spihash ap -> access denied
# Cleanup
ccd open
ccd reset
ccd lock
Change-Id: I27b5054730dea6b27fbad1b1c4aa0a650e3b4f99
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/889725
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
When AP requests cold reboot, currently EC does not perform PMIC
reset because chipset_handle_reboot is executed only after EC jumps
to RW. This causes EC to miss CHIPSET_STARTUP and CHIPSET_RESUME
events because power rails do not cycle.
This patch will make EC execute PMIC reset to before vboot_main.
BUG=b:73093795
BRANCH=none
TEST=reboot, reboot ap-off, verify USB ports are powered after
transitionining to dev mode.
Change-Id: Ic04395d8a4bff45d9fc60601b07c600dfb75d9c0
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/908094
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
1. Prochot/Shutdown Point
a. Prochot on: >=81C, off: <=77C
b. Shutodwn: >=82C
2. custom fan table
There are three projects sharing two tables, and
use Kench & Teemo's table before getting correct OEM ID
because it raises fan speed quicker than the other one.
a. Kench & Teemo & default
b. Sion
BUG=b:70294260
BRANCH=master
TEST=EC can get two fan tables with different cbi value.
Change-Id: Ie1bffbcf5c353a9aae5806f6c2b41554eed22b7d
Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/886121
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
BRANCH=none
BUG=b:72722179
TEST=lidopen/lidclose, see that USB interface is getting enabled/disabled
TEST=Close/open sensor with a magnet, see that USB interface is getting
enabled/disabled
TEST=Boot with sensor open, USB interface is on
Change-Id: Ic738fa2f2adea03cd29914bb5fc96a1fa6834122
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/894783
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When RMA procedure is completed WP needs to be enabled back.
BRANCH=cr50, cr50-mp
BUG=b:37952913, b:73075443
TEST=on a Robo device, verified that WP is enabled, took the device
through RMA unlock, verified that WP is disabled, took the device
through RMA disable, verified that WP is enabled again.
Also confirmed that after RMA is disabled WP status follows the
battery.
Change-Id: Iad6af7d16aadcd10d580f709aeb942cf508a8489
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/905926
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The TPM task is running on a higher priority than the hook task
invoking TPM reset for RMA purposes. The waiting task ID value needs
to be set before TPM task is signaled to reset.
BRANCH=cr50, cr50-mp
BUG=b:37952913
TEST=with the corresponding ccd_config.c changes fully verified RMA
process (not just generating and processing the challenge).
Change-Id: Id112d59ae0c3fd31a32e652c6a043fc3fd3bbe07
Signed-off-by: Vadim Bendebury <vbendeb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/905925
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Indentation in charger_task is getting out of control, let's move
the logic to a new function.
BRANCH=none
BUG=b:71881017
TEST=Flash lux and wand, battery algorithm works as expected.
Change-Id: Ife008370218f0d9eb0f96088ec144b0aba40716f
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/901442
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
On dual battery systems, this allows to keep both batteries
information in similar structures. This also means that battery
information can only be fetched via host commands
EC_CMD_BATTERY_GET_STATIC/DYNAMIC (next CL will make it possible
to fetch the information via shared memory/ACPI).
BRANCH=none
BUG=b:65697620
TEST=Boot lux/wand, dual-battery algorithm works, AP can fetch
both battery information via host commands.
Change-Id: I3c087e8f378c5cef0006f6bfe58335228a880e5b
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/888381
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit adds support for a common framework for PWM controlled LEDs.
If there are multiple LEDs, they will all follow the same pattern. The
pattern is such that it follows the Chrome OS LED behaviour
specification, essentially a similar version of led_policy_std.c but for
PWM controlled LEDs.
To use this framework, a board must do the following:
- First, define the number of logical PWM LEDs which will be controlled
by this common policy, CONFIG_LED_PWM_COUNT.
- Then declare those logical LEDs and define the PWM channels that
comprise those LEDs. (struct pwm_led pwm_leds[]).
- Next, define what each color should look like (struct pwm_led
led_color_map[]).
By default, the colors follow the recommended colors in the LED
behaviour spec, which assume an LED with a red and green channel. If a
board differs or wishes to change the colors in general, they can
redefine the colors (CONFIG_LED_PWM_*_COLOR) as they see fit. The
colors must be one in enum ec_led_colors. These colors are the ones
that can represent the charging state, SoC state, etc.
BUG=b:69138917,chromium:752553
BRANCH=None
TEST=make -j buildall
TEST=Enable led_pwm for meowth, and verify that LEDs behave as expected.
Change-Id: I945b86a7f8ed30df58d7da835d83577192548bea
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/888220
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Keyboard matrix scanning can be disabled when the USB interface is
disabled without setting the remote wake feature
(USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP), as events would be
ignored anyway.
BRANCH=none
BUG=b:72683995
TEST=keyboard matrix scanning is disabled when lid is closed.
Change-Id: I0b2346cc3426b9ef51127424f9953fd5c20ecd49
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/897068
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch makes EC enable PD communication if it's running in
manual recovery mode. This is required to show recovery screen
on a type-c monitor.
This patch also makes EC-EFS ignore power availability. It will
make EC verify & jump to RW even if power is sourced by a barrel
jack adapter. This should allow depthcharge to show screens
(e.g. broken, warning) on a type-c monitor.
BUG=b:72387533
BRANCH=none
TEST=On Fizz with type-c monitor, verify
- Recovery screen is displayed in manual recovery mode.
- Critical update screen is displayed in normal mode.
- Warning screen is displayed in developer mode.
Monitors tested: Dingdong, Dell S2718D
Change-Id: Ib53e02d1e5c0f5b2d96d9a02fd33022f92e52b04
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/898346
Reviewed-by: Randall Spangler <rspangler@chromium.org>
To avoid issues where adapter would drive against OTG of lid or
base, and to make sure that we do not over-current the adapter,
we disconnect the base/lid power transfer whenever a new
adapter is connected.
We reenable power transfer as needed.
We also separate out base current control as a new function,
that allows us to record the previous base current only when
the base charge control command is successful, and ignore
errors until the base is responsive for the first time.
Finally, we make sure that
charge_allocate_input_current_limit is only called from a
single location in charger_task.
BRANCH=none
BUG=b:71881017
TEST=Plug/unplug base, reset lux EC, connect charger.
Base is detected, power allocation works as expected.
Change-Id: I8b206d5b0fbcf0fe868b56a0336745aebe2a6dc2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/880021
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In particular, this will allow touchpad driver and keyboard matrix
scanning to be powered off/disabled when the USB interface is
disabled without setting the remote wake feature
(USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP), as events would be
ignored anyway.
BRANCH=none
BUG=b:72683995
TEST=With next CLs, touchpad and keyboard matrix scanning are disabled
when lid is closed.
Change-Id: I3750bfaf8c31cde075adf9da4fef39753b8981c5
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/897067
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch makes EC_CMD_SET_CROS_BOARD_INFO return
EC_RES_ACCESS_DENIED if the command fails due to write-protect
switch.
BUG=b:70294260
BRANCH=none
TEST=Verify 'ectool cbi set 2 4' prints 'WP enabled?' when WP
is enabled.
Change-Id: I7c27ee748caf32e57f22ab79edcbff96e42c44ad
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/897683
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Automated code scanner highlighted a few problems in the recent ode
additions. This patch fixes the problems.
BRANCH=cr50
BUG=none
TEST=none
Change-Id: I1f199eb5d2af992384ab04f3010b4b646464a70f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/897993
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Prevents a null pointer dereference when the AP asks the EC
for nonexistent settings of a sensor.
BUG=chromium:761758
TEST="ectool motionsense offset ${ID of baro_bmp280 sensor}"
And see no null pointer dereference, but an invalid command error
BRANCH=master
Change-Id: I3050feaa3c9752abebc30237dac1befa4e5775cc
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/850639
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
If the sn5s330 PPC is being used to detect VBUS presence
(CONFIG_USB_PD_VBUS_DETECT_PPC), then enable interrupts and call
usb_charger_vbus_change when VBUS_GOOD changes.
BUG=b:72007153,b:72007492
BRANCH=none
TEST=Connect 3A and 1A USB-A chargers to each of Grunt's USB-C ports,
check that BC1.2 detection is working:
With 1A:
> chgsup
port=0/1, type=7, cur=500mA, vtg=5000mV, lsm=1
With 3A:
> chgsup
port=0/1, type=7, cur=2400mA, vtg=5000mV, lsm=1
TEST=Boot Grunt to OS, then connect USB2 mouse or USB3 flash drive to each
of Grunt's USB-C ports. Devices do not work due to b:71772180, but gpioget
shows EC is setting USB_C0/1_BC12_VBUS_ON_L correctly.
Change-Id: Iffc352105a321997adb364b9fbb8bafef248c224
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/887938
Reviewed-by: Jett Rink <jettrink@chromium.org>
Boards with a PPC will use the PPC to discharge the VBUS line instead
of the TCPC or GPIO discharge path.
BRANCH=none
BUG=b:72179253
TEST=Fall time after device removal on grunt within spec now
Change-Id: I822923a1cedb32a20efc3610cce4437ade3387f0
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/886563
Reviewed-by: Edward Hill <ecgh@chromium.org>
It's no longer necessary to call board_tcpc_init() from PD tasks, since
HOOK_INIT completion is guaranteed before the task starts. Also, calling
board_tcpc_init() for each PD task without a port arg is a bad idea.
BUG=b:72229154
BRANCH=none
TEST=`make buildall -j`
Change-Id: I6fba07771693b8343568041960a263e02775a8fc
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/881538
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
The logic of drawing as much current as possible when no battery
is connected (on the lid), and system unlocked, makes sense during
early bringup.
However, it will not work when the base is also connected, as we
did not implement the required no-battery logic in the base/lid
power allocation algorithm (nor do we plan to, as it is only
required during very early bringup, when we should not expect
power transfer between lid and base to work properly).
Also, we need to record input_voltage in
charge_set_input_current_limit, even when lid battery is not
present (yet), otherwise the algorithm gets confused and believes
no power is available.
BRANCH=none
BUG=b:71881017
TEST=Boot lux from dead battery and base connected, lux does not
attempt to drive OTG to the base.
Change-Id: I0cdd0956a82a724dbbf9c010760dcb956a58c1bf
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/874982
Reviewed-by: Shawn N <shawnn@chromium.org>
Instead of fetching static battery information all the time, we
first fetch the dynamic information, and see if the flags changed.
If they did, refetch the static information.
This also covers the cases when the base is disconnected/reconnected.
BRANCH=none
BUG=b:71881017
TEST=ectool battery 1 shows correct static battery information after
plug/unplug.
Change-Id: I936983fc0fdc4dae0494e8a24f890927e30555dc
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/872813
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Allow to have CONFIG_MALLOC defined for one partition and not the other.
The typical use-case is asymetric firmware whose small RO is typically
just an updater/verifier (and RW signature verification currently
doesn't like malloc as the memory initialization is done too late).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:72360575
TEST=make buildall
Change-Id: I67cc04cd11385d4c05556ea41ef674cb7a232e65
Reviewed-on: https://chromium-review.googlesource.com/885820
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
First version of the algorithm, some TODOs are left in the code
but this, generally, works reasonably well.
When charging, we allocate input current in this general order:
- Base system (fixed, low, number)
- Lid system (based on PSYS)
- Lid battery (estimating how much current the battery actually
requires)
- Base battery (similar estimation)
- Provide everything else to lid
When discharging, we generally:
- First discharge the base battery
- Then discharge the lid battery
BRANCH=none
BUG=b:71881017
TEST=Flash lux and wand, EC-EC communication works, adapter power
is split in a sensible way, and discharging works fine.
Change-Id: I8a4f87963962fc5466b2fedf1347eb4dadd35740
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/659460
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Some chargers don't respect the SRC.Open state within the 20ms allotted by
the usb spec. The LiteOn Charger seems to notice after ~120ms bumping to
200ms so we cutoff Vbus for even ill-behaved chargers. We expect to brown
out in the sleep.
BRANCH=none
TEST=LiteOn charge will disconnect now
BUG=b:72510370
Change-Id: Ief0e999ed52f39420eed5f07432273e741a14c7e
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/886833
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
We don't want the PPC to connect the CC lines from the
TCPC to the USB connector until the TCPC resistors are
set in a valid state (SINK initially).
If we connect the CC lines (happens in the ppc_init) before
setting the resistor values, some TCPC will be toggling the
CC line between Rp/Rd since it doesn't detect a cable yet.
In the dead battery charging case, connecting the toggling
CC lines to the charger can rail the CC lines to 3.3 V signaling
to the charger to disconnect Vbus, thus browning out the board.
BRANCH=none
BUG=b:71865251
TEST=Grunt powers on via usbc p0 with and without USB hub.
Change-Id: I8e78aa2af42075398fab89a2dccef5e7df27b260
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/882305
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Update the FP MCU interface to include a few convenient diagnostics
functions for factory testing.
It's mostly backward compatible, but overall this interface never
shipped in anything, so not a big deal regardless.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:71986991
TEST=ectool --name=cros_fp fpinfo && ectool --name=cros_fp fpcheckpixels
CQ-DEPEND=CL:*546799
Change-Id: Ic641f891ace02d79af9339cf6cb59a2960e506a7
Reviewed-on: https://chromium-review.googlesource.com/873924
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Host command handler prints every single host command except when
commands are repeated back-to-back. This patch allows each board
decide which commands should be ignored. When debug printf is
suppressed, a global counter is incremented. Developers know there
were commands processed but not reported to the console.
BUG=chromium:803955
BRANCH=none
TEST=Observe 0x97 and 0x98 were not printed. Global suppress
counter is incremented.
Change-Id: I05e8cde9039f602e8fc06c20e89b328e797bd733
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/876952
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch adds CBI_GET_RELOAD flag to EC_CMD_GET_CROS_BOARD_INFO
command. When the flag is set, the command will be forced to read
data from EEPROM even, ignoring the data cached by the previous
read.
This allows ectool to verify a write was successful without reboot.
BUG=b:70294260
BRANCH=none
TEST=ectool cbi set 0 0x1234 && ectool cbi get 0 1
Change-Id: I3e7ced5be56a74c605870a4c0622c0a2f47963bb
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/874155
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch makes read_board_info retry to read CBI on error. The
successive calls will be immediately returned with the cached result.
This will avoid attempting reads doomed to fail.
BUG=b:70294260
BRANCH=none
TEST=ectool cbi get 0
Change-Id: Iacd9cc38bab814af9188c4557c2ee751c421e3a3
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/872259
Reviewed-by: Randall Spangler <rspangler@chromium.org>
BRANCH=none
BUG=b:65697962
TEST=On wand, battery information is quickly updated after
(un)pluging AC on lid (otherwise we might have to wait up to
60 seconds).
Change-Id: I2bd457ba4d38aa4c99638a2576a4132406416de2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/859401
Reviewed-by: Shawn N <shawnn@chromium.org>
This patch adds host command to write board information in EERPOM.
BUG=b:70294260
BRANCH=none
TEST=Run ectool cbi set <type> <value> to write BOARD_VERSION, OEM_ID,
and SKU_ID. Enable WP and verify cbi set command fails.
Change-Id: I39536d146313408ace666f350a107d89b331bf7a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/865570
This patch adds host command to get board info from EEPROM.
BUG=b:70294260
BRANCH=none
TEST=Run ectool cbi get <type> to get board version, OEM, SKU
Change-Id: I41a84d3eea6da9d88fa8122db36dcd1df515842d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/865161
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch adds Cros Board Info APIs. It reads board info from EEPROM.
This patch sets CONFIG_CBI for Fizz to make it use CBI.
BUG=b:70294260
BRANCH=none
TEST=Read data from EEPROM.
Change-Id: I7eb4323188817d46b0450f1d65ac34d1b7e4e220
Reviewed-on: https://chromium-review.googlesource.com/707741
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
pwr_avg provides an average voltage, current, and power over the last
1 minute. It's up to the battery drivers to implement this
functionality.
This change allows us to have better power tracking while minimizing
the power impact on the EC, because
- the pwr_avg command only needs to be called once every minute, and is
short, thus less expensive to parse on ECs without a UART buffer
- the work done to keep the avg is partially done by the batteries
already and it's just a question of retrieving it.
undefined on wheatley since no power debugging planned on that board.
usage:
> pwr_avg
mv = 7153
ma = -605
mw = -4327
BUG=chromium:752320
BRANCH=None
TEST=make buildall -j
Change-Id: Id1a3479d277aedf90dfa965afb4ee9136654b1cf
Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/823884
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds support for EC_CMD_BATTERY_GET_STATIC and
EC_CMD_BATTERY_GET_DYNAMIC host commands, that can currently only
fetch the base battery information using index = 1.
In the future, all battery information can be passed to AP using
these host commands (i.e. lid could provide its own battery
information on index = 0).
BRANCH=none
BUG=b:65697620
TEST=ectool battery shows lid battery information (no change)
TEST=ectool battery 1 shows base battery information
Change-Id: Ib819e4917b3acc337348764f6cc2aa7380bed700
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/863863
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When user is trying to execute 'ccd open' or 'ccd unlock' and password
is set, the return error code does not allow to tell the reason for
the command failure.
Let's add a distinct return code to indicate this condition so that
the user can supply password.
BRANCH=cr50
BUG=b:62537474
TEST=verified along with the accompanying gsctool modifications.
Change-Id: I286f87ab12114cd7dd7ebcdf0e321f7a24723367
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/861208
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When TPM is wiped out on 'ccd open', the TPM reset could be invoked on
the TPM task context, if physical presence verification was not
required, or on the hooks task context, if PP was required.
This patch makes sure that the proper TPM reset is invoked depending
on the context. Also fixing the return value in ccd_command_wrapper(),
because it is expected to be from the ec_error_list enun, and this is
what is returned in the vendor command error response payload.
BRANCH=cr50
BUG=b:62537474
TEST=verified that TPM and device reset happen smoothly in both cases
when 'ccd open' requires and does not require PP.
Change-Id: I1935fc90b386bb8f2158001e153da371fca22d03
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/861206
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When implementing 'ccd open' and 'ccd unlock' through gsctool, we need
to be able to pass to the host the state of the physical presences
state machine regarding the expected user action (pressing the PP
button).
Two new VENDOR_CC_CCD subcommands are being added: CCDV_PP_POLL_OPEN
and CCDV_PP_UNLOCK. In response to these commands, the Cr50 always
returns VENDOR_RC_SUCCESS return code and a single byte payload
showing the CCD and PP state:
- CCDPP_CLOSED - PP process is not running, CCD closed. Maybe user
missed a button press deadline.
- CCDPP_AWAITING_PRESS (self explanatory)
- CCDPP_BETWEEN_PRESSES (self explanatory)
- CCDPP_PP_DONE - CCD is opened/unlocked (as per user request), PP
process succeeded.
BRANCH=cr50
BUG=b:62537474
TEST=with the upcoming change to gsctool verified that PP states are
properly conveyed to the user.
Change-Id: I97b1fef4440eea93c5c5ac01b7c60bfce9a4595c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/861001
Reviewed-by: Randall Spangler <rspangler@chromium.org>
