Add a way for boards to permit or deny access to the I2C port. This
works in a board-specific manner.
All I2C master traffic requires that board_i2c_claim() be called
first. A dummy function is provided for boards which do not require
this.
BUG=chrome-os-partner:10888
TEST=manual:
build for all boards
boot on snow (cannot test i2c as it is broken)
Change-Id: I786d4ae17f1d798faf13b303b5389679fb6720cb
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26141
This allows us to prepare a dma transaction in advance, and quickly
start it when needed.
BUG=chrome-os-partner:10533
TEST=build and boot on snow
Change-Id: Ib7d843b2d3a5cd94b6025b9741db1794ebbcfda0
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26449
This reverts commit 7af4172be4afad9d576549721a82b3a47d701647 / Iac605b879b3556f33af5585b298ada6bc4f52c90.
This change bypassed the commit queue and broke daisy as a result.
BUG=chrome-os-partner:10533
TEST=build and boot on snow
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I7a05ab42f71a901d167bde977f8a025c7ef62dfc
Reviewed-on: https://gerrit.chromium.org/gerrit/26379
Reviewed-by: David James <davidjames@chromium.org>
Tested-by: David James <davidjames@chromium.org>
This allows us to prepare a dma transaction in advance, and quickly
start it when needed.
BUG=chrome-os-partner:10533
TEST=build and boot on snow
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Iac605b879b3556f33af5585b298ada6bc4f52c90
Reviewed-on: https://gerrit.chromium.org/gerrit/26166
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Commit-Ready: Simon Glass <sjg@chromium.org>
Rather than a channel number, use a pointer. Also we don't need a
return value, since this function cannot fail.
BUG=chrome-os-partner:10533
TEST=build and boot on snow
Change-Id: I9d7e567a9f3d496184fd28f0820ad798b1c43a28
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26165
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Access to dma is currently via a channel number. It is more efficient
to export a pointer to the dma channel since it avoids the conversion
on every API call. This helps, because dma is often on the critical
path.
Export the function to provide a pointer to a dma channel given its
number.
BUG=chrome-os-parter:10533
TEST=manual: build for all boards
Change-Id: I0318e59dbb1b9077f0445804692ca7ea99cf6581
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26164
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This is ~4x as fast as flashing the entire EC image, and is similar to
the existing flash_link_a command.
BUG=none
TEST=from openocd prompt, flash_link_ro
Change-Id: I04160af3d7d70028f8d2789480094c283a1ce2ab
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26268
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
At present there is quite a bit of duplicated code. Create a new
i2c_transfer() function to take care of this.
BUG=chrome-os-partner:10888
TEST=manual:
build for all boards
boot on snow (cannot test i2c as it is broken)
Change-Id: I3672cc4ff9de4e2e0deaec2997590ee892ef09aa
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26140
When we are transmitting a response to the EC, we don't want to race
with the TX empty interrupt handler. So just disable I2C interrupt
during the transmission.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=on Lucas DVT, use the keyboard and see we are no longer getting
"bad checksum" in the kernel log.
Change-Id: Ic59532d1ac0a3eabb67ba0d498940986282bd87f
Reviewed-on: https://gerrit.chromium.org/gerrit/26162
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
- most events happen in the first 100us, we don't want to sleep to 2ms.
This introduces big delays. Just poll the 150us, then fall back to
sleep.
- restore properly the port state after master transfers.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=On Lucas DVT, probe I2C signals with logic analyzer and manually
check them. Verify that the keyboard is still working with the charging
code enabled.
Change-Id: Ic0afde081d070ff6720d924469ecc7166bbc9e4c
Reviewed-on: https://gerrit.chromium.org/gerrit/26161
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
There isn't a good reason for doing things this way, so tidy up the
code and remove the TODO.
BUG=chrome-os-partner:10533
TEST=manual:
build and boot on snow
Test writing of flash still works using U-Boot command
Change-Id: I66a8f16072dc28f24c493af7674f7be5d838529c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26163
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Needed for EC software sync so the AP can verify the EC's RW code and
tell the EC to jump to RW when necessary. If the AP then decides it
doesn't need to stay booted, the AP can shut back down. (The AP
verifying the EC's code and/or shutting back down are NOT part of this
CL...)
Also add a Power+Refresh+DownArrow key combination which causes the EC
to reset WITHOUT powering on the AP; this will be needed for debugging
the AP power-on sequence.
BUG=chrome-os-partner:10892
TEST=manual
1) power+refresh+down -> ec reboots, system stays down
2) power+refresh+esc -> ec reboots, system to recovery
3) power+refresh -> ec reboots, system boots
4) hibernate, then open lid -> ec reboots, system boots
5) hibernate, then power button -> ec reboots, system boots
6) yank battery, then reconnect -> ec reboots, system boots
7) reboot ec -> system boots
8) 'sysjump A' when AP already booted -> system stays on
9) 'sysjump A' when AP shut down -> system boots
Change-Id: I65d2f7d9cca3acb84b76302cdcd8c8a800f03253
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26158
Don't check if we've jumped to this image (which preserves the reboot reason,
so was causing us to re-check).
BUG=chrome-os-partner:10890
TEST=manual
1) power+refresh; should see EC print [KB boot key 0]
2) sysjump A; should NOT see [KB boot key 0]
Change-Id: I46cc60358e1d1952484f52147787fee06e4ff69f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26155
Reviewed-by: Simon Glass <sjg@chromium.org>
Keyboard scan module now owns the recovery key state on all platforms.
And clean up a few comments to linux kernel style
BUG=chrome-os-partner:10890
TEST=manual
- Power on system. Should boot normally.
- Power+Refresh+D. Should turn dev switch on.
- Power+Refresh+F. Should turn dev switch off.
- Power+Esc. Should reboot system. Power button should power on normally.
- Power+Refresh+Esc. Should power on into recovery mode.
- Then press power to shut system down.
- Power button should power on normally (not back into recovery mode).
Change-Id: I4d16e1e8b039efeacbd41e8acec115844bc8457d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26147
Reviewed-by: Simon Glass <sjg@chromium.org>
And if RW B isn't enabled, it's not even linked.
BUG=chrome-os-partner:10881
TEST=on link, should be no B image, and 'sysjump B' should fail
On BDS, still should be A and B images
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: Icb2af07881cc7e28b9b877f45824486a22fde8d7
Reviewed-on: https://gerrit.chromium.org/gerrit/26116
This ensures the keyboard backlight will go off even if the chipset
shuts down due to overheating (or some other unclean shutdown).
(Also fixes inter-function line spacing to linux kernel coding style
and reformats a few comments.)
BUG=chrome-os-partner:10718
TEST=manual
1. power on system
2. turn on keyboard backlight (kblight 100 at EC console)
3. power off system (for example, via power button)
4. keyboard backlight should turn off
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I5bbcd1681ae9c972c9875e9c720617bdf51e3d64
Reviewed-on: https://gerrit.chromium.org/gerrit/26039
At this point, EC code requires EVT. If you still have a proto1,
here's what'll break:
1) Keyboard recovery mode checks refresh key, and may read unreliably due
to proto1 silego reset circuit.
2) Lightbar may not start in the correct state.
3) EC 'hibernate' command will not work.
4) Board version may read incorrectly.
BUG=chrome-os-partner:9661
TEST=manual
1) powerbtn -> system powers on, lightbar displays proper sequence
2) version -> board version 1 (EVT)
3) power+refresh+esc -> system boots into recovery mode
4) power+refresh, then power button -> system reboots, then boots normally
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I699946e365d15ae38622b69da1a0241e72d05f61
Reviewed-on: https://gerrit.chromium.org/gerrit/26053
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
A host command to set fan duty cycle is recently added and mock PWM
module doesn't provide the implementation. This breaks our unit test.
Let's fix this.
BUG=chrome-os-partner:10820
TEST='thermal' unit test passed.
Change-Id: I8644742cfec7d2112d7ff1e266b5ac3429c46945
Reviewed-on: https://gerrit.chromium.org/gerrit/26019
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
This forces the fan PWM duty cycle to a fixed percentage (0-100). It's only
used for airflow testing.
BUG=chrome-os-partner:10747
TEST=manual
Using this ectool, try
ectool fanduty 0
ectool pwmgetfanrpm
ectool fanduty 50
ectool pwmgetfanrpm
ectool fanduty 100
ectool pwmgetfanrpm
You should see (and hear) the fan speed up. If you have an EC console, you
can run
faninfo
and it should show that the 'Target:' is unrelated to the 'Actual:' value.
Change-Id: Iac332fb3ba63f96726cf7f64061b3ce22d2e76fd
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25965
Reviewed-by: Randall Spangler <rspangler@chromium.org>
If the EC shares the I2C-2 bus with the battery and the charger, we
don't want to be a master on that bus when the AP is ON and can send us
I2C messages.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=none
TEST=on Lucas DVT, check we can read battery info when AP is OFF and we
cannot when AP is ON.
Change-Id: I920a10ae9eff31bd00e4d3a5aec19d6f03b65a33
Reviewed-on: https://gerrit.chromium.org/gerrit/25959
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:10747
TEST=manual
Boot the CPU (the fan is off otherwise). From the EC console run
faninfo
It should show the fan duty cycle changing to maintain a specific RPM.
Run
fanduty 50
faninfo
Now the fan duty cycle should be fixed around 50%.
Change-Id: I13e4b0a7e5b2661769d64bf93342483d0419545d
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25900
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The flash commands syntax has slightly evolved
and the watchdog needs to be switched off even though we are doing a
reset halt.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:7420
TEST=flash Link EC using OpenOCD inside the chroot:
sudo USE="ftdi" emerge openocd
sudo openocd -f chip/lm4/servo_v2.cfg
flash_link
Change-Id: Ieef5df682a945646525267a7b702e953796f3f00
Reviewed-on: https://gerrit.chromium.org/gerrit/25561
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Rather than just reset with no information when we hit a watchdog, try
to anticipate the problem and display a trace message as on lm4.
This solution is not ideal since we must constantly reset the WWDG to make
it work. It may be better to look at dedicating a timer to this purpose
instead, since we are really just shadowing the IWDG and don't actually
need the reset functionality.
One problem is that we now have a fairly short time limit on many
operations, since if we can't service an interrupt within about 30ms then
the WWDG will reset the system.
It also affects JTAG since it seems that the watchdog goes off the first
time JTAG is invoked to program the flash. The solution here is to retry.
For these reasons it is implemented as an option, CONFIG_WATCHDOG_HELP.
BUG=chrome-os-partner:10145
TEST=manual:
build for all boards
On snow:
> waitms 500
See that there is no message
> waitms 1300
Time: 0x0000000000733ba3 us
Deadline: 0x00000000006b6db2 -> -0.511473 s from now
Active timers:
Task Ready Name Events Time (s)
0 R << idle >> 00000000 0.000000
1 R WATCHDOG 80000000 0.000000
2 KEYSCAN 00000000 0.000000
3 GAIAPOWER 00000000 0.000000
4 R CONSOLE 00000000 0.000000
5 HOSTCMD 00000000 0.000000
--- UART initialized after reboot ---
[Reset cause: watchdog]
[Image: RO, snow_v1.1.32-8c00326-dirty 2012-06-03 07:54:29 sjg@sglass.mtv.corp.google.com]
done
Change-Id: I042fcc9ecd9c21210ea3826ca69c943aab949d1f
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24398
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
We want this function to be available for all chips, so move it into a
generic place.
The task_disable_irq() from the LM4 version can be left in
watchdog_check(), to keep the watchdog_trace() function generic.
BUG=chrome-os-partner:10145
TEST=build for all boards
Change-Id: I98c60ce5958f1498b84a233ef04290a68a7838c5
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24397
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The SCB registers are defined in the ARMv7-M architecture, so they are
common to all chips.
We will need System Control Register (SCR aka SYSCTRL) to implement
power management on stm32.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make BOARD=link && make BOARD=snow
Change-Id: I35c283731306541b3d21398c96fdca89954fe20a
Reviewed-on: https://gerrit.chromium.org/gerrit/25392
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Note that util/comm-lpc.c already does this for the host side of the
commnunication.
BUG=chrome-os-partner:10444
TEST=none; all EC responses are currently well-formed
(but do try 'ectool hello' from host and make sure it still works)
Change-Id: I731ed326e281be6a7435edfa03c783225e105b72
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25124
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Previously, the host could write to this space and corrupt the memmap data.
BUG=chrome-os-partner:10210
TEST=manual
From a root shell:
localhost ~ # io_read32 0x960
0x574e5553
localhost ~ # io_write32 0x960 0x1234
localhost ~ # io_read32 0x960
0x574e5553
That verifies that the EC is rejecting host writes on the memmap range
localhost ~ # ectool hello
EC says hello!
That verifies the host is still able to write to the user param range
Change-Id: I8c29571f439a14f308ed73f4c641264e17f944e9
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25115
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This bug unexpectedly comes from 2 related features:
1. Issue chrome-os-partner:7486: stop driving keyboard columns ASAP when
power button is pressed. This is to avoid the keys on ESC column to
reset the system if the power button is also pressed. This is done by
keyboard_enable_scanning(0) in power_button_interrupt().
2. During the booting, the power button state is set to BOOT_RECOVERY and
will ignore the power button release (to avoid confusing the host).
However, before the state is set back to IDLE, the
power_button_interrupt() can be triggered ever so that the matrix scan
is disabled.
Therefore, we have to enable the matrix scan in the BOOT_RECOVERY (and
the derived EAT_RELEASE) because they ignore power button release.
Note that in the regular states, the power_button_released() is called
after debounce time. They are fine.
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
BUG=chrome-os-partner:10358
TEST=Press ESC+Refresh+Power for many many times with vatious hold time.
The tab key works to disable the recovery reason.
Change-Id: Ic05fc6e22caadb4a3892a4b201dd5bfc7e9c3f44
Reviewed-on: https://gerrit.chromium.org/gerrit/24991
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
When recovery is required, it will be because there's either a hardware pin
pulled somewhere, or because the recovery_reason is set in NVRAM. Coreboot
and U-Boot can see both of those, so the EC shouldn't make up a new reason.
If it does, it changes the original cause.
BUG=chrome-os-partner:9706
TEST=manual
Reset the EC using ESC+Power (Refresh+Power on EVT). At a root shell, run
crossystem recovery_request=11
reboot
When you see the Recovery screen, press TAB. It should say
recovery_reason: 0x0b We have no idea what this means
Prior to this fix, you'd see recovery_reason 2 instead, which is wrong.
Change-Id: Ie54185471927e7e829962d30bba9d142d593088f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24152
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When kb_fifo_start is 0, the index calculation yields -1 because C got
the mod (%) operation arguably wrong. By adding KB_FIFO_DEPTH to the
index before computing the mod with respect to KB_FIFO_DEPTH, we avoid
the negative case and (obviously) produce the same result in all other
cases.
BUG=chrome-os-partner:10247
TEST=saw incorrect state from kernel log before fix: could not repro after.
Signed-off-by: Luigi Semenzato <semenzato@chromium.org>
Change-Id: I3a30c229dc9f762dd45203e842128811a24cf53f
Reviewed-on: https://gerrit.chromium.org/gerrit/24730
Tested-by: Luigi Semenzato <semenzato@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Luigi Semenzato <semenzato@google.com>
We were going straight to S5. When the PCH first goes into S5 after
power-loss, it decides to boot for some reason. So, stay in G3.
Still exit G3 if waking from hibernate or if the power button is
pressed when the EC boots on a power-on reset.
BUG=chrome-os-partner:10239
TEST=manual
1) Unplug battery and AC power. Plug in AC power. System does not boot.
2) Press power button. System boots now.
3) From console, 'hibernate 10'. Close and open lid. System boots.
4) From console, 'hibernate 10'. Press power button. System boots.
5) Hold power+esc+refresh. System boots into recovery.
6) Hold power+esc. EC reboots. Release esc. System stays off.
7) Unplug battery and AC power. Plug in AC power while holding power button.
System boots.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I7612a40ab5ebe41d356ac3a6b89cedf1174125f4
Reviewed-on: https://gerrit.chromium.org/gerrit/24729
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
EVT uses power+refresh as the Silego combination not power+esc, so
holding down power+esc+D wouldn't turn on the fake dev switch, and
holding down power+refresh+D wouldn't either because on a short enough
tap the EC would measure refresh as still held down.
BUG=chrome-os-partner:10210
TEST=manual
1) hold down reset combo + D -> turns on fake dev mode
2) hold down reset combo + F -> turns off fake dev mode
Change-Id: I85b51d3684500ae821513e71a2cd01aa4fcf5e8f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24646
Should be no functional changes; this is just rearranging code.
BUG=none
TEST=boot system and type on console; should still work
Change-Id: I1c0d44db2d32048b1aaf458728b887b4a008c8cd
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24644
Some things about watchdogs are common across Cortex-M3, so create a
common watchdog file to hold these. Put the watchdog task in there as
the first customer.
BUG=chrome-os-partner:10145
TEST=build for all boards
Change-Id: Id55f71a807ee12bae3758afc213c30c731eadc07
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24395
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Use the same prototype for watchdog_init() everywhere. One version takes
a parameters and one doesn't. We don't need the parameter since we have
a #define. Tidy this up.
Also move watchdog defines into watchdog.h.
BUG=chrome-os-partner:10145
TEST=build for all boards
Change-Id: I38ae63d7cc137b93017c850e767703d5f90f56ad
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24394
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We don't really need this, and want to free up the LED for other
debugging uses, so drop it.
BUG=chrome-os-partner:10145
TEST=build and boot on snow (for want of a better test)
Change-Id: I62aad38e9b29556dde0a3bf8e10a85df577a8e73
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24392
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Keyboard recovery used to persist until the next time the EC was
reset. It should release the next time the user turns on the system
via the lid or power button.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:10034
TEST=manual
1. power system on normally. not in recovery.
2. press Power+Esc+Refresh. System turns on into recovery.
3. shut system down
4. power system on with lid-open. System boots normally.
5. repeat steps 2-3, then power system on with power button. System boots normally.
Change-Id: I455c7191d128614629c50ba27d7ef977e414fe90
Reviewed-on: https://gerrit.chromium.org/gerrit/24409
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
We need to be able to toggle these signals to increase test coverage.
BUG=chrome-os-partner:9967
TEST=Toggle 'ectool wireless' and see GPIO signal changes.
'ectool backlight 0' and see LCD backlight turn off.
Change-Id: Ic96fe26aa82c33b0e51e1f973280a0edc322f158
Reviewed-on: https://gerrit.chromium.org/gerrit/23625
Commit-Ready: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
A polling mode I2C master driver. Interfaces for read/write byte
and word are implemented. i2c_read_string() is currently an empty
function.
CONFIG_SMART_BATTERY added to daisy board for testing.
Move smart_battery.o back to CONFIG_SMART_BATTERY since it is not
depended on charging state machine.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:9724
TEST=manual/host commands
> battery
Temp: 0x0bad = 298.9 K (25.8 C)
Manuf:
Device:
Chem:
Serial: 0x0001
V: 0x1cb7 = 7351 mV
V-desired: 0x20d0 = 8400 mV
V-design: 0x1c20 = 7200 mV
I: 0x0000 = 0 mA
I-desired: 0x0bb8 = 3000 mA
Mode: 0x6001
Charge: 49 %
Abs: 47 %
Remaining: 2705 mAh
Cap-full: 5575 mAh
Design: 5800 mAh
Time-full: 0h:0
Empty: 0h:0
Change-Id: I9f4e9e8819955ad1b107fb3b70ac2559d9b02b55
