Fix zinger and keyborg to use correct event mask when
timing out from task_wait_event(): TASK_EVENT_TIMER.
On zinger, move storing the last event to after enabling
interrupts. This gives an opportunity to interrupt
handler to set the wake event.
BUG=chrome-os-partner:30135
BRANCH=none
TEST=load on zinger, and test PD communication with samus.
notably tested sending rw_hash vdm from samus, which is known
to cause zinger to retry the following ping transmit. The
retry on the ping transmit uses task_wait_event(), and without
this fix we were getting false wake events that had been stored
up from the last rx received event. with this fix, the retry
mechanism works.
Change-Id: I9a6902ceaab49a00d3660f9813ca7761cf38f190
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213560
Reviewed-by: Todd Broch <tbroch@chromium.org>
Previously if you were working on a single board you had to add BOARD=
to all of your make command lines. Now if you are in a board directory
you can just use "make", or "make clean", or any other top level make
command.
This commit also adds support for a top level "make flash" command that
can be used from the board directories as well. This command uses
openocd and requires that the board provides an openocd-flash.cfg file.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=(from a few board directories) make clean; make -j
(from the discovery-stm32f072 directory) make flash
Change-Id: Ie09a74881371169a2c3cd9cd9922f39f4873f1a6
Reviewed-on: https://chromium-review.googlesource.com/209669
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
On panic, reboot properly the CPU rather than just jumping to the reset
vector as that might lead to some incorrect initializations.
Properly plug the div by 0 to the panic handling.
Add a small trace if the debug output is activated.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:29840
TEST=add adhoc code triggering a data abort and see the firmware
printing a trace, then rebooting immediatly in a working state.
Change-Id: I1d5a98d9113c8ae08e05588a40f941d1ed22cebe
Reviewed-on: https://chromium-review.googlesource.com/206268
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
In order to wake the chips from STOP/SLEEP mode with a touch, we need to
put the two chips in correct state before going into STOP/SLEEP mode.
Also, when one of the chips wakes up, it needs to wake the other chip
with GPIO interrupt.
This CL implements the necessary methods and also adds a sample routine
that put the chips in STOP mode and wait for a touch using the
implemented methods.
BUG=None
TEST=Build and boot. Touch the panel and see the response in console.
BRANCH=None
Change-Id: Ia5f7df8b550ee2459bcae1840f8a2717c8d947ce
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204482
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds back DECLARE_IRQ() support when building without common
runtime. With this, we can enable only a subset of IRQs and avoid
linking in other unused IRQ handlers.
Note that after this change, all boards without common runtime need to
have a ec.irqlist file.
BUG=None
TEST=Build Keyborg and check it still works.
TEST=make buildall
BRANCH=None
Change-Id: If68062a803b9a78f383027a1625cf99eb3370d3f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203264
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Currently the master and the slave must synchronize before starting
slave response. This is to make sure the previous slave response is done
and the slave is ready for the next response. By enabling interrupt on
the master side to capture slave ready event, we can get rid of the
extra sync's. This saves about 1300 us per frame.
BUG=None
TEST=Build and boot. Measure time. Examine heat map.
BRANCH=None
Change-Id: I3c319d8a3636f1f6ae905d7021433c3ba220c9b0
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203789
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The timer on Keyborg is only of 32-bit width, so we should always use
get_time().le.lo instead of get_time().val to avoid unneeded 64-bit
integer operations. This saves about 0.66 us per call to
master_slave_sync(), which is called about 500 times per frame.
BUG=None
TEST=Measure the time used on master_slave_sync().
TEST=Boot and check touch scanning still works.
BRANCH=None
Change-Id: I6668cda3c6c00d1af971fc55fcc8d643b83a4578
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203670
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In order to make SPI CRC work, we had to ensure the master and the slave
agree on the size of slave response. This required us to first send the
response size and then send the full response. The downside of this is
that we cannot take full advantage of DMA.
Given the SPI bus is fast enough, let's add an option to always transfer
max size packet on slave response. This incurs some overhead as unused
bytes are also sent, but the overhead doesn't affect us when the slave
is busy with touch scanning. (The scanning time is longer than
transferring 64 bytes over SPI.) This situation may change in the
future, so make it a compile time option for now.
Also removed the use of RX channel on the slave side when the slave is
sending response. The RX channel is useless in this case.
BUG=None
TEST=Build and measure scan rate w/ and w/o
CONFIG_KEYBORG_SPI_FULL_PACKET flag.
BRANCH=None
Change-Id: I4b23b1d89903dd022b445eb81667679276858008
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203660
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This slightly reduces binary size and increases scan rate when running
without fast scan.
BUG=None
TEST=Build and boot w/ and w/o fast scan.
BRANCH=None
Change-Id: I66683dce9c8f5e74f86764d8a4f33f4e1a161e08
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203633
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In case the slave got into a bad state, we may need a way to reboot the
slave from the master. The protocol must not involve SPI communication;
otherwise this will fail if the slave SPI module is in a bad state.
This CL implements this using SPI_NSS. In normal SPI communication, the
master pulls SPI_NSS low and immediately sync with the slave. To reboot
the slave, the master pulls SPI_NSS low without the following sync.
BUG=None
TEST=Reboots the slave from the master.
BRANCH=None
Change-Id: I947523e1d86fb2332b87fbfa3dab73cba958fb72
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203485
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
It's often hard to find out which sync call failed when one happens.
Let's add debug info.
BUG=None
TEST=Add a sync call on master side only, and see the file name and line
number.
BRANCH=None
Change-Id: I68d0fa12d5d84293870e845fbb5f83aa3a8125fa
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203339
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Previously an error in master-slave communication often leaves the chips
in bad states and thus prevents further operation. Improve this by:
- Making master_slave_sync() state-less.
- Restoring SPI_NSS and disabling DMA on error.
BUG=None
TEST=Inject errors on master side and slave side. Check the subsequent
operations succeed.
BRANCH=None
Change-Id: Ief8b5b0df3d4be6319957bb1f9daf93e0e9b5d92
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203337
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If board.h or config_chip.h is included before config.h, CONFIG_* flags
may be incorrect. For example, if config.h says:
...
#define CONFIG_DEFINED_FLAG
...
#include "board.h"
...
And board.h says:
#ifndef __BOARD_H
#define __BOARD_H
...
#undef CONFIG_DEFINED_FLAG
...
#endif
Then this code:
#include "board.h"
#include "config.h"
would results in CONFIG_DEFINED_FLAG being defined, instead of undefined
as stated in board.h.
Avoid this by emitting error when board.h or config_chip.h is included
before config.h.
BUG=None
TEST=make buildall
BRANCH=None
Change-Id: Ic4a8b68e8ab1ef2a4cf9e926ab9008d2b106b943
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203265
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The fast scan buffer is of type 32-bit integer, so the byte size is 4
times of its size.
BUG=None
TEST=Check buffer is fully cleared after each frame
BRANCH=None
Change-Id: I0980e418a4b323195fec56f4970aca3918a6ee11
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203205
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For experiments, we sometimes need to turn off fast scan mode. Let's add
an option so that this can be easily done.
BUG=None
TEST=Manual test with fast scan mode on/off.
BRANCH=None
Change-Id: Icd9a4a4b18699f34f424e84167748fcfe30588e3
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202141
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For easier developement/experiment, this adds two options:
- CONFIG_ENCODE_SEGMENT/CONFIG_ENCODE_RAW
SEGMENT style encoding uses less RAM, so it can store the entire
frame. However, it sometimes losses data. RAW style encoding is
always lossless, but it can only save a bit more than a half
frame.
- CONFIG_ENCODE_DUMP_PYTHON
If this flag is defined, the output style is a 2-D Python list.
This is used so that the data can be easily fed into another
script.
BUG=None
TEST=Tries all four combinations.
BRANCH=None
Change-Id: Ic6a916f1cae20edccee5d05783ef98a1c48dff2e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202140
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This fix includes:
- A faster discharge procedure
- Added discharge steps between scanning two columns. This is to
prevent the shadow "wraps around" to the beginning of the next
column, which is much harder to filter out.
BUG=None
TEST=Press hard on the end of one column. Check the shadow doesn't wrap
around to the next column.
BRANCH=None
Change-Id: Ie1342f7778d0fe18a0ec2086af79d5e459f1cd7d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202073
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Previously we assumed the ADC reading wouldn't overflow, which is
apparently wrong. This CL handles the overflow case.
BUG=None
TEST=Touch the keyboard. Still see sane heat map.
BRANCH=None
Change-Id: Iab5372915319d6a0ef76799f9b5fe821af5a9ca5
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201804
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
With fast scan mode, the scan rate can usually go up to 90-100 Hz. In
worst case, the rate still maintains at around 50 Hz.
BUG=None
TEST=Manual test. Check heat map.
BRANCH=None
Change-Id: I2dc25028ffa5b3175b856d3437004c21b84e7df7
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200829
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
ADC sampling is slower than SPI communication. If we spend more CPU
cycle trimming the response, we are just wasting time and letting SPI
bus sit idle.
BUG=None
TEST=Build and boot. Check scanning rate.
BRANCH=None
Change-Id: I9a4ece28a29ffd3205931ea71958cbc73642be6b
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200673
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Before transmitting the response back to the master, the slave should
make a copy of it. Otherwise, if the buffer is reused, we run the risk
of overwriting the last response before it's sent out. We got away with
this before because we didn't overwrite it fast enough. Let's fix this
to be safe.
BUG=None
TEST=Build and boot
BRANCH=None
Change-Id: If3c50692d554119de9ff0f0ae0de450b923b11af
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200672
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This fixes a bug that PMSE_MRCR is changed too early. Also, with this
bug fixed, we can increase the sampling rate to 13.5 cycles/sample.
BUG=None
TEST=Check heat map
BRANCH=None
Change-Id: Id7dc34fd7975ca7153b96443b8d4d28f1557eec4
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200651
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This fixes two bugs:
- The row order on the slave is reversed
- The last value is missed when transferring data to the master
BUG=None
TEST=Build and check the heatmap
BRANCH=None
Change-Id: Ic51ad1132d948ec6ec68dc673288ec6f29c6ebe7
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200621
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
A single frame of the scanned heat map is too big to fit into RAM. Let's
encode it so that we can get the whole frame.
BUG=None
TEST=Touch on various places on the panel and see corresponding results.
BRANCH=None
Change-Id: I8c7c72d5d4a83ebc2018c0abd57075697c931bef
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/199940
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Column 0 is on the slave side. Fix this.
BUG=None
TEST=Press a finger at the center of the panel. See a single shape in
touch data.
BRANCH=None
Change-Id: Ic3a9a4fafc6e7ee39a1c3422905cf3b1758f335a
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197641
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Most of the time we don't need to use a debugger during runtime. Let's
disable SWD ports so that we can use the two pins for touch scan.
We can still re-flash the chips as long as we hold the reset pin when
entering SWD mode.
BUG=None
TEST=Check we can still re-flash the chips
BRANCH=None
Change-Id: Ieb34406f4bc6d6a753ec840b3072f363c7b17c08
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197196
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The current identification method uses SPI_NSS as master/slave
indication. However, if the other chip is not reset at the same time, it
would drive SPI_NSS and fails the identification.
Since the master chip is equipped with USB connection, we can identify
the chips with USB pull up pin, which doesn't suffer from this problem.
Also updates the comments on pin usage.
BUG=None
TEST=Reset the chips repeatedly.
BRANCH=None
Change-Id: Iccd7e73fca85abfa554f90dcb7e354cc4cc04626
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197194
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This implements dual chip matrix scanning. Now the scan result is only
dumped to debug output.
BUG=None
TEST=Put a finger on the panel and see its shape.
BRANCH=None
Change-Id: I015c901b42e24fe4a6249c12c37bc5bfcb308c9f
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/196468
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
We are running a minimal runtime with less overhead. This allows us to
run UART at 38400 bps. Let's update the config for easier debugging.
Also fix a potential underflow bug.
BUG=None
TEST=See debug output at 38400 bps
BRANCH=None
Change-Id: Ic9e4f9d545f5dbc4a0816a843b0f01a4cf219666
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/196190
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This implements a simple SPI driver for the two chips to exchange
packets.
There are both sync interface and async interface. Sync interface is
easier to use, and async interface frees the CPU while the DMA takes
care of the communication.
BUG=None
TEST=Hello test passed
BRANCH=None
Change-Id: I9823bad5cae6d1fa8f3658d17af4b998d3735a3e
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/195533
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The two chips work together, so let's teach them how to tell master from
slave. After identification, the two chips shake hands through the two
sync signals.
BUG=None
TEST=Disable handshake on master. See slave fail. Vice versa.
BRANCH=None
Change-Id: Idb6a56128f608dd2ee5c453f75abea475fe1779f
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/195395
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This chip got small flash and RAM, so the common runtime is disabled.
Now the code only boots and print something every second to check debug
console and timer are good.
BUG=None
TEST=Boot and see console output
TEST=make buildall
BRANCH=None
Change-Id: I01150e8250a404628d1a3b81e677ac4c29782d7f
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/195382
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
