This unifies the PWM module interface for LM4 and STM32. Now PWM
channels are defined in board.h/board.c. Instead of calling functions
named pwm_set_fan_duty(x), one can now use pwm_set_duty(PWM_CH_FAN, x),
which prevents additional functions added when we have a new PWM
channel.
BUG=chrome-os-partner:18343
TEST=Limit input current on Spring.
TEST=Check power LED in S0/S3/S5 on Snow.
TEST=Check keyboard backlight functionality on Link.
TEST=Check fan speed control/detecting on Link.
BRANCH=None
Change-Id: Ibac4d79f72e65c94776d503558a7592f7db859dc
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/64450
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Test config is now in test/test_config.h. Let's remove the unused config
lines in board/host/board.h.
BUG=chrome-os-partner:19235
TEST=Pass all tests.
BRANCH=None
Change-Id: Ic8f7f4dcf8e0ad5f8800fe8ad2ae89b604a239f4
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66742
Reviewed-by: Randall Spangler <rspangler@chromium.org>
With CONFIG_HOST_COMMAND_STATUS, the EC can respond to a command
with EC_RES_IN_PROGRESS, indicating to the AP that it should poll
for completion of the command with EC_CMD_GET_COMMS_STATUS. The
kernel, however, only guarantees the atomicity of single commands.
As a result, i2c passtrough or keyboard commands could be issued
while the AP is polling for completion of a flashrom command. By
disabling CONFIG_HOST_COMMAND_STATUS, we eliminate polling of the
EC status by the AP so that there is no interleaving of commands.
BUG=chrome-os-partner:20978
TEST=flashrom on Pit
BRANCH=pit
Original-Change-Id: I48b29a0dbbcc56fc55f72ca64b8aff51036740e3
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66703
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 2db4fcfb267b938fcc35af2a0d2e374f99551743)
Change-Id: Iac7c15ec337d618cd6d95439d4b922bf3ec43916
Reviewed-on: https://gerrit.chromium.org/gerrit/66828
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
The bolt board has the PP1050 regulator's pgood
output connected to VCCST_PWRGD on the chipset. However,
that is inappropriate because VCCST_PWRGD is the signal
used when the 1.05V rail is good when transitioning to
S0. The PP1050 regulator needs to be up while in S5
to supply the 1.05V suspend rail. To work around this
mismatch, the PP1050_PGOOD signal which is routed to
the EC needs to be changed to an open-drain output.
It's driven low until the transition to S0 in order
to properly sequence the chip.
BUG=chrome-os-partner:20372
BRANCH=None
TEST=Built and booted on handful of boards.
Change-Id: Ic85eab8f295f6e76d9b33f440e68c82096976683
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66821
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Problems with existing thermal control loop:
* Not multi-board friendly. thermal.c only supports Link and needs
refactoring. Temp thresholds and fan speeds are hard-coded.
* Only the PECI temp is used to determine the fan speed. Other temp sensors
are ignored.
* Has confusing data structures. Values in the CPU temp thresholds array mix
ACPI thresholds with fan step values.
With this change, the thermal task monitors all temp sensors in order to
perform two completely independent functions:
Function one: Determine if the host needs to be throttled by or informed of
any thermal events.
For thermal events, each temp sensor will have three threshold levels.
TEMP_HOST_WARN
* When any sensor goes above this level, host_throttle_cpu(1) will be called
to ask the CPU to slow itself down.
* When all sensors drop below this level, host_throttle_cpu(0) will be called.
* Exactly AT this level, nothing happens (this provides hysteresis).
TEMP_HOST_HIGH
* When any sensor goes above this level, chipset_throttle_cpu(1) will be
called to slow the CPU down whether it wants to or not.
* When all sensors drop below this level, chipset_throttle_cpu(0) will be
called.
* Exactly AT this level, nothing happens (this provides hysteresis).
TEMP_HOST_SHUTDOWN
* When any sensor is above this level, chipset_force_shutdown() will be
called to halt the CPU.
* Nothing turns the CPU back on again - the user just has to wait for things
to cool off. Pressing the power button too soon will just trigger shutdown
again as soon as the EC can read the host temp.
Function two: Determine the amount of fan cooling needed
For fan cooling, each temp sensor will have two levels.
TEMP_FAN_OFF
* At or below this temperature, no active cooling is needed.
TEMP_FAN_MAX
* At or above this temperature, active cooling should be running at maximum.
The highest level of all temp sensors will be used to request the amount of
active cooling needed. The function pwm_fan_percent_to_rpm() is invoked to
convert the amount of cooling to the target fan RPM.
The default pwm_fan_percent_to_rpm() function converts smoothly between the
configured CONFIG_PWM_FAN_RPM_MIN and CONFIG_PWM_FAN_RPM_MAX for percentages
between 1 and 100. 0% means "off".
The default function probably provide the smoothest and quietest behavior,
but individual boards can provide their own pwm_fan_percent_to_rpm() to
implement whatever curves, hysteresis, feedback, or other hackery they wish.
BUG=chrome-os-partner:20805
BRANCH=none
TEST=manual
Compile-time test with
make BOARD=falco runtests
On the EC console, the existing fan commands should work correctly:
faninfo - display the fan state
fanduty NUM - force the fan PWM to the specified percentage (0-100)
fanset RPM - force the fan to the specified RPM
fanset NUM% - force the fan to the specified percentage (0-100) between
its configured minimum and maximum speeds from board.h
(CONFIG_PWM_FAN_RPM_MIN and CONFIG_PWM_FAN_RPM_MAX)
fanauto - let the EC control the fan automatically
You can test the default pwm_fan_percent_to_rpm() with
fanset 1%
faninfo
The fan should be turning at CONFIG_PWM_FAN_RPM_MIN. Let the EC control it
automatically again with
fanauto
Also on the EC console, the thermal settings can be examined or changed:
> temps
PECI : 327 K = 54 C
ECInternal : 320 K = 47 C
G781Internal : 319 K = 46 C
G781External : 318 K = 45 C
>
> thermalget
sensor warn high shutdown fan_off fan_max name
0 373 387 383 333 363 PECI
1 0 0 0 0 0 ECInternal
2 0 0 0 0 0 G781Internal
3 0 0 0 0 0 G781External
>
> help thermalset
Usage: thermalset sensor warn [high [shutdown [fan_off [fan_max]]]]
set thermal parameters (-1 to skip)
>
> thermalset 2 -1 -1 999
sensor warn high shutdown fan_off fan_max name
0 373 387 383 333 363 PECI
1 0 0 0 0 0 ECInternal
2 0 0 999 0 0 G781Internal
3 0 0 0 0 0 G781External
>
From the host, ectool can be used to get and set these parameters with
nearly identical commands:
ectool thermalget
ectool thermalset 2 -1 -1 999
Change-Id: Idb27977278f766826045fb7d41929953ec6b1cca
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66688
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The BOOTCFG register configures a couple of important things: whether to
allow jumping into the builtin ROM bootloader at reset, and whether or not
to allow JTAG access for programing and debugging.
The default is "no" and "yes". But the BOOTCFG register can be locked so
that it can't be changed again, which means that if the wrong values are put
into it, the system is pretty much bricked.
On Link, we wrote a BOOTCFG value that allowed a GPIO to be used as a bypass
to optionally trigger the ROM bootloader, but on Slippy and its derivatives
that GPIO is not pulled up. If you program the Link values into BOOTCFG on a
Slippy, the system is stuck in the ROM bootloader more or less forever.
This change disables that GPIO, keeps JTAG enabled, and locks those settings
for all LM4 chips (it's a chip config now, not a board config). We've never
actually used the GPIO to invoke the ROM bootloader, but we have managed to
brick a number of systems just by having it enabled, so we're going to lock
it into a safe configuration now.
BUG=chrome-os-partner:19247
BRANCH=falco,peppy
TEST=manual
Reflash, boot, power cycle (actually unplug the EC from AC and battery) a
few times. It should continue to work.
Change-Id: Iaf1a81d6814104421a56425490e3d5164ea9b617
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66538
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In order to meet the panel power sequencing requirements the
backlight enable needs to be delayed by 420ms. As the EC has
direct control over the panel backlight, it's difficult to
align with the reset of the panel signals which are controlled
by an LVDS bridge. In order to not affect other boards the
backlight implementation has been moved within falco's
board directory.
BUG=chrome-os-partner:21234
BRANCH=falco
TEST=Built with a printf to verify rough timing transitions.
Change-Id: I5d6cd2989f17cc5c188d307f6ceacb52341a87b4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66238
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This tests that command history is as expected. Also fix a bug that some
checks in console_edit test are skipped.
BUG=chrome-os-partner:19236
TEST=Pass console_edit test.
BRANCH=None
Change-Id: Ifbd3d1690f25b35bf5efe523e656b013aa534d26
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64837
BUG=chrome-os-partner:21847
BRANCH=peppy
TEST=Manual. Check state of GPIO_P5000_FAN_EN with lid open
and lid closed. Can also check with meter via TP109.
Change-Id: I8a64c14d53dd84a5d586c0abb04ccb71de0e78b3
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65674
Firmware development for this board is happening on the
firmware-wolf-4389.24.B branch.
BUG=chrome-os-partner:21815
BRANCH=None
TEST=Run util/make_all.sh. Verify all is made.
Change-Id: I4b58a982a87562231453f3f201024b809c6a24fb
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65514
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Only link actually used this function, but all batteries were required
to provide an (empty) implementation. Use
CONFIG_BATTERY_VENDOR_PARAMS to gate this functionality, so non-link
battery code can be simpler.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms and pass unit tests
Change-Id: Ic2c6dd1163a981e48873d798f77891cc7de1f8cf
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65257
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Rather than have every board check for tasks before declaring their
config macros, have config.h know what configs are invalid without
their corresponding tasks.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms and pass unit tests
Change-Id: Iecf6eb44782e15565eaaf6d69c6288ee8d2e4c4c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65010
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Daisy systems are few and far between, and not actively used for
development now that we have pit. Remove the I2C port detection which
was used for early systems, and just hard-code the port value to the
one on my daisy.
BUG=chrome-os-partner:10622
BRANCH=none
TEST=boot daisy
Change-Id: I981a51448899f75437f35dc2aa84a0556c0018eb
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64958
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
GPIO alternate functions used to be configured throughout the code,
which made it hard to tell which ones you needed to configure yourself
in board.c. It also sometimes (chip/lm4/i2c.c) led to GPIOs being
configured as alternate functions even if they weren't used on a given
board.
With this change, every board has a table in board.c which lists ALL
GPIOs which have alternate functions. This is now the only place
where alternate functions are configured. Each module then calls
gpio_init_module() to set up its GPIOs.
This also fixes a bug where gpio_set_flags() ignored most of the flags
passed to it (only direction and level were actually used).
On stm32f, gpio_set_alternate() does not exist, and pins are
configured via direct register writes from board.c. Rather than
attempt to change that in the same CL, I've stubbed out
gpio_set_alternate() for stm32f, and will fix the register writes in a
follow-up CL.
BUG=chrome-os-partner:21618
BRANCH=peppy (fixes I2C1 being initialized even though those pins are used
for other things)
TEST=boot link, falco, pit, spring
Change-Id: I40f47025d8f767e0723c6b40c80413af9ba8deba
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64400
This includes:
- Kirby doesn't use TPS65090. Removing TPS65090 config flag.
- TIM3 is used by charging LED. Move timer to TIM2.
BUG=chrome-os-partner:21607
TEST=Build kirby.
BRANCH=None
Change-Id: I226660cf53371e03730ca41d08f0da2ad5c8ebf7
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64811
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Jeremy Thorpe <jeremyt@chromium.org>
The power button LED is on PA2, not PB3. Remove a line of code
accidentally left in from copy-paste at the start of pit bringup.
BUG=chrome-os-partner:21676
BRANCH=pit
TEST=boot pit
Change-Id: Id991b16d69bca0a411efa72211c5dc407923240d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64714
Reviewed-by: Vic Yang <victoryang@chromium.org>
We started SPI development on the Snow platform, but then repurposed
some of the GPIOs to use for I2C arbitration. Now that we have Pit,
we'll never go back and finish SPI on Snow, so this code can be removed.
Remove the remaining dead code from Snow. This makes it easier to do the
GPIO alternate function refactoring.
BUG=chrome-os-partner:21618
BRANCH=none
TEST=build snow
Change-Id: I1cebf5097ecfd1dc6b3f55f2bbc47cb6c95cb937
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64712
Reviewed-by: Vic Yang <victoryang@chromium.org>
GPIO mappings are according to current schematic. Charging and power
sequence code need to be fixed. Charging is disabled now, and some power
sequence code is #ifdef'd out for kirby to compile.
BUG=chrome-os-partner:21607
TEST=Build all boards (including Kirby.)
BRANCH=None
Change-Id: I3a48a7779dab8aad0d086c41e0be19223cd7d6c9
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64364
Reviewed-by: Randall Spangler <rspangler@chromium.org>
There's no need for it to directly access the GPIO registers. That
was only necessary at the beginning of link, when gpio_set_flags()
didn't exist.
BUG=chrome-os-partner:21612
BRANCH=none
TEST=onewire red / onewire green / onewire yellow all set the adapter LED
(tested on link, since I don't have a bolt, but the EC chip and adapter
are identical)
Change-Id: I2386962ff039bb2251be38eaadcaeae8ffd1ea7b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64375
Reviewed-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:20145
BRANCH=falco
TEST=Hack it. Add (uint64_t)599 * MINUTE to ctx->curr.ts.val
in the timeout comparison. This makes the 10 hour timeout only
take 1 minute. Testing this directly is tricky as a healthy battery
will charge quickly. If you force it to trickle charge it will
give up before 10 hours pass.
Change-Id: I69094a07e58c2d65e322ddc6a1b2ced828da0e26
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64309
This reverts commit 154c73f32d.
The kernel driver to control TPS65090 FETs is now submitted in our tree,
and turning on the FET3 connected the 3G modem by default.
So let's remove the hardcoded to allow better power management policy on
the CPU side.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=spring
BUG=chrome-os-partner:17790
TEST=on Spring, boot and dump the TPS65090 configuration from the EC
command line by using "pmu" command.
See 0x1f in the register 0x11 for FET3.
Change-Id: Ie699fef0348138a7483f0e8e7bcaebc37810eba8
Original-Change-Id: I9de0f92a561397ceb81a67b8291d1e8bf04ade38
Reviewed-on: https://gerrit.chromium.org/gerrit/57978
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64271
Tested-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
The following signals were not being initialized properly in the
forcing G3 path:
- GPIO_SYS_PWROK
- GPIO_PP3300_DSW_GATED_EN
This lead to the EC RW sysjump, but the boards wouldn't reboot
on the x86 side. Sadly, without this change, the board I have
works. However, those signals need to be driven low.
BUG=chrome-os-partner:20372
BRANCH=None
TEST=Willis tested on boards that previously didn't work.
Change-Id: I1771881485bc5be73ed2b08da91fddff9ab09167
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63845
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We've been declaring a bunch of statically-sized arrays:
extern struct foo_t foo[FOO_COUNT];
And then initializing them like so:
struct foo_t foo[FOO_COUNT] = {
/* blah */
};
That only catches cases where we initialize with too many entries. It
doesn't catch cases where we haven't initialized enough. This change tests
for both cases like so:
extern struct foo_t foo[];
struct foo_t foo[] = {
/* blah */
};
BUILD_ASSERT(ARRAY_SIZE(foo) == FOO_COUNT);
The affected arrays are:
adc_channels[ADC_CH_COUNT]
gpio_list[GPIO_COUNT]
temp_sensors[TEMP_SENSOR_COUNT]
x86_signal_list[X86_SIGNAL_COUNT]
i2c_ports[I2C_PORTS_USED]
BUG=chrome-os-partner:18343
BRANCH=falco,peppy
TEST=build all platforms
All platforms should still build, all tests should still pass.
Change-Id: Ibb16dc3201f32df7cdc875648e89ba4ffb09f733
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63833
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Before this change, powerinfo host command supports only one target
with USB charging. This change adds a common powerinfo host command
and console command for TPSChrome based targets.
BRANCH=None
BUG=chrome-os-partner:20326
TEST=manual
build and flash pit target, check console command 'powerinfo'.
check ectool powerinfo with and without AC adapter.
Change-Id: I2cfd8dfa011e23f819c6bae19cf22b4a7343f044
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63350
Reviewed-by: Vic Yang <victoryang@chromium.org>
Some chargers can run in a "turbo" mode, which lets it draw from the battery
to provide extra power to the AP in short bursts. In order for this to work
properly, the EC has to watch the current closely to make sure specific
limits are observed. It also has to recognize specific adapters, since those
limits vary depending on the rated power that the adapter can provide.
This adds the basic functionality, plus a test for it.
BUG=chrome-os-partner:20739
BRANCH=falco,peppy
TEST=manual
make BOARD=${BOARD} runtests
On Falco, you can also use the "adapter" EC command to see what's going on.
Try replacing the adapters and running that command to be sure they're
correctly identified, too:
> adapter
Adapter 65W (590mv), turbo 1, AP_throttled 0
>
We currently support 45W, 65W, and 90W adapters. Unknown adapters are
treated as 65W, but don't enable turbo mode.
Change-Id: I7e5407db825ce7e596cb495fb8cb4d1dd1ff639c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63372
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We can't change CONFIG_ options from the gcc commandline, because
include/configs.h explicitly undefs them again. So for some tests, we add a
-DFOO to the command line and then put this in the source:
This change just uses TEST_FOO instead of FOO, so it's more obvious what's
happening.
BUG=chrome-os-partner:20739
BRANCH=falco,peppy
TEST=manual
No functional change, just renaming. Run
make BOARD=${BOARD} runtests
Everything should still pass.
Change-Id: I17e10180f8d779dff0961cf411f5b61cfc70c316
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63371
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Rename onewire_led to led_driver_ds2413, since we may have other LED
drivers hanging off a one-wire bus in the future.
No functional changes, just renaming config options.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I1d70b1c5778da94bda4ebef3b57f7c39bfba2322
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63273
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
CONFIG_FMAP is now defined by default, because all platforms other
than the host unit tests use it.
No functional changes, just renaming config options and removing dead code.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: Ie6496310c822491068e2fa6976933486f26badb0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63271
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This change moves vendor specific temperature ranges to battery pack
files or board setup files. And added a host test case to verify that
does not change x86 smart battery charging state machine behavior.
BUG=chrome-os-partner:21181
BRANCH=None
TEST=manual
build test: util/ecmakeall.sh
hosttests: make hosttests && make runtests
Change-Id: I48e76826b5555f64b78e3c063ce5f02416c72aa2
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62978
Reviewed-by: Vic Yang <victoryang@chromium.org>
The preliminary bolt support allows the board to boot
with all the necessary peripherals working except for the
following things:
- Not all board temp sensors are added.
- WLAN is not powered on because of inrush issues.
- USB power chargers are fixed to normal mode for now.
BUG=chrome-os-partner:20372
BRANCH=None
TEST=Built and booted
Change-Id: Iea7a39e812bb396e5731f212630b7fe97c164bf2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62210
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add a CONFIG_CHIPSET_X86 option that determines if
chipset_x86_common.o is built.
BUG=chrome-os-partner:20372
BRANCH=None
TEST=built bolt and link. All other boards should be covered.
Change-Id: I980a8fc68a31162b920429e695631909c5f6a4db
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63208
Reviewed-by: Randall Spangler <rspangler@chromium.org>
No functional changes, just renaming config options.
Remove README, now that all options described in it have been moved to
config.h, and the remaining information is out of date. (Yes, we
should have a README which describes the organization of the EC
repository, but that's a matter for another CL; this one's about
cleaning up config options.)
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: Iafefbe94369f1217c698f11d358bc0ecac2bdfde
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63145
Reviewed-by: Vic Yang <victoryang@chromium.org>
All of these were defined on all but a few platforms, and those
explicitly #undef them. So define them as enabled by default in
config.h so the board.h files are cleaner.
No functional changes; just rearranging/renaming config constants.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; FEATURES=test emerge-falco chromeos-ec
Change-Id: I1201a1472ae29641e9e219c2a0347691ca64cd28
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63102
Reviewed-by: Vic Yang <victoryang@chromium.org>
No functional changes, just documenting and renaming.
All boards which use the PMU must provide pmu_board_init(). This was
already true - except that Daisy's pmu_board_init() was implemented as
part of pmu_init() instead of its code living in board.c; I've moved
the code there now.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I85ad06dc3b6287ad917fe13acf83182f24a8f23d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62906
Reviewed-by: Vic Yang <victoryang@chromium.org>
No functional changes, just documenting and renaming.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I0b0d3cdce535d90ce437e82e96346fc3ca9be7b0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62673
These are now described in config.h. The various BQ chargers now also
use a consistent naming for their sense resistor options.
No functional changes, just renaming, and removal of obsolete
never-defined configs.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: Ie274546fe45f5ffc6fd0f26096c4622805baf8a0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62540
BUG=chrome-os-partner:21180
BRANCH=slippy
TEST=Run ectool chargecontrol command with each option (normal,
idle, discharge) on Slippy. Verifiy battery is discharging
in discharge mode via EC console 'battery' command.
Signed-off-by: Dave Parker <dparker@chromium.org>
Change-Id: I0461b20fc15c99380327b9a282efff7f1ed93baf
Reviewed-on: https://gerrit.chromium.org/gerrit/62851
This lets us read the internal and external values on the
G781 temp sensor.
BUG=chrome-os-partner:21180
BRANCH=slippy
TEST=run ec 'temps' command on Slippy.
Change-Id: Ib3a2a89efd4cfbc4a49696c79daa37bc1880a3ef
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62847
Reviewed-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:20889
BRANCH=peppy
TEST=Power device without battery. It should boot with no 30
second delay. The battery LED blinks orange indicating a
battery error.
Change-Id: Iea4f5644ae223b60dc8058dc52e06405e275c001
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61820
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Marc Jones <marc.jones@se-eng.com>
Expands and renames ectool 'chargeforceidle' command to
'chargecontrol'. Board-specific calls are needed to enable and
disable the discharge while on AC power state.
BUG=chrome-os-partner:20506
BRANCH=falco,peppy
TEST=Run ectool chargecontrol command with each option (normal,
idle, discharge) on Falco and Peppy. Verifiy battery is discharging
in discharge mode via EC console 'battery' command.
Change-Id: I7ac2b18b4f143bf6abc1e0bb878ad21a99f52100
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/60689
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
