It was previously only enabled for 1500us during boot, but in a way
that triggered a needless round of notifications to other modules.
This is cleaner.
This also fixes adc_init() not initializing the task IDs to wake when
interrupts come in, and removes some unneeded code from other init
functions.
BUG=chrome-os-partner:12472
TEST=boot system and run adc command. Should still provide reasonable data.
Change-Id: I9ae5857d988c727caf5d53f551a2f12b30974c0f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29806
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Superseded by EC software sync (hash-based).
Sig-based vboot was correctly implemented, but ended up being too slow
to be useful given the limited processing power of the EC chips, and
we also couldn't come up with a manageable way to handle A/B
autoupdate of signed EC firmware.
This change and an associated vboot_reference change shrinks the EC
binary by ~2KB.
BUG=chrome-os-partner:11232
TEST=build link,snow; boot link and check that 'hash' command still works.
Change-Id: I3f03ae2d0a4030977826980d6ec5613181e154c2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29496
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reasons are really bitflags, not a single reason. This will make it
easier to implement flash protection on LM4, where hibernate is a
subset of power-on reasons.
Also added some additional flags we pass in a hibernate register so...
1) We don't recognize spurious RTC wake reasons
2) Hard reset via system_reset(1) is detected as a hard reset, not a RTC wake
BUG=chrome-os-partner:11368
TEST=manual
1. Keyboard reset = power-on reset-pin
2. Pull battery = power-on
3. reboot = soft
4. reboot hard = power-on rtc-alarm
5. hibernate 10 then push power button = power-on wake-pin
6. reboot 3 sec later = soft
7. hibernate 1 = power-on rtc-alarm
Change-Id: Icbbdbcf6dfd13c8a6a4f80a23f64cebebbfba26e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27417
EC software sync still needs to be able to sysjump later after the AP
decides which image the EC should be running.
BUG=chrome-os-partner:11087
TEST=manual
sysjump A
sysjump RO
sysjump A
sysjump RO
Change-Id: I74eaf10dacf6eaa6aeabae2ff3b21ad387517605
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26896
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Use the same prototype for watchdog_init() everywhere. One version takes
a parameters and one doesn't. We don't need the parameter since we have
a #define. Tidy this up.
Also move watchdog defines into watchdog.h.
BUG=chrome-os-partner:10145
TEST=build for all boards
Change-Id: I38ae63d7cc137b93017c850e767703d5f90f56ad
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24394
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This returns true when both HW and SW write protect are enabled.
Once WP is enabled, sysjump will be locked out.
system_is_locked() can be used to gate other dangerous-ish commands too.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7468
TEST=manual
sysinfo -> unlocked, copy A
sysjump B -> works
flashwp lock
reboot
(make sure flashinfo shows WP asserted and flash locked; note there is a
HW bug on proto1 which makes this flaky)
sysinfo -> locked, copy A
sysjump B -> fails
(remove WP screw)
reboot hard
flashwp unlock
Change-Id: I849b573675c2c1cb4c44b9a05d6973e38247ca23
This helps us keep track of how long vboot is taking on the EC.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9651
TEST=reboot system and look at debug log. time shouldn't start over after it jumps to image A.
Change-Id: Iad86e90d42dabf1c67b2c2be80dda1151cf9a288
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9647
TEST=hack code to put a uart_puts() immediately following uart_init()
It shouldn't crash.
Change-Id: Ia1867a631934dbd457a23183010fdf9f5c284873
this fixes the build breakage on stm32-based platforms.
In the linker script, remove the ASSERT since this macro is not designed
to work in that context and this size condition is already verified by
the linker by setting the "length" of the "FLASH" memory region.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make BOARD=link && make BOARD=daisy
boot on Link and Daisy
Change-Id: I08964749d44f47caa0a359bc93c303a9611e5d73
1) When frequency changes, reload the watchdog timer right away, or it
may expire before the next reload. (Only matters when re-enabling the
PLL.)
2) Split out the timer/task debug output used by the watchdog into
their own routines, instead of assuming it's safe to call the command
handlers. Also make the flushes in those print routines safe to call
from interrupt level.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=waitms 1500; should print task dump again
Change-Id: I07e0ed24a526ae499566dab0bbeb0f5755cd5be6
This saves power.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8798
TEST=manual
Get a proto1 system modified with INA current sensor
1) From chroot:
dut-control i2c_mux_en:on i2c_mux:rem
dut-control pp3300_alw_mv pp3300_alw_ma
2) From EC console:
pll
(this should turn the PLL back on; it'll report clock frequency ~66MHz)
3) From chroot:
dut-control i2c_mux_en:on i2c_mux:rem
dut-control pp3300_alw_mv pp3300_alw_ma
Current (ma) should be bigger than in step 1
Change-Id: I806953684c57fd60bf481acb01dddffe2f2ad0ed
During the reboot_ec command, the keyboard state is lost after jump.
We need to restore info including:
- code set
- controller_ram[0]:
- XLATE
- KB/TP disabled
- KB/TP IRQ enabled
Remove the un-necessary keyboard_init() function.
BUG=chrome-os-partner:9102
TEST=tested on link.
EC runs on A
% ectool reboot_ec A
keyboard still working
% ectool reboot_ec RO
keybaord still working
% ectool reboot_ec RO
keybaord still working
ESC + power yo reset all system
repeat above steps and the keyboard keeps working.
Change-Id: I0fe21f7876459fc8047ff018fbfaaef5311cc49b
This covers modules which need to initialize before task_start(), but
don't particularly care in what order they're initialized.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=if it boots, it works
Change-Id: I69829aac8d1c3c14ee04916a794b84bbf03a09eb
We can clear the reset cause in system pre-init now because of a
previous change which preserves it across a sysjump.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=if it boots, it works
Change-Id: I1d8b99df5a0be0de9545d22ad1a6b7fb3140f813
The reboot_ec command could warm boot the EC while the host is still
running. However, this resets the internal state so that the keyboard
module is disabled on the EC side.
Check the reset cause during the keyboard init code. If it is wrm boot,
enable the keyboard (assume the host is on).
BUG=chrome-os-partner:9102
TEST=on link 1.0
% ectool version
Firmware copy: RO
% ectool reboot_ec RO
the keyboard keeps working.
Change-Id: I0009c561e2cd88789e50f9129b494538e50ee00e
Now that we have a SPI driver, we must init it when we start up.
BUG=chromium-os:28925
TEST=build on daisy and discovery; run on daisy
Change-Id: I84b458d3ebc3fed9368dce8e06d040dbfc4e9125
Signed-off-by: Simon Glass <sjg@chromium.org>
BUG=chrome-os-partner:8718
TEST=manual
1) Use 'reboot' command from console to boot image. Should end up in
image A, with last reset reason soft cold. 'sysinfo' should show we
jumped to this image.
2) sysjump RO. Should end up in RO; otherwise same as 1)
3) reboot using Power+Esc+Reload. Should end up in image RO, with last
reset reason reset pin. 'sysinfo' should show we did not jump to this
image.
4) sysjump A. Should end up in A with reset reason reset pin.
'sysinfo' should show we jumped here.
Change-Id: I2dd5595eab4ba2c91bfe8b2b2e9677d7732aca63
Signed-off-by: Randall Spangler <rspangler@chromium.org>
This is necessary at init-time for verified boot to jump from RO to
one of the RW images.
It's also used by factory EC update to update one image and then jump
to the updated image to finish the update. In this case, the x86 does
NOT reboot.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8449
TEST=manual
1) power on x86 and log in
2) sysjump a --> system is in a; x86 has not rebooted
3) sysjump ro --> system is back in RO; x86 has not rebooted
4) reboot -> system is in RO; x86 HAS rebooted
Change-Id: I9dbadcf9775e146a0718abfd4ee0758b65350a87
More modules can be disabled individually through CONFIG_ defines.
Reordered early module pre-init and init, and added comments to
explain why things are ordered in main() the way they are.
Fixed a few assorted init-related bugs along the way, like st32m
keyboard scan double-initializing.
BUG=none
TEST=build link, bds, daisy
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I04a7fa51d743adfab4be4bdddaeef68943b96dec
Board-specific features like lightbar should be config'd at the board
level, not at the chip level.
BUG=none
TEST=build link, bds, daisy
Change-Id: If1df2ca0422f7b8bdc172d0df7bd9f6a1af6a9d2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Allow to build without the power button task.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make qemu-tests
Change-Id: Ibc757a6641f195f0d10e6a673792b996694f8cec
Jumping (currently rebooting, see crosbug.com/p/8100) to the RW image should
be done by vboot_init(), not vboot_pre_init().
As currently written, vboot_init() has to come AFTER these function calls:
task_init(); // sets up interrupts so that uart will work
watchdog_init(1100); // in case we fall over somewhere
uart_init(); // we'd REALLY like to see some debugging output
system_init(); // may go away with crosbug.com/p/8100
keyboard_scan_init(); // check for F3 to go to recovery mode
flash_init(); // maybe set RO regions (this should come earlier!)
eeprom_init(); // this is where the try_b flags are kept
BUG=chrome-os-partner:7459
TEST=none
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: I0ec3f6bcc26a308bb1005a944990963853b88b60
Also prints the current timer value when inits are done, and when the
watchdog task first gets to run (after all higher priority tasks sleep
at least once).
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=none
Change-Id: I342f86ad087fd18ab064a10a5bcdd0b69ee373d0
Add build information (date/time/builder) which can be displayed at the
EC console.
Generate a version from the board name and the branch tag.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chromium-os:27013
TEST=on BDS, run version command on the console.
inspect the built binary.
Change-Id: Idb1f68898ba6b811d02919f17ab4536ed9f8934a
A temperature polling task is added to achieve temporal correction and
also reduce the latency of reading temperature.
Factor out sensor specific part to keep code clean.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:7801
TEST=On link, 'temps' shows all temperature readings.
Cover each sensor with hand and see object temperature rise.
Compilation succeeded on bds/adv/daisy/discovery.
Change-Id: I3c44c8b2e3ab2aa9ce640d3fc25e7fba56534b86
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7451
TEST=hold down no keys; KB init state should be blank
hold down reload (F3); KB init should indicate recovery key pressed
hold down F3 + ESC; same
hold down F3 + F2 + ESC; KB init should NOT indicate recovery key pressed
Change-Id: I0fbf15407b20669396f667e6499ee5a9d545a4d5
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7493
TEST='powerbtn' to boot main processor, then 'temps' and 'pecitemp'
Change-Id: Id57526ebb37c8aecb05ecebccc2824f462b9de1a
- Add #ifdef CONFIG_TEMP_SENSOR before #include'ing temp_sensor.h
which actually requires temp_sensor_id to be defined.
Revert the forward declare used earlier since it is not the
correct solution in this case.
- Add #ifdef CONFIG_CHARGER before calling charger_init()
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=None
TEST=compiled on both BDS and Discovery
Change-Id: I60b7e4ba91eb958b3ad724cc9ffa9a12fe9c3a71
Refactor board/chip-specific code into corresponding directories.
Add support of the four I2C temp sensor in Link.
Use table lookup to handle different types of temperature sensors.
BUG=chrome-os-partner:7527
TEST=Correctly read EC internal temperature on bds.
Compile for link succeeded.
Change-Id: I694cfa54e1545798d877fafdf18c5585ab5f03e2
Preparatory work to introduce a second SoC : 2nd series 3/4
Some modules won't be used on other designs, make them optional.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run the EC firmware on BDS and check that the commands from the
optional features are still available and working.
Change-Id: I979864ed94dc4da90c1010bd2e4589d84bc2d046
Preparatory work to introduce a second SoC : 2nd series 2/4
Avoid introducing platform specific dependencies in common files where
they are not necessary.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=build for BDS and Link
Change-Id: If2ccd022e4956425222b55a5a48ca7522857e7f0
You can now enable/disable tasks more easily.
To conditionally compile a C file depending on the task FOO activation,
just write something like that in the build.mk file :
common-$(CONFIG_TASK_FOO)+=foo_source.o
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make all BOARD=link && make qemu-tests
Change-Id: I760fb248e1599d13190ccd937a68ef47da17b510
Instead of using a runtime callback to register the console commands,
put them in a special linker section. So we can do a macro to "register"
them during the build.
It saves 684 bytes and a few microseconds at startup.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run a few commands from the BDS command line.
Change-Id: Id33ea210b9035bf76ed720373c74c5dd24ccd1b1
This works around a chip errata where the internal oscillator on early
EC parts (as used on proto0) is untrimmed.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7693
TEST=if it runs, it works
Change-Id: Ie82a524543f4cf25efd0de7998dbdae103bd126b
Implement TPS2543 USB charging control.
It contains routine for setting each USB port as dedicated charging port
or standard downstream port. To allow us controlling the current
distributed to each port, we can select whether to allow 500mA or 1500mA
for each port.
BUG=chrome-os-partner:7476
TEST=Added USB port definition for BDS and tested GPIO output voltage
level is correct for all modes.
Change-Id: I19bc4b30d333aa802f868ebfc3a398b30e99ba0f
This just ensures the JTAG pins are reset to JTAG function on warm reboot.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7448
TEST=none
Change-Id: I0cccdbe7a68c228db7f354898ed30598e9fabff0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7499
TEST=press and release power button; should see debug messages
Change-Id: I8909ae4643afc98753edb690771618ad43135e3e
Add LPC host command to get and set fan speed.
BUG=chrome-os-partner:7313
TEST=Connect a fan and manually test fan actual speed matches target
speed.
Change-Id: I4b6a711a1b8cca0dbd1c1936fe4f0f15240d3453
