BUG=chrome-os-partner:12290
TEST=manual
From EC console,
rtcget
(wait a few sec)
rtcget
hibernate 3
(wait for wake)
rtcget
(hold power+refresh; wait for reboot)
rtcget
rtcset 20000
rtcget
(wait a few sec)
rtcget
Each rtcget should be a few seconds after the previous one.
Pull the battery and remove AC power. Then restore AC power and
rtcget
(wait a few sec)
rtcget
Should be close to 0. That is, it should have reset to 0 when power
was lost.
From root shell,
ectool rtcget
should match the time from rtcget, truncated to the nearest second.
ectool rtcset 30000
should set the time (do a rtcget to check).
Change-Id: I535097feb7af8aa6583c8ef50ade66bb19bdff8f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29349
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Superseded by EC software sync (hash-based).
Sig-based vboot was correctly implemented, but ended up being too slow
to be useful given the limited processing power of the EC chips, and
we also couldn't come up with a manageable way to handle A/B
autoupdate of signed EC firmware.
This change and an associated vboot_reference change shrinks the EC
binary by ~2KB.
BUG=chrome-os-partner:11232
TEST=build link,snow; boot link and check that 'hash' command still works.
Change-Id: I3f03ae2d0a4030977826980d6ec5613181e154c2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29496
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
BUG=chrome-os-partner:12353
TEST=hack the thermal monitoring and/or battery code to trigger a shutdown
then see that the events get set
Change-Id: I5ef2ac03cdd793ab0c50c0db518cba1ede3ea036
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29429
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
There were a number of problems resulting from i2c crashes,
particularly when trying to access the battery. The problem is that
the stack was overflowing on this particularly deep path, all the way
down to wait_status. This in itself was fine, but if there was a
timeout, debugging information would be printed to the uart, and that
function would cause an exception and restart the EC.
To fix it, I stripped the debugging CPRINTFs from wait_status. This
allows everything to work fine, but looses some information for
debugging. To allow future developers to still see what event the i2c
was waiting for, I added an additional variable to store it in, so that
it can be displayed/handled further up the stack.
BUG=chrome-os-partner:12245
TEST=Boot the machine using a Servo. On the AP's UART, run
"cros_test i2c" to start pounding the i2c bus. Then from the EC, run
"pmu 1000" and then "battery 1000" there should be no error messages,
exceptions, and the EC should not restart. Repeat this process with i2c
arbitration disabled (remove the flag in ./board/snow/board.h). You
should suffer no fatal errors. cros_test may report errors detected,
but the EC will never crash, restart, or throw exceptions. These other
errors are the EC and the AP stepping on each other's toes now that you
have disabled arbitration.
Change-Id: Idd2f017d3557652bf3e8536c4ac776c1f70319cb
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29351
Reviewed-by: Simon Glass <sjg@chromium.org>
- 'port80 intprint' toggles printing port 80 codes in interrupt
handler (turning that off speeds up port 80 capture a bit, if you're
sending port 80 codes very rapidly)
- 'port80 flush' flushes the log buffer
- log buffer expanded to 256 entries
- log buffer tracks S3->S0 power state transitions, so you can tell
where each boot starts
This uses ~500 bytes more RAM on the EC, but we've got piles of RAM
(with this change we're using 17KB out of 32KB).
BUG=none
TEST=manual
- boot system
- port80 -> prints data
- port80 intprint -> now disabled
- reboot; wait for reboot; no port80 debug output during boot
- port80 -> prints data from previous boot AND this one
- port80 flush
- port80 -> nothing in log
Change-Id: I64ee72fb13ab0fdd85d04b9640b5390fdac31400
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29420
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
To save power, make the EC hibernate after we go into G3 for 24 hours.
BUG=chrome-os-partner:9386
TEST=Use "hibdelay 5" to change the delay to 5 seconds.
Remove AC power, power down and check device hibernates after 5
seconds in G3.
Connect AC power, power down, wait for G3. Remove AC power and
check device hibernates after 5 seconds.
Change-Id: I6fb907c904798076a763f22bd35f53f7424d6200
Reviewed-on: https://gerrit.chromium.org/gerrit/29400
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
It is possible that power LED goes off while AC still connected. Let's
set power LED periodically to aviod this problem.
BUG=chrome-os-partner:10386
TEST=Disconnect power LED while leave AC connected. Check LED goes off.
Connect LED again and check it comes back after few seconds.
Change-Id: I2a199446be5da772af8027b735b9f431f697bacd
Reviewed-on: https://gerrit.chromium.org/gerrit/29403
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
When we wake up from a deep sleep mode, the system timer clock might
have been stopped. We need to be able to set using another time source
(e.g. the RTC).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8866
TEST=make BOARD=snow && make BOARD=link
on Snow, on a software implementing STOP mode, check the system time is
still accurate by comparing it to the wall clock.
Change-Id: Ieddbb423d052c7aceb398470866b25b25a74c0a0
Reviewed-on: https://gerrit.chromium.org/gerrit/29314
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
We need a bit more internal RAM for verified boot hash feature,
let's de-activate RAM hungry debug features.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:12271 chrome-os-partner:10895
TEST=make BOARD=snow
check RAM size with CONFIG_VBOOT and CONFIG_VBOOT_HASH activated.
Change-Id: I4d1d6c0f99a8b03011af6eb2d73455beba93c535
Reviewed-on: https://gerrit.chromium.org/gerrit/29278
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
CONFIG_FW_RW_OFF is already relative to the base address of the flash,
we don't need to substract it.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=on Snow, run with CONFIG_VBOOT and CONFIG_VBOOT_HASH activated and
see the hash is correctly computed and display.
Change-Id: I1643b07a59459baa973bfd7ee80cbf98963a85d4
Reviewed-on: https://gerrit.chromium.org/gerrit/29276
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
The i2c timeout error message is false positive warning. It happened
when wait_status() function got a good result, but took too long to
complete (> 1ms).
This warning message can be removed safely.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:9759,12222
TEST=none
Change-Id: I2a670b76a5d741dc82ea59eacc233c4719eb3263
Reviewed-on: https://gerrit.chromium.org/gerrit/29254
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Prints all x86 signal power state transitions at interrupt level, so
we can see lines toggle more precisely.
BUG=chrome-os-partner:12229
TEST=manual
1. power on system
2. no debug output that looks like [501.001742 x86 in 0x563f]
3. reboot
4. x86indebug 0xffff
5. power on system
6. should see lots of lines that look like [501.001742 x86 in 0x563f]
Change-Id: Ie3b346ee4d4beee3f13ac1245f1eb022b48dabf4
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29192
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
When the user is logged in a closes/opens the lid of the laptop the
lid_changed flag gets set, but never cleared. Normally, it would get
cleared when it powered back on from being opened, but without powerm
running or is the machine is only suspended, then that never happens.
This fixes the problem by additionally clearing the flag whenever the
computer is powered down. This forces the computer to not turn on
based on anything that happened to its lid before it was turned off,
which is the behavior you'd expect.
BUG=chrome-os-partner:12189
TEST=Log in to your Chomebook completely. Close, then open the lid.
Shut the computer down. It should stay off now. Once it's back on
close the lid and confirm that it still suspends correctly. Now
open the lid and make sure it turns back on. Repeat these steps, but
kill powerm first.
Change-Id: I2275b3125115b4eacc6a5d074978d7a1d51b0695
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29111
Reviewed-by: Benson Leung <bleung@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This was implemented for Daisy a long time ago, but left out on Snow
due to some confusion.
GPIO remapping is already handled because PD1 and PD0 (which is used
for ENTERING_RW) are remapped together. So all we need here is the
board_keyboard_suppress_noise() function definition which gets
called from the keyboard scanning code whenever a change is detected.
BUG=none
TEST=Verified using a scope that CODEC_INT line is driven
when a key is pressed (15us pulse)
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Ifd358eb89a9547c4f4b9536b8922c93d2c3b77a0
Reviewed-on: https://gerrit.chromium.org/gerrit/28989
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Prints when a host command returns an error code.
When 'hcdebug on', hex-dumps the host command params and response.
BUG=none
TEST=manual (> is ec console, $ is root shell)
$ ectool gpioget foobar --> EC console shows error 2 returned
> hcdebug on
$ ectool hello --> EC console shows params and response as hex
> hcdebug off
$ ectool hello --> no extra output on EC debug console
Change-Id: I2dbc77be5b59125f394d970cf1c83c2a976e926e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28948
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The EC was not re-enabling keyboard scanning on boot if the power button
was released. This works fine if the power button is released before
the shutdown is complete, but if the user holds it down until the device
is completed powered down the lock will never be released, and the next
time they turn on the computer, the keyboard won't work.
To fix this, all that is needed is to make the power event task keep
unlocking it whenever the power button isn't pressed down. There's
no problem with unlocking multiple times, so it's not dangerous to do
this.
BUG=chrome-os-partner:12070
TEST=Boot the machine normally, then press and hold the power button
until the machine is entirely powered down before releasing it. Press
the power button a second time to turn on the machine. You should be
able to type as normal.
Change-Id: I88852ed228bd8f6a9446406bab642812ef1327db
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28871
Reviewed-by: David Hendricks <dhendrix@chromium.org>
If it's pressed, need to track that or we'll ignore the release. And
then we'll leave the power button signal asserted to the PCH, and
it'll shut down 4 seconds after the power button was pressed.
BUG=chrome-os-partner:11971
TEST=hibernate 10, then press power button for ~0.5 sec, then release
system should boot normally
Change-Id: Ibb9b8a8827cca6c81bac06dc9543de1a76fa5aad
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28863
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Make sure we don't roll over when rounding up to align the requested size.
BUG=chrome-os-partner:11642
TEST=none
No test; if security guys approve code change, it's fixed.
Change-Id: I2e915a6e6b37fc315ab7adb435e2fce4eed670ba
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28729
Reviewed-by: Sumit Gwalani <sumitg@google.com>
Reviewed-by: Gaurav Shah <gauravsh@chromium.org>
Previously, if you used Esc + Reload + Power to reboot into recovery
mode, you would be stuck in it until you manually rebooted the EC with
"Reload + Power." This was because the button combo set a switch that
was never un-set. To fix it, the keyboard_scan function now sets a host
event, that is serviced once, and then cleared. As a result, the next
time you reboot after triggering recovery mode, it should boot as before
you triggered recovery mode.
BUG=chrome-os-partner:10889
TEST=Boot device in normal mode. Press Esc + Reload + Power, and boot
from usb. Power off the device and remove the usb media. Power on the
device again, and there should be no recovery screens during the boot
process. Next, repeat these same steps, but from starting in developer
mode. After recovery, when you reboot, the device should return to
developer mode.
Change-Id: Idcb8dde6f8ba5f680f4d34e61ae0d12992281cbb
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28710
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This is a temporary hack to implement a userland thermal loop. This
code really belongs in the BIOS and will move there once we have
gathered enough data to prove the efficacy (or otherwise) of doing such
throttling. So, please pardon the ugliness of the code -- it's meant to
be short-lived and therefore we wouldn't want to spend too much time on
optimizing it or making it pretty.
BUG=none
TEST="initctl start temp_metrics" and then monitor various parameters
such as CPU min/max frequency, GPU frequency, duty cycle and package
power limits to ensure they are doing the right thing.
Change-Id: I407e4826b4db801298f08fa72c4f2330e127322b
Signed-off-by: Sameer Nanda <snanda@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28634
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The ARM EC was being rebooted when both the power and one of several other keys
were pressed. (LCtrl, Tab, Reload, t, [, ], y, Dim Screen and Mute) It should
only do this when the key combo PWR + Reload is pressed.
To fix it, keyboard scanning is disabled whenever the power button is
pressed. It locks a mutex indicating that scanning should be disabled,
and the main keyboard scanning task blocks on the step where it sets up
the keyboard and waits for the mutex to unlock.
BUG=chrome-os-partner:10889
TEST=Pick one of the troublesome keys. First press it, then quickly
press the power button. Then press the power button followed
by the troublesome key. Repeat this process several times for each key,
it should not reset the system.
Press power + reload, this should still reset the system.
Pressing and holding power should initiate a shutdown.
Change-Id: Ib60d2ebbb57eb8a3c135662514ec622c37a7eb07
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28402
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This removes a bunch of unnecessary typecasts, since you can assign
to/from void * without them. This also uncovered a few cases where
const was being cast away for the input params; now fixed.
BUG=none
TEST=mkbp hash from u-boot console, and/or system boots ok
Change-Id: Ic314b9d2ca06226ea8a09703ef5c1a912eb7146d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28500
The area_offset of following area are wrong which is related to the CPU
view in the STM32 chip:
FMAP
RO_FRID
RW_FWID
Add a macro RELATIVE() to calculate the real offset in flash.
BUG=chrome-os-partner:11269
TEST=build in chroot for link and snow.
Those fmap afddress are related to the start of flash.
Change-Id: I691814e2f53b1de0ecf9fd385bed8d5c598373a7
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28388
Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Reviewed-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Otherwise, EC software sync protects the entire firmware except in recovery mode, regardless of the WP pin.
BUG=chrome-os-partner:11847
TEST=boot with WP enabled but RO-at-boot disabled; flashinfo should show
entire flash still writable
CQ-DEPEND=28444
Change-Id: I58d60adfaa952b127e8695213f95f6da0e34821d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28445
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
When updating the EC and BIOS, we have to run for some times the new EC
with the old BIOS (after we have upgraded the first half of the EC and
before rebooting the machine), let's handle the ACPI request so the
kernel is not sending them into a loop triggering a reboot of the
machine.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:11821
TEST=update a Link EVT using "chromeos-firmware --mode=factory" from
current BCS binaries (EC v1.1.104-b8d7d8f / Firmware 2476) to next
candidates ( EC v1.1.301 / Firmware 2657).
Change-Id: I115a42e6c33c143cbdc38341dcf7e0f61a8bd771
Reviewed-on: https://gerrit.chromium.org/gerrit/28409
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
This is used only in selected platforms, and installed
by the temp-metrics package in the private overlay for
those platforms.
BUG=chrome-os-partner:11631
TEST=manually using about:histograms
Signed-off-by: Luigi Semenzato <semenzato@chromium.org>
Change-Id: I89dffed6aa34d683ff78a360988fdfb84c2dc641
Reviewed-on: https://gerrit.chromium.org/gerrit/28311
Tested-by: Luigi Semenzato <semenzato@chromium.org>
Reviewed-by: Richard Barnette <jrbarnette@chromium.org>
Commit-Ready: Luigi Semenzato <semenzato@chromium.org>
