This is useful for finding out which test runs for too long.
BUG=chrome-os-partner:19235
TEST=Run tests and see run time logged.
BRANCH=None
Change-Id: I5cb6727b2e1017fce1107e4892c1898e66598492
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51105
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If a test fails, redirect emulator output to stderr so that it shows up
even when V=1 is not set.
BUG=chrome-os-partner:19235
TEST=Manual
BRANCH=None
Change-Id: I6d8e05eaa222ebe043556bfcd3f63ca7e27c2721
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51097
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Still some work to do here but this now works.
NOTE: This makes the system behave like a normal
cros device where the power is applied automatically.
For some (other, unknown) reason the "reboot ap-off"
is not passing flags correctly to keep it off.
BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transition from G3 to S0
Change-Id: I694136b9611e18ac8fb7b1e960bd10caa258ce28
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51077
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The timer is the only source of timing for the emulator. This means we
can make it go faster without breaking the tests. This CL sets the
default scale to be 3x faster than normal time.
BUG=chrome-os-partner:19235
TEST=Pass all tests. Check the tests run faster.
BRANCH=None
Change-Id: Ib9035884b34f41c4e9aa2206284b5f1ec8fc0d1f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50956
If the user unplug video dongle before it is detected and handled, we
may be stuck with ID_MUX=1 and interrupt from TSU6721 disabled. This
essentially breaks charging.
BUG=chrome-os-partner:18997
TEST=Build and check charging port still works.
BRANCH=spring
Change-Id: I93e69287d07947fef743b4674857e52c26513835
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50969
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
We cannot know how much current we can pull from video dongle, so let's
just try to pull as much as possible up to 2A.
BUG=chrome-os-partner:19324
TEST=Plug in video dongle and see 3.3V output.
TEST=Plug in video dongle with supplied charger, and see 50% PWM duty
cycle.
TEST=Plug in video dongle with normal charger, and see 70~80% PWM duty
cycle.
BRANCH=spring
Change-Id: I8b503f886fcafaa11e6757a5059ce673a8ed53cc
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50963
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The recovery pin input from servo is open drain and needs
an internal pullup enabled so it is not always low.
BUG=chrome-os-partner:19398
BRANCH=none
TEST=manual: ensure rec_mode can be turned off
$ dut-control rec_mode:off rec_mode
rec_mode:off
Change-Id: I387a53eb5b64bb0bf3a87fc47b5cca9b2063f6a9
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50993
The help text says to pass 0 or 1 for the mode but
the code only accepts "on" or "off".
Fix up the help text to match and have the display
output for the port status also use on/off so it is
consistent with the input.
BUG=chrome-os-partner:18825
BRANCH=none
TEST=manual: verify "usbchargemode 0 on" works as
it is explained in the help text.
Change-Id: Ib32dc68af93989d277aa84a1cb53ae9b66a8b595
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50838
Slippy uses UART2 instead of UART1 and so the EC needs
to be able to tolerate having the host use a different
interface. There are of course many ways to accomplish
that but this approach adds two config variables to specify
the host uart and the host uart irq.
The UART port setup is split out to allow them to be
configured separately rather than needing to be adjacent
in a for loop.
The interrupt functions were renamed (to ec and host) in
order to indicate which interface they are responsible for.
BUG=chrome-os-partner:19356
BRANCH=none
TEST=boot slippy and see host serial output
Change-Id: I1913ff3d650f329224c9654eee7bb7412fae5402
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50837
SPI is always enabled on pit, so remove #ifdefs
SPI1_CLK was aliased to AC_STATUS, which is left over from snow and
doesn't exist on pit. That caused it to be driven high briefly during
EC boot.
Also set SPI pins for 40MHz speed so we can try faster SPI clock.
BUG=chrome-os-partner:19304
BRANCH=none
TEST=boot system; sspi 2:0 256 9f prints a bunch of FDs then FEEC010001
Change-Id: I10352cff3669d6a087939d9d8e302d70708e9ee3
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51023
Reviewed-by: Doug Anderson <dianders@chromium.org>
This is causing the host to reset because this pin is
going low when it is left as open drain, despite having
a 3.3V pullup.
BUG=chrome-os-partner:19355
BRANCH=none
TEST=manual: boot on slippy without RCIN# causing reset
Change-Id: I59e9316e85ce618edc84c7dd988d70ea4de1e71a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50836
This commits the hacks made during board bringup. Bugs can be filed and
fixed based on this starting point.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Try it and see.
Change-Id: Ia663eaf9a357633873b1b5d5cc6dbdda63513082
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50875
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Several test utility macros have been duplicated across tests. Let's put
them in a single place.
BUG=chrome-os-partner:19236
TEST='make runtests', 'BOARD=spring make tests'
BRANCH=None
Change-Id: Ib0c9f829715425cc23e33b8ef456b17dfadab13c
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50513
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The current delay is unnecessarily long. This CL shortens the delay.
BUG=chrome-os-partner:19236
TEST='make runtests'
BRANCH=None
Change-Id: Ica07458e7ae15cf28c3482b6df96df66c0d45182
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50487
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The spec suggests we cannot reliably go over 1.5A and gracefully
recover. Let's avoid going over that limit.
BUG=chrome-os-partner:19267
TEST=Build spring
BRANCH=spring
Change-Id: I07411ff3ce4107e0289c5af5365ef5a23fd23e4e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50321
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The i2cdetect command on Linux likes to probe by doing a write of 0
bytes. Rather than always returning success because there was nothing
to write, let's actually implement this command.
At the moment we only implement for the stm32l. We also don't try to
implement the "read of 0" bytes since I don't think anyone uses that.
BUG=chrome-os-partner:18778
BRANCH=none
TEST=i2cdetect -y -a 20 now detects the right devices
Change-Id: Ia159ce9b8c957d5cd11f187f1a179ca5967bf96f
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50009
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
The STM32L manual has a whole section on i2c master reads and
describes the correct method for receiving exactly 2 bytes and more
than 2 bytes. We weren't following those instructions and thus larger
transfers weren't working.
BUG=chrome-os-partner:19265
BRANCH=none
TEST=i2cxfer r16 0x90 0
...doesn't fail
TEST=i2cxfer r 0x90 0
...doesn't fail
TEST=Use pydevi2c and test some commands:
>>> tps = I2CDevice(20, 0x48)
>>> [hex(x) for x in tps.Get(0, 20)]
['0x1e', '0x0', '0x3e', '0x0', '0x12', '0x20', '0x4b', '0xbf',
'0xff', '0xff', '0x20', '0x12', '0x1e', '0x1e', '0x1e', '0x1f',
'0x1f', '0x1f', '0x1f', '0x1f']
Change-Id: Ifaab6d8b700e099bcd9c374c70fca0983858ed3f
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50229
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
On 64-bit platform, arrays should be aligned to 8 bytes. Also, change
the order of host_command fields so that it's packed on both 32-bit and
64-bit platforms.
BUG=chrome-os-partner:19257
TEST=Pass all tests. Print out and check the content of host commands.
BRANCH=None
Change-Id: I350a903bc11562d6d205c402548942f8967b75a5
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50467
This includes:
- Increase overcurrent retry count from 1 to 2.
- Mark overcurrent event regardless of what current PWM duty cycle is.
- PWM duty cycle settles faster.
- PWM duty cycle starts from ~100%.
BUG=chrome-os-partner:19001, chrome-os-partner:19037
TEST=Manual
BRANCH=spring
Change-Id: Idf007fb589fde3baef6c8975dfa1f2fc1ec6e95d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50262
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Perviously we use uint32_t for this, but this doesn't compile for 64-bit
environment (and likely doesn't for 16-bit either.) Use uintptr_t so that
we don't get size mismatch errors.
BUG=chrome-os-partner:19257
TEST=Run host emulated tests
BRANCH=None
Change-Id: I3cd66a745fa171c41a5f142514284ec106586acb
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50358
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If an ADC read fails and EOC bit is somehow never set, we will be stuck
in the read function holding mutex lock forever, which is really bad.
Let's set a timeout for this.
BUG=chrome-os-partner:18997
TEST=Boot Spring. Check ADC works.
BRANCH=spring
Change-Id: I19b108326f34f380497606fe92eabfaf0a778bb4
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50338
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
There was an off-by-one error in bounds checking the reply. You could
trigger it with pydevi2c with:
>>> tps = I2CDevice(20, 0x48, force=True)
>>> tps.Get(0, 249)
The EC would show:
ASSERTION FAILURE 'msg_len < sizeof(out_msg)' in reply() at
chip/stm32/spi.c:184
BUG=chrome-os-partner:18778
BRANCH=none
TEST=Run the above commands and see no error.
Change-Id: I9789405a9d70c5dc3fa237504fea8f46a139386c
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50254
Reviewed-by: Simon Glass <sjg@chromium.org>
I've simplified the SPI module, since we only ever use SPI1 (and there
were already a number of places which assumed this was true).
Somewhere along the way I fixed a number of problems keeping the code
from compiling and working on STM32L. The code isn't currently used
anywhere else, but should still work there (that is, I don't think I
broke it working on STM32F if you re-enable it on some STM32F
platform).
BUG=chrome-os-partner:19073
BRANCH=none
TEST=from u-boot console, sspi 2:0 64 9f0000
u-boot prints: FDFDFDFDFDFDFDFD
ec prints: [193.740912 HC 0x9f][193.741141 HC err 1]
[sjg: gpio optimization back in for now]
[dianders: add comment as rspangler requested; update SOBs]
Change-Id: Ib9419403e4e44dadc1f17681e48401882cb49175
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49684
This is needed for non-volatile register emulation. Also, this can be
used to implement system jump or reset flags.
BUG=chrome-os-partner:19235
TEST=Run utils test. Check persistent storage file exists.
BRANCH=None
Change-Id: I699f95718ef6f5de6c3bbb4e37619ee015fb6c4a
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50313
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This is the first version of pthread-based RTOS emulator. With this, we
will be able to test high-level modules entirely on the host machine.
BUG=chrome-os-partner:19325
TEST='make runtests' and see tests passing.
BRANCH=None
Change-Id: I1f5fcd76aa84bdb46c7d35c5e60ae5d92fd3a319
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49954
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
A test that check keyboard MKBP module using keyboard scanning module and
host commands.
BUG=chrome-os-partner:19236
TEST=Pass the test
BRANCH=None
Change-Id: Ic22a2c8f3069d8e72c1222882073d428b733bca3
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50132
The EC currently assumes the AP only provides USB power during S0, which
is incorrect. This CL adds S3 so that it behaves when the device is
suspended.
BUG=chrome-os-partner:19190
TEST=Suspend and unplug power. Doesn't hear clicking sound.
BRANCH=Spring
Change-Id: Ice1421bda55b2fee408ba062ed3de7a697ccd0c8
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50093
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This specifies the Slippy GPIOs. Because the power controls are completely
different from Link, we have to gut the power sequencing task to do nothing.
For bringup and test, we'll just manually set and get the GPIOs until we
know exactly what we need to do.
This is where the fun starts...
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Built everything, Link still works.
Change-Id: Ic1ce1d4085298f49dd98d99e81e04835eca5f11c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50004
Temp sensors, I2C devices, ADC inputs, and keyboard GPIOs are all different.
This removes the things we don't need, connecting some of the things we
will.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=none
Doesn't break Link.
Change-Id: Ifb9775d921f6e9952497bffa98d405353ed4df71
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49964
Reviewed-by: Randall Spangler <rspangler@chromium.org>
I'll still need to decide what to do differently for Slippy, but for now
let's just identify the places where there will likely be a difference.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Link still works.
Change-Id: I950f0e5356ccf9838f2140d853122235f884e34f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49931
1) Port needs to be open-drain. Missed this when porting from STM32F
because open-drain and alternate function are set in the same register
on STM32F and are different regs on STM32L.
2) Queue a stop condition if a transaction failed, so the clock goes
back high.
BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan finds both the PMU at 0x90 and the battery at 0x16
Change-Id: I708b925e4e30da9d5864b74641b1cbe90c9313fe
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49898
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Also renaming to avoid confusion as to what's being charged.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Build everything, Link still works.
Change-Id: I4205a1210c7dfe57cfbbdd740970ef57e6a011b8
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49775
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Now that I2C works, we can re-enable the charging task to debug
battery charging.
BUG=chrome-os-partner:18657
BRANCH=none
TEST=in EC log, should see battery state messages
Change-Id: I600d0152ba416c13420ce853b55206afba9f6cec
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49649
The state REINIT in TPS65090 charge state machine is more like IDLE0
state in charge_state.h. Rename it so that it's less confusing and
easier to merge the two state machines in the future. Also move the
state name definition to the header file.
BUG=chrome-os-partner:18914
TEST=Boot Spring
BRANCH=None
Change-Id: I116438fedc46ff188dfb6a3964795715b5af4d1f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49732
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This eliminates a per-second hook and removes a duplicated ADC read per
second. Also, TSU6721 is now reset after every detachment. This way, we
don't suffer from TSU6721 dirty state (most commonly seen after OTG
dongle detached.)
BUG=chrome-os-partner:17928
TEST=1. Test plugging/unplugging video dongle.
2. Test Toad cable mode switching.
3. Test charging with 200K charger.
BRANCH=spring
Change-Id: Ic035b7332e07ca385d766c735ce39efd31e46034
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49578
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This fixes a bug in ADC watchdog that sample sequence is not set before
enabling ADC watchdog. Also, current sample time isn't long enough for
some weakly driven net. This extends ADC sample time to 13.5 cycles.
BUG=chrome-os-partner:17928
TEST=Test with Toad cable and video dongle on Spring
BRANCH=spring
Change-Id: Iecdfd4aada4e974225a41144e213e92897f4797b
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49680
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The voltage rails, inputs, and sequencing is completely different. Easiest
to just handle it separately for each chipset.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Built Link, still works.
Change-Id: Ibf26ef47cdf2284b7bfb3a2e5ccfb6841aba5ac6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49559
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This puts a copy of test binaries at build/${BOARD}/test-*.bin. This way
it is easier for us to get all test binaries.
BUG=chrome-os-partner:19057
TEST='make tests' and check build/${BOARD}/test-*.bin
BRANCH=None
Change-Id: I8394cea6bee95f00fc01d725d2494ca5e222f47d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49608
Reviewed-by: Randall Spangler <rspangler@chromium.org>
STM32L doesn't need the DMA-based workarounds needed by STM32F, since
the STM32L I2C block isn't broken. DMA adds a lot of code overhead
when transferring 2-3 bytes, and is implemented differently on STM32F
vs STM32L so it doesn't even work on STM32L
Add a simple polled I2C implementation for STM32L. This is not the
final implementation, which will use interrupts, but for now it works,
unlike the DMA-based version.
BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan on pit finds a device at 0x90
Change-Id: Ie2a6c9ac6f62b7fd3c35e313b4015e080d9f937a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49555
With a Toad cable, the user can access the EC serial console through the
micro-B connector.
We probably need to de-activate the input on the EC serial console when
the Write-Protect is on, since we have fairly "powerful" commands on the
EC command-line.
Add a new CONFIG_CONSOLE_RESTRICTED_INPUT on platforms with externally
accessible EC serial port.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=spring
BUG=chrome-os-partner:18716
TEST=on Spring with CONFIG_CONSOLE_RESTRICTED_INPUT set, try with and without
write-protect, use successfully the EC console in the former case, and see
"Console is DISABLED" in the latter case.
Change-Id: Ic9646d5468183f4d8f94b5e5e1d2a727941d7bbe
Reviewed-on: https://gerrit.chromium.org/gerrit/49537
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
