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24153748b6
MT8183 uses a power sequencing inspired from RK3399, with fewer signals. We only have 1 signal from PMIC (PMIC_PWR_GOOD), active in S0/S3, and 1 signal from AP (AP_IN_S3_L), active in S3/S5. One particularity of this design is that we need to reboot the EC to RO on every single cold boot/reboot. For the forced transition to S5, we assert the WATCHDOG signal to PMIC to shut it down, which should usually work, if the PMIC was configured properly by AP. If not, we also assert power+home key (PMIC_EN_ODL) until the PMIC shuts down for good. BRANCH=none BUG=b:109850749 TEST=make BOARD=kukui -j Change-Id: Ibcde8b937d7f4cecb0f470b9a7e0809fc24efae6 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1092402 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly