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301fd861159c2e3682265aa5dce198bde697ed5e
Rather than scan the entire GPIO table, stop as soon as all interrupt
bits have been handled. We hand-order the table so GPIOs with
interrupts are first, so this should reduce interrupt overhead.
BUG=chrome-os-partner:23296
BRANCH=none
TEST=boot rambi
x86indebug -1
apshutdown
powerbtn
...That should print lots of 'x86 in' debug messages as pins
change state, showing that the interrupt handlers are still responding.
Change-Id: I7942cd51870ad51de068d90d68cf6634ff2fb1a0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173031
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
In the most general case, the flash layout looks something like this: +---------------------+ | Reserved for EC use | +---------------------+ +---------------------+ | Vblock B | +---------------------+ | RW firmware B | +---------------------+ +---------------------+ | Vblock A | +---------------------+ | RW firmware A | +---------------------+ +---------------------+ | FMAP | +---------------------+ | Public root key | +---------------------+ | Read-only firmware | +---------------------+ BIOS firmware (and kernel) put the vblock info at the start of each image where it's easy to find. The Blizzard EC expects the firmware vector table to come first, so we have to put the vblock at the end. This means we have to know where to look for it, but that's built into the FMAP and the RO firmware anyway, so that's not an issue. The RO firmware doesn't need a vblock of course, but it does need some reserved space for vboot-related things. Using SHA256/RSA4096, the vblock is 2468 bytes (0x9a4), while the public root key is 1064 bytes (0x428) and the current FMAP is 644 bytes (0x284). If we reserve 4K at the top of each FW image, that should give us plenty of room for vboot-related stuff.
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