GPIO02 (EC_HAVEN_RESET_ODL) is now configured to GPIO_ODR_HIGH,
designed for EC to reset H1. And it's no longer used with just
the HW path reserved (DNS R267 on schematic).
Tests showed that INPUT | PULL_UP has lower EC power consumption
so reconfiguring here.
BUG=b:64503543
BRANCH=none
TEST=manual
(on chroot)
$ make BOARD=soraka -j
$ ./util/flash_ec --board soraka
(on DUT)
$ powerd_dbus_suspend
(on chroot)
$ dut-control -p $PORT pp3300_dsw_ec_ma -t 10 | grep @@
> @@ NAME COUNT AVERAGE STDDEV MAX MIN
> @@ pp3300_dsw_ec_ma 5629 1.25 0.71 16.60 1.12
Without the change, the original setting gives:
> @@ NAME COUNT AVERAGE STDDEV MAX MIN
> @@ pp3300_dsw_ec_ma 4674 2.69 1.98 12.00 2.00
Change-Id: I4e2268612109155f57fdd236088cadaaba54bb3f
Signed-off-by: Ayo Wu <ayowu@google.com>
Reviewed-on: https://chromium-review.googlesource.com/786951
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
7610082ddc