Archana Patni 74615c1011 skylake: do not clear masks in S0ix -> S0 transition ...

EC clears the SCI/SMI/Wake masks in the resume sequence for S3
and S0ix. This works in the S3 case because Coreboot reprograms
the masks after EC. But in S0ix, these masks stay cleared forever.

This means that no further events are sent to the host.

This patch conditionally clears the masks only in the S3 transition.

BRANCH=glados
BUG=chrome-os-partner:48834
TEST=hostevent in EC console before and after S0ix to ensure SCI masks
are preserved

Change-Id: I23751680788ee7a239e321309a1334d37adc4f43
Signed-off-by: Archana Patni <archana.patni@intel.com>
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Signed-off-by: Jenny TC <jenny.tc@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/320191
Commit-Ready: Jenny Tc <jenny.tc@intel.com>
Tested-by: Jenny Tc <jenny.tc@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>

2016-02-22 09:00:52 -08:00

..

lfw

nuc: Add SHI driver for arm-based platform in chip folder.

2015-06-26 18:57:32 +00:00

spiflashfw

nuc: Fixed flash layout issue for npcx

2015-09-21 20:50:56 -07:00

adc_chip.h

wheatley / nuc: Modified the internal ref voltage of ADC to 2.816V

2016-02-17 02:02:03 -08:00

adc.c

common: adc/i2c: Mark task_waiting volatile

2015-12-01 18:52:53 -08:00

build.mk

nuc: Simplify adc/pwm/fan drivers and related structures in boards

2015-09-29 21:11:41 -07:00

clock_chip.h

nuc: Adjust core clock from 16/12 MHz to 15/13 MHz.

2016-01-20 20:36:53 -08:00

clock.c

nuc: Modify divider of apb2 to 1 if it's freq isn't divisible by 1MHz

2016-02-10 15:45:52 -08:00

config_chip.h

cleanup: Standardize use of CONFIG_I2C and add MASTER/SLAVE CONFIGs

2015-11-03 09:08:21 -08:00

config_flash_layout.h

nuc: Fixed wheatley bugs of SERIRQ and AC detection.

2015-11-11 20:35:03 -08:00

fan_chip.h

nuc: Support rpm mode for fan control.

2016-01-06 20:43:32 -08:00

fan.c

nuc: Add support for CONFIG_LOW_POWER_S0.

2016-02-06 01:57:58 -08:00

flash.c

nuc: Remove unnecessary NPCX_EC_FLASH_SIZE definition in npcx.

2015-10-19 21:26:52 -07:00

gpio.c

nuc: Add support for CONFIG_LOW_POWER_S0.

2016-02-06 01:57:58 -08:00

header.c

wheatley: Add CONFIG_LTO definition to reduce FW size.

2015-12-30 20:40:48 -08:00

hwtimer_chip.h

nuc: Add support for CONFIG_LOW_POWER_S0.

2016-02-06 01:57:58 -08:00

hwtimer.c

nuc: Add support for CONFIG_LOW_POWER_S0.

2016-02-06 01:57:58 -08:00

i2c.c

nuc: Modify divider of apb2 to 1 if it's freq isn't divisible by 1MHz

2016-02-10 15:45:52 -08:00

jtag.c

nuc: Enable JTAG directly by NPCX_ENABLE_JTAG definition

2015-10-17 04:56:09 -07:00

keyboard_raw.c

nuc:

2015-07-25 01:22:32 +00:00

lpc_chip.h

nuc:Using LRESET interrupt to re-initialize LPC settings after warm boot

2015-08-12 18:12:27 +00:00

lpc.c

skylake: do not clear masks in S0ix -> S0 transition

2016-02-22 09:00:52 -08:00

peci.c

nuc:

2015-07-25 01:22:32 +00:00

pwm_chip.h

nuc: Simplify adc/pwm/fan drivers and related structures in boards

2015-09-29 21:11:41 -07:00

pwm.c

nuc: Simplify adc/pwm/fan drivers and related structures in boards

2015-09-29 21:11:41 -07:00

registers.h

nuc: Add support for CONFIG_LOW_POWER_S0.

2016-02-06 01:57:58 -08:00

rom_chip.h

nuc: Add SHI driver for arm-based platform in chip folder.

2015-06-26 18:57:32 +00:00

shi_chip.h

nuc: Add SHI driver for arm-based platform in chip folder.

2015-06-26 18:57:32 +00:00

shi.c

nuc: Add SHI driver for arm-based platform in chip folder.

2015-06-26 18:57:32 +00:00

spi.c

common: change interface to SPI flash

2015-07-30 19:57:55 +00:00

system_chip.h

nuc: Support hibernate_wake_pins on wheatley, npcx_evb and npcx_evb_arm.

2016-01-14 22:12:05 -08:00

system.c

hibernate: Inform PD MCU before calling board hibernate callback

2016-02-17 15:33:07 -08:00

uart.c

nuc: Modify divider of apb2 to 1 if it's freq isn't divisible by 1MHz

2016-02-10 15:45:52 -08:00

watchdog.c

nuc: Reduce the period of watchdog check timer

2016-02-02 23:48:28 -08:00