OpenCellular

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Files

Philip Chen 163ba57cc2 scarlet: Assert SYS_RST_L in S5

To support CR50 deep sleep mode:
In up-sequence, SYS_RST_L needs to remain asserted on the transition
to S5 and then deasserted on the transition to S0;
In down-sequence, SYS_RST_L needs to be asserted on the transition to S5.

This only affects Scarlet.

BUG=b:35647982
BRANCH=none
TEST=minitor SYS_RST_L pin to confirm it is toggled right

Change-Id: Ic73d39c531f9d28b2087a23d58613e98ec80dbd2
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/866115
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>

2018-01-23 20:18:28 -08:00

apollolake.c

glkrvp: Enable eSPI instead of LPC including eSPI VW based SCI/SMI

2018-01-16 21:26:27 -08:00

apollolake.h

power: Group Intel x86 power sequencing common code

2017-01-20 22:40:32 -08:00

braswell.c

kunimitsu: hibernate: enable PseudoG3 support at board level

2016-02-18 17:35:16 -08:00

build.mk

cleanup: Remove 'ryu' board