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ea48c412e0
This patch updates the EC codebase to match the suggested USB
build. The spiflash utility must come from the same tarball.
BRANCH=none
BUG=none
TEST=as follows:
- programmed the FPGA, it now reports the following when reset:
boot_rom 20151012_041715@75660
- booted the new image using the latest spiflash version. Note
that the bootrom now reports the FPGA image it comes from
- disconnected the FPGA upgrade port, rebooted the device, entered
on the device console:
> spstp off
> spste
run on the workstation:
$ examples/spiraw.py -l 10 -f 800000
FT232H Future Technology Devices International, Ltd initialized at 857142 hertz
and observe on the DUT console:
Processed 10 frames rx count 11604, tx count 5512, tx_empty 10, max rx batch 11
>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I4e21151d03d1050999ea2045b2be4b99886ff15c
Reviewed-on: https://chromium-review.googlesource.com/305260
Commit-Ready: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>