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The NPCX_SMBCTL1_ACK bit (which tells the I2C master to produce a NACK rather than ACK) can be set but not cleared by SW -- it can only be cleared automatically after actually generating a NACK. During i2cscan, we want to NACK the first byte returned, but we won't actually produce a NACK unless the slave ACKs our scanned address. Therefore, we must wait until the slave ACKs its address before setting NPCX_SMBCTL1_ACK -- use the NPCX_SMBCTL1_STASTRE / stall interrupt to do so. BUG=chrome-os-partner:53323 BRANCH=None TEST=Manual on kevin. Verify faulty temperature sensor reads are not seen after `i2cscan` and verify i2c otherwise functions normally. Change-Id: I080d8804adb246129aaebbfbf5ad862e9513da3b Signed-off-by: Shawn Nematbakhsh <shawnn@chromioum.org> Reviewed-on: https://chromium-review.googlesource.com/344818 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Shawn N <shawnn@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly