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a643b6216c
To assist in x86 chipset bringup, there are 4 GPIOs we weren't printing state transitions for. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=reboot; should see state transitions in the high nibble (mask 0xF000), for example: [x86 power state 1 = S5, in 0x2001] [x86 power state 1 = S5, in 0x3001] [x86 power state 1 = S5, in 0x7001] Change-Id: I0527e4698425d845e8b08589e89592f95d8bee41
- EC Lib
This wraps Blizzard driverlib and implements the EC chip interface defined
by Google. See below diagram for architecture.
+--------------------+
| Host BIOS/OS |
+--------------------+
---- host interface ----
+--------------------+
| Google EC features |
+--------------------+
---- chip interface ---- The interface is defined in
src/platform/ec/chip_interface/*.
+--------------------+ But the real implementation is in EC Lib.
| EC Lib |
+--------------------+
| Blizzard low level |
| driver, the |
| driverlib. |
+--------------------+