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acb3970630
On npcx5, the peci speed should be 750K bps but we got 1.5M bps since
selecting wrong source clock of peci. From the peci specification, the
speed range is from 2K bps to 2M bps. That's why we still passed the
peci test on npcx5's evb. This CL corrects the source clock of it from
apb2 to fmclk and make sure the speed is 750K bps by the scope.
BRANCH=none
BUG=none
TEST=Passed peci test on npcx5's evb and make sure the speed of peci is
750K bps.
Change-Id: Ic5c55f7be9be195182e4c4f4ad64b7426afd42db
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/486680
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly