Vincent Palatin ba98b92bbb cortex-m0: add more constraints on atomic implementation
In ARMv6-m instruction set, the load/store address register can only be
a "low" register : r0..r7.
Update the inline assembly constraints to match the hardware.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=make buildall

Change-Id: I9872aeb437b2bb6401bed8076348e26d434320dd
Reviewed-on: https://chromium-review.googlesource.com/224582
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2014-10-21 22:44:53 +00:00
2014-10-09 20:44:43 +00:00
2014-10-21 00:44:29 +00:00
2014-03-31 22:45:09 +00:00
2012-05-11 09:11:52 -07:00
2014-04-02 19:58:53 +00:00
2014-05-15 05:20:14 +00:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit
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