Aaron Durbin bf64fc0758 chip/npcx: interrupt on both edges of PLTRST_L
Different actions need to be taken on PLTRST_L depending on
if it is asserted or deasserted. The vstore module needs to
reset its locks when PLTRST_L is asserted (host is in reset).
The interrupt was previously on occurring on a deassertion of
PLTRST_L (rising edge). That's not conducive for handling
actions which are required for assertion (falling edge).
Lastly, fix the CONFIG_CHIPSET_RESET_HOOK logic to be
called when PLTRST_L is asserted.

BUG=chrome-os-partner:55471
BRANCH=None
TEST=Able to boot and reboot without getting vboot hash saving
errors. Also am able to see the assertion/deassertion messages
on the console.

Change-Id: I70eac3309a5876de775ec5c34dab2e9aa8bbb42c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/362000
Reviewed-by: Shawn N <shawnn@chromium.org>
2016-07-21 11:22:26 -07:00
2016-07-19 18:33:39 -07:00
2016-07-15 21:39:36 -07:00
2012-05-11 09:11:52 -07:00
2016-07-11 21:27:46 -07:00
2016-07-11 21:27:46 -07:00
2014-04-02 19:58:53 +00:00
2015-12-08 20:05:05 -08:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit

For instructions on building from source, refer to

http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
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