Nicolas Boichat c869b0f15c chip/stm32/registers.h: Fix STM32_FLASH_OPT_LOCKED polarity
We currently set STM32_FLASH_OPT_LOCKED
to (STM32_FLASH_CR & FLASH_CR_OPTWRE), however the bit is set
when option byte are _unlocked_.

From STM32F0 Reference Manual:

Bit 9 OPTWRE: Option byte write enable
  When set, the option byte can be programmed. This bit is set
  on writing the correct key sequence to the FLASH_OPTKEYR register.
  This bit can be reset by software

BRANCH=none
BUG=chromium:739608
TEST=Flash hammer, flashwp true; reboot; flashinfo
     => hammer does not hang on reboot, RO is protected

Change-Id: I1b6eb5d638534ece90d6d5164586f49bdb0c151d
Reviewed-on: https://chromium-review.googlesource.com/561036
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-07-06 05:00:28 -07:00
2017-07-03 04:30:00 -07:00
2017-06-28 21:50:51 -07:00
2017-06-28 21:50:50 -07:00
2012-05-11 09:11:52 -07:00
2014-04-02 19:58:53 +00:00
2015-12-08 20:05:05 -08:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit

For instructions on building from source, refer to

http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
Description
No description provided
Readme 1.4 GiB
Languages
C 64.7%
Lasso 20.7%
ASL 3.6%
JavaScript 3.2%
C# 2.9%
Other 4.6%