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d8cbf0dc40
Add a flash driver for the STM32L4 family. For write and erase, the code is very similar to other variants excepted the 'normal' writes need to be perform 2 aligned 32-bit words at a time. Option bytes are a sligthly easier business since the hardware deals with the option bytes page preserving and erasing for us. For the write-protection, the STM32L4 is slightly different from the other variants. The write-protection granularity is still a 2-kB block (2kB here) but instead of having a 'bitmap' of the protected blocks, it defines 2 write-protection ranges (WRP1AR and WRP1BR). For the EC code base, we are using WRP1AR to protect the Read-Only regions and WRP1BR to protect the Rollback and RW regions (if they exist). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:35648258 TEST=On Eve, run 'flashrom -p ec:type=fp -w /tmp/ec.bin' and 'flashrom -p ec:type=fp --wp-enable --wp-range 0x0 0x20000' Change-Id: Iaa98c1b4d3b07de2923ac076624bd4601c31a600 Reviewed-on: https://chromium-review.googlesource.com/456711 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly