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The pstate structure is written using the low-level flash_physical_write() function. As a consequence, it is supposed to meet the CONFIG_FLASH_WRITE_SIZE alignment constraint. Add a build-time assertion to avoid silent failures. Slightly decrease the maximum size of the serial number string, so the structure has a natural 32-byte alignment which is compatible with a large number of platforms (including STM32L4 which requires 64-bit alignment). Of course, this change is not fully backward-compatible. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chromium:571477 b:35648258 TEST=on STM32L442, build and run 'flashrom --wp-enable' without failure. Change-Id: Ia8f82790a61a6c7d2cf9bfeb95bfdaf7b8c52d11 Reviewed-on: https://chromium-review.googlesource.com/458201 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly