Alexandru M Stan 3b101e56a9 NVIC: Adjust priority setting ...

Cortex-m0 we supports 2 bit priorities for the NVIC, yet we clear with 0x7 (3
bits). Change so we now clear with 0x3

Also limited priority to the max available (so we don't set extra bits we don't
want or modulus the priority, otherwise setting priority 8 will actual give you
priority 0) in both cortex-m and cortex-m0.

BUG=None, discovered while looking at the code
TEST=Should be no functional change, NVIC priorities should still work the same.
BRANCH=None

Change-Id: I31ba041449cae96983753b297e2631c310a406c4
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236086
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

2014-12-17 02:18:16 +00:00

..

include

Protect inactive EC image from code execution

2013-12-17 01:32:24 +00:00

atomic.h

cleanup: Remove checkpatch warnings

2013-12-19 00:12:28 +00:00

build.mk

make the common runtime optional

2014-03-22 06:24:16 +00:00

config_core.h

Move core-specific toolchain configuration to core/ directory

2013-11-07 22:36:05 +00:00

cpu.c

Clean up core routines - cpu, task, watchdog

2012-10-29 12:02:41 -07:00

cpu.h

cpu: Enable reporting of faults

2012-07-02 15:02:07 -07:00

ec.lds.S

rsa: add support for 4096 and 8192 bit keys

2014-11-15 06:00:02 +00:00

init.S

better unhandled exception panic without runtime

2014-07-03 02:56:52 +00:00

irq_handler.h

stm32f: Add DMA interrupt handlers for channel 1 to 3

2014-10-21 00:44:39 +00:00

mpu.c

ryu_sh_loader: Add board directory for load image

2014-12-15 22:46:21 +00:00

panic.c

extract common core code

2013-12-05 22:30:58 +00:00

switch.S

cortex-m: store FPU regs on context switch

2014-04-18 18:58:36 +00:00

task.c

NVIC: Adjust priority setting

2014-12-17 02:18:16 +00:00

watchdog.c

Remove unneeded includes of registers.h

2013-08-02 17:32:25 -07:00