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f1f1203431
Boards that have plt_rst_l had sys_rst_l currently use the two signals to detect resets and reset the TPM. That meant that the TPM could reset twice depending on the timing of those signals. On boards with plt_rst_l, we should really just use that to detect system resets and not sys_rst_l. On boards with plt_rst_l, sys_rst_l should only be used as an output to trigger warm resets. This change makes both boards use the gpio tpm_rst_l_in to detect AP resets. That gpio will be connected to a different pin depending on which board we are using. On Gru the gpio will be connected to diom0 which is sys_rst_l, and reef will use diom3 which is plt_rst_l. BUG=chrome-os-partner:61789 BRANCH=none TEST=manual Use cr50 servo to verify the contents of /var/cache survive reset after 'dut-control warm_reset:on sleep:0.5000 warm_reset:off' test on gru and reef verify that the system can boot to kernel run 'sysrst pulse' and check that you only see one system reset use 'pinmux' to verify the pins for the two types of boards are setup properly on reef diom0 is an input, diom3 is an input with wake_falling, and gpio1_gpio1 uses diom3 on gru check that diom0 is an input with wake_falling, diom3 is not configured, and gpio1_gpio1 uses diom0 Change-Id: I1f6e8bfa525ffa5585a18282b78014f36f0cfee6 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/428130 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly