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Merge branch 'master' of github.com:opencomputeproject/OpenNetworkLinux

Browse Source
This commit is contained in:
Jeffrey Townsend
2017-07-14 18:41:59 +00:00
parent 0a1dad9343 a17a83966b
commit 775e7d567a
145 changed files with 15743 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config
View File

@@ -470,7 +470,9 @@ CONFIG_X86_PAT=y
CONFIG_ARCH_USES_PG_UNCACHED=y
CONFIG_ARCH_RANDOM=y
CONFIG_X86_SMAP=y
# CONFIG_EFI is not set
CONFIG_EFI=y
CONFIG_EFI_STUB=y
# CONFIG_EFI_MIXED is not set
CONFIG_SECCOMP=y
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
@@ -521,6 +523,7 @@ CONFIG_ACPI_CONTAINER=y
# CONFIG_ACPI_SBS is not set
# CONFIG_ACPI_HED is not set
CONFIG_ACPI_CUSTOM_METHOD=y
# CONFIG_ACPI_BGRT is not set
# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set
# CONFIG_ACPI_APEI is not set
# CONFIG_ACPI_EXTLOG is not set
@@ -2971,6 +2974,12 @@ CONFIG_ISCSI_IBFT_FIND=y
CONFIG_ISCSI_IBFT=y
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
# CONFIG_EFI_VARS is not set
CONFIG_EFI_RUNTIME_MAP=y
#
# File systems
#
@@ -3102,6 +3111,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
# CONFIG_UFS_FS is not set
# CONFIG_EXOFS_FS is not set
# CONFIG_F2FS_FS is not set
CONFIG_EFIVAR_FS=y
CONFIG_ORE=y
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
@@ -3365,6 +3375,7 @@ CONFIG_STRICT_DEVMEM=y
CONFIG_X86_VERBOSE_BOOTUP=y
CONFIG_EARLY_PRINTK=y
# CONFIG_EARLY_PRINTK_DBGP is not set
# CONFIG_EARLY_PRINTK_EFI is not set
# CONFIG_X86_PTDUMP is not set
CONFIG_DEBUG_RODATA=y
# CONFIG_DEBUG_RODATA_TEST is not set

400
packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch Normal file
View File

@@ -0,0 +1,400 @@
diff -Nu a/drivers/net/ethernet/intel/igb/bcm_phy.c b/drivers/net/ethernet/intel/igb/bcm_phy.c
--- a/drivers/net/ethernet/intel/igb/bcm_phy.c 1970-01-01 08:00:00.000000000 +0800
+++ b/drivers/net/ethernet/intel/igb/bcm_phy.c 2017-06-20 17:00:46.000000000 +0800
@@ -0,0 +1,206 @@
+#include "e1000_hw.h"
+#include "linux/brcmphy.h"
+
+/*
+ * 1000Base-T Control Register
+ */
+#define MII_BCM54XX_AUX_CTL_ENCODE(val) (((val & 0x7) << 12)|(val & 0x7))
+
+/*
+ * MII Link Advertisment
+ */
+#define MII_ANA_ASF (1 << 0) /* Advertise Selector Field */
+#define MII_ANA_HD_10 (1 << 5) /* Half duplex 10Mb/s supported */
+#define MII_ANA_FD_10 (1 << 6) /* Full duplex 10Mb/s supported */
+#define MII_ANA_HD_100 (1 << 7) /* Half duplex 100Mb/s supported */
+#define MII_ANA_FD_100 (1 << 8) /* Full duplex 100Mb/s supported */
+#define MII_ANA_T4 (1 << 9) /* T4 */
+#define MII_ANA_PAUSE (1 << 10)/* Pause supported */
+#define MII_ANA_ASYM_PAUSE (1 << 11)/* Asymmetric pause supported */
+#define MII_ANA_RF (1 << 13)/* Remote fault */
+#define MII_ANA_NP (1 << 15)/* Next Page */
+
+#define MII_ANA_ASF_802_3 (1) /* 802.3 PHY */
+
+/*
+ * BCM54XX: Shadow registers
+ * Shadow values go into bits [14:10] of register 0x1c to select a shadow
+ * register to access.
+ */
+#define BCM54XX_SHD_AUTODETECT 0x1e /* 11110: Auto detect Regisrer */
+#define BCM54XX_SHD_MODE 0x1f /* 11111: Mode Control Register */
+#define BCM54XX_SHD_MODE_SER 1<<6
+
+/*
+ * Indirect register access functions for the 1000BASE-T/100BASE-TX/10BASE-T
+ * 0x1c shadow registers.
+ */
+
+int bcmphy_write(struct e1000_hw *hw,u32 reg, u16 regval)
+{
+ u32 ret;
+ struct e1000_phy_info *phy = &hw->phy;
+
+ ret = phy->ops.write_reg(hw,reg, regval);
+ return ret;
+}
+
+u16 bcmphy_read(struct e1000_hw *hw, u32 reg)
+{
+ u16 val;
+ struct e1000_phy_info *phy = &hw->phy;
+
+ phy->ops.read_reg(hw,reg, &val);
+ return val;
+}
+
+static int bcm54xx_shadow_read(struct e1000_hw *hw, u16 shadow)
+{
+ bcmphy_write(hw, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow));
+ return MII_BCM54XX_SHD_DATA(bcmphy_read(hw, MII_BCM54XX_SHD));
+}
+
+static int bcm54xx_shadow_write(struct e1000_hw *hw, u16 shadow, u16 val)
+{
+ return bcmphy_write(hw, MII_BCM54XX_SHD,
+ MII_BCM54XX_SHD_WRITE |
+ MII_BCM54XX_SHD_VAL(shadow) |
+ MII_BCM54XX_SHD_DATA(val));
+}
+
+static int bcm54xx_auxctl_write(struct e1000_hw *hw, u16 regnum, u16 val)
+{
+ return bcmphy_write(hw, MII_BCM54XX_AUX_CTL, (regnum | val));
+}
+
+static int bcm54xx_config_init(struct e1000_hw *hw)
+{
+ int reg, err;
+
+ reg = bcmphy_read(hw, MII_BCM54XX_ECR);
+ if (reg < 0)
+ return reg;
+
+ /* Mask interrupts globally. */
+ reg |= MII_BCM54XX_ECR_IM;
+ err = bcmphy_write(hw, MII_BCM54XX_ECR, reg);
+ if (err < 0)
+ return err;
+
+ /* Unmask events we are interested in. */
+ reg = ~(MII_BCM54XX_INT_DUPLEX |
+ MII_BCM54XX_INT_SPEED |
+ MII_BCM54XX_INT_LINK);
+ err = bcmphy_write(hw, MII_BCM54XX_IMR, reg);
+ if (err < 0)
+ return err;
+
+ return 0;
+}
+
+void bcm54616s_linkup(struct e1000_hw *hw, int speed, int duplex)
+{
+ u16 regval;
+
+ /* set speed and full duplex*/
+ regval = bcmphy_read(hw,PHY_CONTROL);
+ regval &= ~(MII_CR_SPEED_SELECT_MSB |
+ MII_CR_SPEED_SELECT_LSB |
+ MII_CR_FULL_DUPLEX);
+
+ switch(speed) {
+ case SPEED_10:
+ regval |= MII_CR_SPEED_10;
+ break;
+ case SPEED_100:
+ regval |= MII_CR_SPEED_100;
+ break;
+ case SPEED_1000:
+ default:
+ regval |= MII_CR_SPEED_1000;
+ break;
+ }
+
+ switch(duplex) {
+ case FULL_DUPLEX:
+ regval |= MII_CR_FULL_DUPLEX;
+ break;
+ }
+
+ bcmphy_write(hw,PHY_CONTROL, regval);
+
+ regval = bcmphy_read(hw, PHY_CONTROL);
+ regval &= ~(MII_CR_ISOLATE);
+ bcmphy_write(hw, PHY_CONTROL, regval);
+}
+
+int bcm54616s_config_init(struct e1000_hw *hw)
+{
+ int err, reg;
+ u16 regval;
+ int i;
+
+ /* reset PHY */
+ regval = (1<<15);
+ bcmphy_write(hw, PHY_CONTROL, regval);
+
+ mdelay(10);
+
+ /* disable Power down and iso */
+ regval = bcmphy_read(hw,PHY_CONTROL);
+ regval &= ~(MII_CR_POWER_DOWN | MII_CR_ISOLATE);
+ bcmphy_write(hw, PHY_CONTROL, regval);
+
+ /* disable suport I */
+ /*0000 0100 1100 0010 */
+ bcm54xx_auxctl_write(hw, 0, 0x04c2);
+
+ regval = bcmphy_read(hw, MII_BCM54XX_AUX_CTL);
+
+ /* set 1000base-T */
+ regval = bcmphy_read(hw, PHY_1000T_CTRL);
+ regval |= (CR_1000T_FD_CAPS | CR_1000T_REPEATER_DTE);
+ bcmphy_write(hw, PHY_1000T_CTRL, regval);
+
+ /* set ctrl */
+ regval = (MII_CR_SPEED_1000 |
+ MII_CR_FULL_DUPLEX |
+ MII_CR_SPEED_SELECT_MSB);
+ bcmphy_write(hw, PHY_CONTROL, regval);
+
+ /* Setup read from auxilary control shadow register 7 */
+ bcmphy_write(hw, MII_BCM54XX_AUX_CTL, MII_BCM54XX_AUX_CTL_ENCODE(7));
+
+ /* Read Misc Control register */
+ reg = ((bcmphy_read(hw, MII_BCM54XX_AUX_CTL) & 0x8FFF) | 0x8010);
+ bcmphy_write(hw, MII_BCM54XX_AUX_CTL, reg);
+
+ /* Enable auto-detect and copper prefer */
+ bcm54xx_shadow_write(hw, BCM54XX_SHD_AUTODETECT, 0x31);
+
+ err = bcm54xx_config_init(hw);
+
+ /* set link parner */
+ regval = MII_ANA_ASF_802_3;
+ regval |= MII_ANA_HD_10;
+ regval |= MII_ANA_HD_100;
+ regval |= MII_ANA_FD_10;
+ regval |= MII_ANA_FD_100;
+ regval |= MII_ANA_ASYM_PAUSE;
+ regval |= (MII_ANA_PAUSE | MII_ANA_ASYM_PAUSE);
+ regval |= MII_ANA_PAUSE;
+ bcmphy_write(hw, PHY_AUTONEG_ADV, reg);
+
+ i=0;
+ while (1) {
+ regval = bcm54xx_shadow_read(hw,BCM54XX_SHD_MODE);
+ if (regval & BCM54XX_SHD_MODE_SER)
+ break;
+ if (i++ > 500) {
+ //printk("SERDES no link %x\n",regval);
+ break;
+ }
+ mdelay(1); /* 1 ms */
+ }
+ return err;
+}
diff -Nu a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c
--- a/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-06-20 16:44:29.000000000 +0800
+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-06-20 17:00:52.000000000 +0800
@@ -317,6 +317,10 @@
break;
case BCM54616_E_PHY_ID:
phy->type = e1000_phy_bcm54616;
+ phy->ops.check_polarity = NULL;
+ phy->ops.get_info = igb_get_phy_info_bcm;
+ phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_bcm;
+ bcm54616s_config_init(hw);
break;
case BCM50210S_E_PHY_ID:
break;
@@ -1636,6 +1640,7 @@
ret_val = igb_e1000_copper_link_setup_82577(hw);
break;
case e1000_phy_bcm54616:
+ ret_val = igb_copper_link_setup_bcm(hw);
break;
case e1000_phy_bcm5461s:
break;
diff -Nu a/drivers/net/ethernet/intel/igb/e1000_82575.h b/drivers/net/ethernet/intel/igb/e1000_82575.h
--- a/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-06-20 16:44:27.000000000 +0800
+++ b/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-06-20 17:00:57.000000000 +0800
@@ -25,6 +25,8 @@
#ifndef _E1000_82575_H_
#define _E1000_82575_H_
+extern void bcm54616s_linkup(struct e1000_hw *hw,int speed , int duplex);
+extern int bcm54616s_config_init(struct e1000_hw *hw);
#define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \
(ID_LED_DEF1_DEF2 << 8) | \
(ID_LED_DEF1_DEF2 << 4) | \
diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c
--- a/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-06-20 16:44:27.000000000 +0800
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-06-20 17:01:05.000000000 +0800
@@ -1187,6 +1187,19 @@
return E1000_SUCCESS;
}
+s32 igb_copper_link_setup_bcm(struct e1000_hw *hw)
+{
+ struct e1000_phy_info *phy = &hw->phy;
+ s32 ret_val;
+ u16 phy_data;
+
+ ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
+ phy_data &= ~(MII_CR_ISOLATE);
+ ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
+
+ return 0;
+}
+
/**
* e1000_copper_link_setup_m88_gen2 - Setup m88 PHY's for copper link
* @hw: pointer to the HW structure
@@ -1720,6 +1733,62 @@
return ret_val;
}
+s32 igb_phy_force_speed_duplex_bcm(struct e1000_hw *hw)
+{
+ struct e1000_phy_info *phy = &hw->phy;
+ s32 ret_val;
+ u16 phy_data;
+ bool link;
+
+ ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
+ if (ret_val)
+ return ret_val;
+
+ e1000_phy_force_speed_duplex_setup(hw, &phy_data);
+
+ phy_data &= ~(MII_CR_POWER_DOWN | MII_CR_ISOLATE);
+ ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
+ if (ret_val)
+ return ret_val;
+
+ /* Clear Auto-Crossover to force MDI manually. IGP requires MDI
+ * forced whenever speed and duplex are forced.
+ */
+ #if 0
+ ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);
+ if (ret_val)
+ return ret_val;
+
+ phy_data &= ~IGP01E1000_PSCR_AUTO_MDIX;
+ phy_data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;
+
+ ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);
+ if (ret_val)
+ return ret_val;
+
+ hw_dbg("IGP PSCR: %X\n", phy_data);
+ #endif
+ udelay(1);
+
+ if (phy->autoneg_wait_to_complete) {
+ DEBUGFUNC("Waiting for forced speed/duplex link on IGP phy.\n");
+
+ ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+ 100000, &link);
+ if (ret_val)
+ return ret_val;
+
+ if (!link)
+ DEBUGFUNC("Link taking longer than expected.\n");
+
+ /* Try once more */
+ ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+ 100000, &link);
+ }
+
+ return ret_val;
+}
+
/**
* e1000_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY
* @hw: pointer to the HW structure
@@ -2614,6 +2683,29 @@
}
return ret_val;
+}
+
+s32 igb_get_phy_info_bcm(struct e1000_hw *hw)
+{
+ struct e1000_phy_info *phy = &hw->phy;
+ s32 ret_val;
+ bool link;
+
+ if (phy->media_type != e1000_media_type_copper) {
+ DEBUGFUNC("Phy info is only valid for copper media\n");
+ return -E1000_ERR_CONFIG;
+ }
+
+ ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
+ if (ret_val)
+ return ret_val;
+
+ if (!link) {
+ DEBUGFUNC("Phy info is only valid if link is up\n");
+ return -E1000_ERR_CONFIG;
+ }
+
+ return ret_val;
}
/**
diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h
--- a/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-06-20 16:44:27.000000000 +0800
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-06-20 17:01:24.000000000 +0800
@@ -99,6 +99,9 @@
s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
bool line_override);
bool e1000_is_mphy_ready(struct e1000_hw *hw);
+s32 igb_copper_link_setup_bcm(struct e1000_hw *hw);
+s32 igb_phy_force_speed_duplex_bcm(struct e1000_hw *hw);
+s32 igb_get_phy_info_bcm(struct e1000_hw *hw);
#define E1000_MAX_PHY_ADDR 8
diff -Nu a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
--- a/drivers/net/ethernet/intel/igb/igb_main.c 2017-06-20 16:44:27.000000000 +0800
+++ b/drivers/net/ethernet/intel/igb/igb_main.c 2017-06-20 17:01:29.000000000 +0800
@@ -4814,6 +4814,14 @@
&adapter->link_speed,
&adapter->link_duplex);
+ switch (hw->phy.type) {
+ case e1000_phy_bcm54616:
+ bcm54616s_linkup(hw, adapter->link_speed, adapter->link_duplex);
+ break;
+ default:
+ break;
+ }
+
ctrl = E1000_READ_REG(hw, E1000_CTRL);
/* Links status message must follow this format */
netdev_info(netdev,
diff -Nu a/drivers/net/ethernet/intel/igb/Makefile b/drivers/net/ethernet/intel/igb/Makefile
--- a/drivers/net/ethernet/intel/igb/Makefile 2017-06-20 16:44:27.000000000 +0800
+++ b/drivers/net/ethernet/intel/igb/Makefile 2017-06-20 17:01:34.000000000 +0800
@@ -35,4 +35,4 @@
e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o \
e1000_i210.o igb_ptp.o igb_hwmon.o \
e1000_manage.o igb_param.o kcompat.o e1000_api.o \
- igb_vmdq.o igb_procfs.o igb_debugfs.o
+ igb_vmdq.o igb_procfs.o igb_debugfs.o bcm_phy.o

1
packages/base/any/kernels/3.16-lts/patches/series
View File

@@ -25,3 +25,4 @@ platform-powerpc-85xx-Makefile.patch
platform-powerpc-dni-7448-r0.patch
platform-powerpc-quanta-lb9-r0.patch
driver-support-intel-igb-bcm50210-phy.patch
driver-igb-netberg-aurora.patch

13
packages/base/any/kernels/4.9-lts/configs/x86_64-all/x86_64-all.config
View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/x86_64 4.9.30 Kernel Configuration
# Linux/x86 4.9.30 Kernel Configuration
#
CONFIG_64BIT=y
CONFIG_X86_64=y
@@ -1477,6 +1477,7 @@ CONFIG_VIRTIO_NET=y
# Distributed Switch Architecture drivers
#
CONFIG_ETHERNET=y
CONFIG_MDIO=y
CONFIG_NET_VENDOR_3COM=y
# CONFIG_PCMCIA_3C574 is not set
# CONFIG_PCMCIA_3C589 is not set
@@ -1557,10 +1558,12 @@ CONFIG_E100=y
CONFIG_E1000=y
CONFIG_E1000E=y
CONFIG_E1000E_HWTS=y
# CONFIG_IGB is not set
# CONFIG_IGBVF is not set
# CONFIG_IXGB is not set
# CONFIG_IXGBE is not set
CONFIG_IGB=y
CONFIG_IGB_HWMON=y
CONFIG_IGBVF=y
CONFIG_IXGB=y
CONFIG_IXGBE=y
CONFIG_IXGBE_HWMON=y
# CONFIG_IXGBEVF is not set
# CONFIG_I40E is not set
# CONFIG_I40EVF is not set

263
packages/base/any/kernels/4.9-lts/patches/driver-support-intel-igb-bcm5461-phy.patch Normal file
View File

@@ -0,0 +1,263 @@
From 908a37bb6749d85a7818fb8a0f684d46c858f52e Mon Sep 17 00:00:00 2001
From: David Ahern <dsahern@gmail.com>
Date: Thu, 11 May 2017 17:53:43 -0700
Subject: [PATCH] igb: Add support for bcm5461x phy
Based on driver-support-intel-igb-bcm5461X-phy.patch from
OpenNetworkLinux, 3.16-lts patches
Signed-off-by: David Ahern <dsahern@gmail.com>
---
drivers/net/ethernet/intel/igb/e1000_82575.c | 27 ++++++++
drivers/net/ethernet/intel/igb/e1000_defines.h | 2 +
drivers/net/ethernet/intel/igb/e1000_hw.h | 2 +
drivers/net/ethernet/intel/igb/e1000_phy.c | 87 ++++++++++++++++++++++++--
drivers/net/ethernet/intel/igb/e1000_phy.h | 2 +
drivers/net/ethernet/intel/igb/igb_main.c | 8 +++
6 files changed, 124 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c
index ee443985581fe..2de38acdc187f 100644
--- a/drivers/net/ethernet/intel/igb/e1000_82575.c
+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c
@@ -339,6 +339,15 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580;
phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;
break;
+ case BCM5461S_PHY_ID:
+ phy->type = e1000_phy_bcm5461s;
+ phy->ops.check_polarity = NULL;
+ phy->ops.get_cable_length = NULL;
+ phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_82580;
+ break;
+ case BCM54616_E_PHY_ID:
+ phy->type = e1000_phy_bcm54616;
+ break;
default:
ret_val = -E1000_ERR_PHY;
goto out;
@@ -898,6 +907,16 @@ static s32 igb_get_phy_id_82575(struct e1000_hw *hw)
goto out;
}
ret_val = igb_get_phy_id(hw);
+ if (ret_val && hw->mac.type == e1000_i354) {
+ /* we do a special check for bcm5461s phy by setting
+ * the phy->addr to 5 and doing the phy check again. This
+ * call will succeed and retrieve a valid phy id if we have
+ * the bcm5461s phy
+ */
+ phy->addr = 5;
+ phy->type = e1000_phy_bcm5461s;
+ ret_val = igb_get_phy_id(hw);
+ }
goto out;
}
@@ -1285,6 +1304,9 @@ static s32 igb_get_cfg_done_82575(struct e1000_hw *hw)
(hw->phy.type == e1000_phy_igp_3))
igb_phy_init_script_igp3(hw);
+ if (hw->phy.type == e1000_phy_bcm5461s)
+ igb_phy_init_script_5461s(hw);
+
return 0;
}
@@ -1614,6 +1636,7 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)
case e1000_i350:
case e1000_i210:
case e1000_i211:
+ case e1000_i354:
phpm_reg = rd32(E1000_82580_PHY_POWER_MGMT);
phpm_reg &= ~E1000_82580_PM_GO_LINKD;
wr32(E1000_82580_PHY_POWER_MGMT, phpm_reg);
@@ -1658,6 +1681,10 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)
case e1000_phy_82580:
ret_val = igb_copper_link_setup_82580(hw);
break;
+ case e1000_phy_bcm54616:
+ break;
+ case e1000_phy_bcm5461s:
+ break;
default:
ret_val = -E1000_ERR_PHY;
break;
diff --git a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h
index 8aee314332a87..9c1471643c542 100644
--- a/drivers/net/ethernet/intel/igb/e1000_defines.h
+++ b/drivers/net/ethernet/intel/igb/e1000_defines.h
@@ -868,6 +868,8 @@
#define I210_I_PHY_ID 0x01410C00
#define M88E1543_E_PHY_ID 0x01410EA0
#define M88E1512_E_PHY_ID 0x01410DD0
+#define BCM54616_E_PHY_ID 0x3625D10
+#define BCM5461S_PHY_ID 0x002060C0
/* M88E1000 Specific Registers */
#define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */
diff --git a/drivers/net/ethernet/intel/igb/e1000_hw.h b/drivers/net/ethernet/intel/igb/e1000_hw.h
index 2fb2213cd562e..2840ad95396af 100644
--- a/drivers/net/ethernet/intel/igb/e1000_hw.h
+++ b/drivers/net/ethernet/intel/igb/e1000_hw.h
@@ -128,6 +128,8 @@ enum e1000_phy_type {
e1000_phy_ife,
e1000_phy_82580,
e1000_phy_i210,
+ e1000_phy_bcm54616,
+ e1000_phy_bcm5461s,
};
enum e1000_bus_type {
diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c
index 68812d783f33e..1a4013ca6f85e 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
@@ -146,6 +146,13 @@ s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
* Control register. The MAC will take care of interfacing with the
* PHY to retrieve the desired data.
*/
+ if (phy->type == e1000_phy_bcm5461s) {
+ mdic = rd32(E1000_MDICNFG);
+ mdic &= ~E1000_MDICNFG_PHY_MASK;
+ mdic |= (phy->addr << E1000_MDICNFG_PHY_SHIFT);
+ wr32(E1000_MDICNFG, mdic);
+ }
+
mdic = ((offset << E1000_MDIC_REG_SHIFT) |
(phy->addr << E1000_MDIC_PHY_SHIFT) |
(E1000_MDIC_OP_READ));
@@ -202,6 +209,13 @@ s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
* Control register. The MAC will take care of interfacing with the
* PHY to retrieve the desired data.
*/
+ if (phy->type == e1000_phy_bcm5461s) {
+ mdic = rd32(E1000_MDICNFG);
+ mdic &= ~E1000_MDICNFG_PHY_MASK;
+ mdic |= (phy->addr << E1000_MDICNFG_PHY_SHIFT);
+ wr32(E1000_MDICNFG, mdic);
+ }
+
mdic = (((u32)data) |
(offset << E1000_MDIC_REG_SHIFT) |
(phy->addr << E1000_MDIC_PHY_SHIFT) |
@@ -1113,10 +1127,12 @@ s32 igb_setup_copper_link(struct e1000_hw *hw)
* depending on user settings.
*/
hw_dbg("Forcing Speed and Duplex\n");
- ret_val = hw->phy.ops.force_speed_duplex(hw);
- if (ret_val) {
- hw_dbg("Error Forcing Speed and Duplex\n");
- goto out;
+ if (hw->phy.ops.force_speed_duplex) {
+ ret_val = hw->phy.ops.force_speed_duplex(hw);
+ if (ret_val) {
+ hw_dbg("Error Forcing Speed and Duplex\n");
+ goto out;
+ }
}
}
@@ -2647,3 +2663,66 @@ static s32 igb_set_master_slave_mode(struct e1000_hw *hw)
return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data);
}
+
+/**
+ * igb_phy_init_script_5461s - Inits the BCM5461S PHY
+ * @hw: pointer to the HW structure
+ *
+ * Initializes a Broadcom Gigabit PHY.
+ **/
+s32 igb_phy_init_script_5461s(struct e1000_hw *hw)
+{
+ u16 mii_reg_led = 0;
+
+ /* 1. Speed LED (Set the Link LED mode), Shadow 00010, 0x1C.bit2=1 */
+ hw->phy.ops.write_reg(hw, 0x1C, 0x0800);
+ hw->phy.ops.read_reg(hw, 0x1C, &mii_reg_led);
+ mii_reg_led |= 0x0004;
+ hw->phy.ops.write_reg(hw, 0x1C, mii_reg_led | 0x8000);
+
+ /* 2. Active LED (Set the Link LED mode), Shadow 01001, 0x1C.bit4=1, 0x10.bit5=0 */
+ hw->phy.ops.write_reg(hw, 0x1C, 0x2400);
+ hw->phy.ops.read_reg(hw, 0x1C, &mii_reg_led);
+ mii_reg_led |= 0x0010;
+ hw->phy.ops.write_reg(hw, 0x1C, mii_reg_led | 0x8000);
+ hw->phy.ops.read_reg(hw, 0x10, &mii_reg_led);
+ mii_reg_led &= 0xffdf;
+ hw->phy.ops.write_reg(hw, 0x10, mii_reg_led);
+
+ return 0;
+}
+
+/**
+ * igb_get_phy_info_5461s - Retrieve 5461s PHY information
+ * @hw: pointer to the HW structure
+ *
+ * Read PHY status to determine if link is up. If link is up, then
+ * set/determine 10base-T extended distance and polarity correction. Read
+ * PHY port status to determine MDI/MDIx and speed. Based on the speed,
+ * determine on the cable length, local and remote receiver.
+ **/
+s32 igb_get_phy_info_5461s(struct e1000_hw *hw)
+{
+ struct e1000_phy_info *phy = &hw->phy;
+ s32 ret_val;
+ bool link;
+
+ ret_val = igb_phy_has_link(hw, 1, 0, &link);
+ if (ret_val)
+ goto out;
+
+ if (!link) {
+ ret_val = -E1000_ERR_CONFIG;
+ goto out;
+ }
+
+ phy->polarity_correction = true;
+
+ phy->is_mdix = true;
+ phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+ phy->local_rx = e1000_1000t_rx_status_ok;
+ phy->remote_rx = e1000_1000t_rx_status_ok;
+
+out:
+ return ret_val;
+}
diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h
index 9b622b33bb5ac..3b28873060946 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.h
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.h
@@ -61,6 +61,8 @@ s32 igb_phy_has_link(struct e1000_hw *hw, u32 iterations,
void igb_power_up_phy_copper(struct e1000_hw *hw);
void igb_power_down_phy_copper(struct e1000_hw *hw);
s32 igb_phy_init_script_igp3(struct e1000_hw *hw);
+s32 igb_phy_init_script_5461s(struct e1000_hw *hw);
+s32 igb_get_phy_info_5461s(struct e1000_hw *hw);
s32 igb_initialize_M88E1512_phy(struct e1000_hw *hw);
s32 igb_initialize_M88E1543_phy(struct e1000_hw *hw);
s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index be456bae81690..4689079f8bbcd 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -7356,11 +7356,19 @@ static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
data->phy_id = adapter->hw.phy.addr;
break;
case SIOCGMIIREG:
+ adapter->hw.phy.addr = data->phy_id;
if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
&data->val_out))
return -EIO;
break;
case SIOCSMIIREG:
+ if (!capable(CAP_NET_ADMIN))
+ return -EPERM;
+ adapter->hw.phy.addr = data->phy_id;
+ if (igb_write_phy_reg(&adapter->hw, data->reg_num & 0x1F,
+ data->val_in))
+ return -EIO;
+ break;
default:
return -EOPNOTSUPP;
}

2
packages/base/any/kernels/4.9-lts/patches/series
View File

@@ -1 +1 @@
driver-support-intel-igb-bcm5461-phy.patch

2
packages/platforms/delta/x86-64/x86-64-delta-ag7648/.gitignore vendored Normal file
View File

@@ -0,0 +1,2 @@
*x86*64*delta*ag7648*.mk
onlpdump.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/PKG.yml Normal file
View File

@@ -0,0 +1 @@
!include $ONL_TEMPLATES/platform-modules.yml VENDOR=delta BASENAME=x86-64-delta-ag7648 ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64"

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/.gitignore vendored Normal file
View File

@@ -0,0 +1 @@
lib

6
packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/Makefile Normal file
View File

@@ -0,0 +1,6 @@
KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64
KMODULES := $(wildcard *.c)
VENDOR := delta
BASENAME := x86-64-delta-ag7648
ARCH := x86_64
include $(ONL)/make/kmodule.mk

245
packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-1.c Executable file
View File

@@ -0,0 +1,245 @@
/*
* An I2C multiplexer dirver for delta ag7648 CPLD
*
* Copyright (C) 2015 Delta Technology Corporation.
* Brandon Chuang <brandon_chuang@delta.com.tw>
*
* This module supports the delta cpld that hold the channel select
* mechanism for other i2c slave devices, such as SFP.
* This includes the:
* Delta ag7648c CPLD1/CPLD2/CPLD3
*
* Based on:
* pca954x.c from Kumar Gala <galak@kernel.crashing.org>
* Copyright (C) 2006
*
* Based on:
* pca954x.c from Ken Harrenstien
* Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
*
* Based on:
* i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
* and
* pca9540.c from Jean Delvare <khali@linux-fr.org>.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/i2c-mux.h>
#include <linux/version.h>
#define CTRL_CPLD_BUS 0x2
#define CTRL_CPLD_I2C_ADDR 0x32
#define PARENT_CHAN 0x4
#define NUM_OF_CPLD_CHANS 0x30
#define CPLD_CHANNEL_SELECT_REG 0x11
#define CPLD_CHANNEL_SELECT_MASK 0x3f
#define CPLD_CHANNEL_SELECT_OFFSET 0x0
#define CPLD_DESELECT_CHANNEL 0xff
#define CPLD_MUX_MAX_NCHANS 0x30
enum cpld_mux_type {
delta_cpld_mux
};
struct delta_i2c_cpld_mux {
enum cpld_mux_type type;
struct i2c_adapter *virt_adaps[CPLD_MUX_MAX_NCHANS];
u8 last_chan; /* last register value */
};
struct chip_desc {
u8 nchans;
u8 deselectChan;
};
/* Provide specs for the PCA954x types we know about */
static const struct chip_desc chips[] = {
[delta_cpld_mux] = {
.nchans = NUM_OF_CPLD_CHANS,
.deselectChan = CPLD_DESELECT_CHANNEL,
}
};
static struct delta_i2c_cpld_mux *cpld_mux_data;
static struct device dump_dev;
/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
for this as they will try to lock adapter a second time */
static int delta_i2c_cpld_mux_reg_write(struct i2c_adapter *adap,
struct i2c_client *client, u8 val)
{
unsigned long orig_jiffies;
unsigned short flags;
union i2c_smbus_data data;
struct i2c_adapter *ctrl_adap;
int try;
s32 res = -EIO;
u8 reg_val = 0;
data.byte = val;
flags = 0;
ctrl_adap = i2c_get_adapter(CTRL_CPLD_BUS);
if (!ctrl_adap)
return res;
// try to lock it
if (ctrl_adap->algo->smbus_xfer) {
/* Retry automatically on arbitration loss */
orig_jiffies = jiffies;
for (res = 0, try = 0; try <= ctrl_adap->retries; try++) {
// read first
res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
I2C_SMBUS_READ, CPLD_CHANNEL_SELECT_REG,
I2C_SMBUS_BYTE_DATA, &data);
if (res && res != -EAGAIN)
break;
// modify the field we wanted
data.byte &= ~(CPLD_CHANNEL_SELECT_MASK << CPLD_CHANNEL_SELECT_OFFSET);
reg_val |= (((val + 1)& CPLD_CHANNEL_SELECT_MASK) << CPLD_CHANNEL_SELECT_OFFSET);
data.byte |= reg_val;
// modify the register
res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG,
I2C_SMBUS_BYTE_DATA, &data);
if (res && res != -EAGAIN)
break;
if (time_after(jiffies,
orig_jiffies + ctrl_adap->timeout))
break;
}
}
return res;
}
static int delta_i2c_cpld_mux_select_chan(struct i2c_adapter *adap,
void *client, u32 chan)
{
u8 regval;
int ret = 0;
regval = chan;
/* Only select the channel if its different from the last channel */
if (cpld_mux_data->last_chan != regval) {
ret = delta_i2c_cpld_mux_reg_write(NULL, NULL, regval);
cpld_mux_data->last_chan = regval;
}
return ret;
}
static int delta_i2c_cpld_mux_deselect_mux(struct i2c_adapter *adap,
void *client, u32 chan)
{
/* Deselect active channel */
cpld_mux_data->last_chan = chips[cpld_mux_data->type].deselectChan;
return delta_i2c_cpld_mux_reg_write(NULL, NULL, cpld_mux_data->last_chan);
}
/*
* I2C init/probing/exit functions
*/
static int __delta_i2c_cpld_mux_init(void)
{
struct i2c_adapter *adap = i2c_get_adapter(PARENT_CHAN);
int chan=0;
int ret = -ENODEV;
memset (&dump_dev, 0, sizeof(dump_dev));
if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
goto err;
if (!adap)
goto err;
cpld_mux_data = kzalloc(sizeof(struct delta_i2c_cpld_mux), GFP_KERNEL);
if (!cpld_mux_data) {
ret = -ENOMEM;
goto err;
}
cpld_mux_data->type = delta_cpld_mux;
cpld_mux_data->last_chan = chips[cpld_mux_data->type].deselectChan; /* force the first selection */
/* Now create an adapter for each channel */
for (chan = 0; chan < NUM_OF_CPLD_CHANS; chan++) {
cpld_mux_data->virt_adaps[chan] = i2c_add_mux_adapter(adap, &dump_dev, NULL, 0,
chan,
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)
0,
#endif
delta_i2c_cpld_mux_select_chan,
delta_i2c_cpld_mux_deselect_mux);
if (cpld_mux_data->virt_adaps[chan] == NULL) {
ret = -ENODEV;
printk("failed to register multiplexed adapter %d, parent %d\n", chan, PARENT_CHAN);
goto virt_reg_failed;
}
}
printk("registered %d multiplexed busses for I2C mux bus %d\n",
chan, PARENT_CHAN);
return 0;
virt_reg_failed:
for (chan--; chan >= 0; chan--) {
i2c_del_mux_adapter(cpld_mux_data->virt_adaps[chan]);
}
kfree(cpld_mux_data);
err:
return ret;
}
static int __delta_i2c_cpld_mux_remove(void)
{
const struct chip_desc *chip = &chips[cpld_mux_data->type];
int chan;
for (chan = 0; chan < chip->nchans; ++chan) {
if (cpld_mux_data->virt_adaps[chan]) {
i2c_del_mux_adapter(cpld_mux_data->virt_adaps[chan]);
cpld_mux_data->virt_adaps[chan] = NULL;
}
}
kfree(cpld_mux_data);
return 0;
}
static int __init delta_i2c_cpld_mux_init(void)
{
return __delta_i2c_cpld_mux_init ();
}
static void __exit delta_i2c_cpld_mux_exit(void)
{
__delta_i2c_cpld_mux_remove ();
}
MODULE_AUTHOR("Dave Hu <dave.hu@deltasystems.com>");
MODULE_DESCRIPTION("Delta I2C CPLD mux driver");
MODULE_LICENSE("GPL");
module_init(delta_i2c_cpld_mux_init);
module_exit(delta_i2c_cpld_mux_exit);

317
packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-2.c Executable file
View File

@@ -0,0 +1,317 @@
/*
* An I2C multiplexer dirver for delta ag7648 CPLD
*
* Copyright (C) 2015 Delta Technology Corporation.
* Brandon Chuang <brandon_chuang@delta.com.tw>
*
* This module supports the delta cpld that hold the channel select
* mechanism for other i2c slave devices, such as SFP.
* This includes the:
* Delta ag7648c CPLD1/CPLD2/CPLD3
*
* Based on:
* pca954x.c from Kumar Gala <galak@kernel.crashing.org>
* Copyright (C) 2006
*
* Based on:
* pca954x.c from Ken Harrenstien
* Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
*
* Based on:
* i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
* and
* pca9540.c from Jean Delvare <khali@linux-fr.org>.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/i2c-mux.h>
#include <linux/version.h>
#include <linux/delay.h>
#define CTRL_CPLD_BUS 0x2
#define CTRL_CPLD_I2C_ADDR 0x32
#define PARENT_CHAN 0x5
#define NUM_OF_CPLD_CHANS 0x6
#define CPLD_CHANNEL_SELECT_REG 0xa
#define CPLD_CHANNEL_SELECT_MASK 0x3f
#define CPLD_CHANNEL_SELECT_OFFSET 0x0
#define CPLD_QSFP_INTR_STATUS_REG 0xe
#define CPLD_QSFP_INTR_STATUS_OFFSET 0x0
#define CPLD_QSFP_RESET_CTRL_REG 0xd
#define CPLD_QSFL_RESET_CTRL_OFFSET 0x0
#define CPLD_DESELECT_CHANNEL 0xff
#define CPLD_MUX_MAX_NCHANS 0x6
enum cpld_mux_type {
delta_cpld_mux
};
struct delta_i2c_cpld_mux {
enum cpld_mux_type type;
struct i2c_adapter *virt_adaps[CPLD_MUX_MAX_NCHANS];
u8 last_chan; /* last register value */
};
struct chip_desc {
u8 nchans;
u8 deselectChan;
};
/* Provide specs for the PCA954x types we know about */
static const struct chip_desc chips[] = {
[delta_cpld_mux] = {
.nchans = NUM_OF_CPLD_CHANS,
.deselectChan = CPLD_DESELECT_CHANNEL,
}
};
static struct delta_i2c_cpld_mux *cpld_mux_data;
static struct device dump_dev;
/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
for this as they will try to lock adapter a second time */
static int delta_i2c_cpld_mux_reg_write(struct i2c_adapter *adap,
struct i2c_client *client, u8 val)
{
unsigned long orig_jiffies;
unsigned short flags;
union i2c_smbus_data data;
struct i2c_adapter *ctrl_adap;
int try,change=0;
s32 res = -EIO;
u8 reg_val = 0;
int intr, reset_ctrl;
int i;
data.byte = val;
flags = 0;
ctrl_adap = i2c_get_adapter(CTRL_CPLD_BUS);
if (!ctrl_adap)
return res;
// try to lock it
if (ctrl_adap->algo->smbus_xfer) {
/* Retry automatically on arbitration loss */
orig_jiffies = jiffies;
for (res = 0, try = 0; try <= ctrl_adap->retries; try++) {
// workaround
data.byte = 0;
res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG,
I2C_SMBUS_BYTE_DATA, &data);
if (res == -EAGAIN)
continue;
//read the interrupt status
res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
I2C_SMBUS_READ, CPLD_QSFP_INTR_STATUS_REG,
I2C_SMBUS_BYTE_DATA, &data);
if ( res == -EAGAIN)
continue;
intr = data.byte;
//read the reset control
res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
I2C_SMBUS_READ, CPLD_QSFP_RESET_CTRL_REG,
I2C_SMBUS_BYTE_DATA, &data);
if ( res == -EAGAIN)
continue;
reset_ctrl = data.byte;
/* there is an interrupt for QSFP port, including failure/plugin/un-plugin
* try to reset it.
*
*/
for (i = 0 ; i < NUM_OF_CPLD_CHANS; i ++)
{
if((reset_ctrl & ( 1 << i )) == 0){
change=1;
}
if ((intr & ( 1 << i )) == 0 )
{
res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
I2C_SMBUS_READ, CPLD_QSFP_RESET_CTRL_REG,
I2C_SMBUS_BYTE_DATA, &data);
if (res == -EAGAIN)
continue;
data.byte &= ~(1 << i);
res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
I2C_SMBUS_WRITE, CPLD_QSFP_RESET_CTRL_REG,
I2C_SMBUS_BYTE_DATA, &data);
if (res == -EAGAIN)
continue;
change=1;
}
}
if(change){
msleep(10);
data.byte=CPLD_DESELECT_CHANNEL;
res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
I2C_SMBUS_WRITE, CPLD_QSFP_RESET_CTRL_REG,
I2C_SMBUS_BYTE_DATA, &data);
if (res == -EAGAIN)
continue;
msleep(200);
}
// read first
//res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
// I2C_SMBUS_READ, CPLD_CHANNEL_SELECT_REG,
// I2C_SMBUS_BYTE_DATA, &data);
//if (res && res != -EAGAIN)
// break;
// modify the field we wanted
//data.byte &= ~(CPLD_CHANNEL_SELECT_MASK << CPLD_CHANNEL_SELECT_OFFSET);
//reg_val |= (((~(1 << val)) & CPLD_CHANNEL_SELECT_MASK) << CPLD_CHANNEL_SELECT_OFFSET);
data.byte = (~(1 << val)) & 0xff;
// modify the register
res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags,
I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG,
I2C_SMBUS_BYTE_DATA, &data);
if (res != -EAGAIN)
break;
if (time_after(jiffies,
orig_jiffies + ctrl_adap->timeout))
break;
}
}
return res;
}
static int delta_i2c_cpld_mux_select_chan(struct i2c_adapter *adap,
void *client, u32 chan)
{
u8 regval;
int ret = 0;
regval = chan;
/* Only select the channel if its different from the last channel */
if (cpld_mux_data->last_chan != regval) {
ret = delta_i2c_cpld_mux_reg_write(NULL, NULL, regval);
cpld_mux_data->last_chan = regval;
}
return ret;
}
static int delta_i2c_cpld_mux_deselect_mux(struct i2c_adapter *adap,
void *client, u32 chan)
{
/* Deselect active channel */
cpld_mux_data->last_chan = chips[cpld_mux_data->type].deselectChan;
return delta_i2c_cpld_mux_reg_write(NULL, NULL, cpld_mux_data->last_chan);
}
/*
* I2C init/probing/exit functions
*/
static int __delta_i2c_cpld_mux_init(void)
{
struct i2c_adapter *adap = i2c_get_adapter(PARENT_CHAN);
int chan=0;
int ret = -ENODEV;
memset (&dump_dev, 0, sizeof(dump_dev));
if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
goto err;
if (!adap)
goto err;
cpld_mux_data = kzalloc(sizeof(struct delta_i2c_cpld_mux), GFP_KERNEL);
if (!cpld_mux_data) {
ret = -ENOMEM;
goto err;
}
cpld_mux_data->type = delta_cpld_mux;
cpld_mux_data->last_chan = chips[cpld_mux_data->type].deselectChan; /* force the first selection */
/* Now create an adapter for each channel */
for (chan = 0; chan < NUM_OF_CPLD_CHANS; chan++) {
cpld_mux_data->virt_adaps[chan] = i2c_add_mux_adapter(adap, &dump_dev, NULL, 0,
chan,
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)
0,
#endif
delta_i2c_cpld_mux_select_chan,
delta_i2c_cpld_mux_deselect_mux);
if (cpld_mux_data->virt_adaps[chan] == NULL) {
ret = -ENODEV;
printk("failed to register multiplexed adapter %d, parent %d\n", chan, PARENT_CHAN);
goto virt_reg_failed;
}
}
printk("registered %d multiplexed busses for I2C mux bus %d\n",
chan, PARENT_CHAN);
return 0;
virt_reg_failed:
for (chan--; chan >= 0; chan--) {
i2c_del_mux_adapter(cpld_mux_data->virt_adaps[chan]);
}
kfree(cpld_mux_data);
err:
return ret;
}
static int __delta_i2c_cpld_mux_remove(void)
{
const struct chip_desc *chip = &chips[cpld_mux_data->type];
int chan;
for (chan = 0; chan < chip->nchans; ++chan) {
if (cpld_mux_data->virt_adaps[chan]) {
i2c_del_mux_adapter(cpld_mux_data->virt_adaps[chan]);
cpld_mux_data->virt_adaps[chan] = NULL;
}
}
kfree(cpld_mux_data);
return 0;
}
static int __init delta_i2c_cpld_mux_init(void)
{
return __delta_i2c_cpld_mux_init ();
}
static void __exit delta_i2c_cpld_mux_exit(void)
{
__delta_i2c_cpld_mux_remove ();
}
MODULE_AUTHOR("Dave Hu <dave.hu@deltasystems.com>");
MODULE_DESCRIPTION("Delta I2C CPLD mux driver");
MODULE_LICENSE("GPL");
module_init(delta_i2c_cpld_mux_init);
module_exit(delta_i2c_cpld_mux_exit);

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/Makefile Normal file
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include $(ONL)/make/pkg.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/PKG.yml Normal file
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@@ -0,0 +1 @@
!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-delta-ag7648 ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

2
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/Makefile Normal file
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FILTER=src
include $(ONL)/make/subdirs.mk

45
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/Makefile Normal file
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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-delta-ag7648
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_delta_ag7648 onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-delta-ag7648.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

10
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/libonlp-x86-64-delta-ag7648.mk Normal file
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###############################################################################
#
# Inclusive Makefile for the libonlp-x86-64-delta-ag7648 module.
#
# Autogenerated 2017-03-20 15:05:28.120004
#
###############################################################################
libonlp-x86-64-delta-ag7648_BASEDIR := $(dir $(abspath $(lastword $(MAKEFILE_LIST))))

46
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/onlpdump/Makefile Normal file
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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_delta_ag7648 onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/.module Normal file
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name: x86_64_delta_ag7648

9
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/Makefile Normal file
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###############################################################################
#
#
#
###############################################################################
include ../../init.mk
MODULE := x86_64_delta_ag7648
AUTOMODULE := x86_64_delta_ag7648
include $(BUILDER)/definemodule.mk

6
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/README Normal file
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###############################################################################
#
# x86_64_delta_ag7648 README
#
###############################################################################

9
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/make.mk Normal file
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###############################################################################
#
# x86_64_delta_ag7648 Autogeneration
#
###############################################################################
x86_64_delta_ag7648_AUTO_DEFS := module/auto/x86_64_delta_ag7648.yml
x86_64_delta_ag7648_AUTO_DIRS := module/inc/x86_64_delta_ag7648 module/src
include $(BUILDER)/auto.mk

50
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/x86_64_delta_ag7648.yml Normal file
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###############################################################################
#
# x86_64_delta_ag7648 Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB
- X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
- X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION:
doc: "Assume chassis fan direction is the same as the PSU fan direction."
default: 0
definitions:
cdefs:
X86_64_DELTA_AG7648_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_delta_ag7648_config
portingmacro:
x86_64_delta_ag7648:
macros:
- malloc
- free
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

14
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648.x Normal file
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@@ -0,0 +1,14 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag7648/x86_64_delta_ag7648_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

137
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_config.h Normal file
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/**************************************************************************//**
*
* @file
* @brief x86_64_delta_ag7648 Configuration Header
*
* @addtogroup x86_64_delta_ag7648-config
* @{
*
*****************************************************************************/
#ifndef __X86_64_DELTA_AG7648_CONFIG_H__
#define __X86_64_DELTA_AG7648_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef X86_64_DELTA_AG7648_INCLUDE_CUSTOM_CONFIG
#include <x86_64_delta_ag7648_custom_config.h>
#endif
/* <auto.start.cdefs(X86_64_DELTA_AG7648_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING
#define X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT
#define X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT
#define X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB
#define X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB 1
#endif
/**
* X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB
#endif
/**
* X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI
#define X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI 0
#endif
/**
* X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
*
* Assume chassis fan direction is the same as the PSU fan direction. */
#ifndef X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
#define X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION 0
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_delta_ag7648_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_delta_ag7648_config_settings_t;
/** Configuration settings table. */
/** x86_64_delta_ag7648_config_settings table. */
extern x86_64_delta_ag7648_config_settings_t x86_64_delta_ag7648_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_delta_ag7648_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_delta_ag7648_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(X86_64_DELTA_AG7648_CONFIG_HEADER).header> */
#include "x86_64_delta_ag7648_porting.h"
#endif /* __X86_64_DELTA_AG7648_CONFIG_H__ */
/* @} */

26
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_dox.h Normal file
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@@ -0,0 +1,26 @@
/**************************************************************************//**
*
* x86_64_delta_ag7648 Doxygen Header
*
*****************************************************************************/
#ifndef __X86_64_DELTA_AG7648_DOX_H__
#define __X86_64_DELTA_AG7648_DOX_H__
/**
* @defgroup x86_64_delta_ag7648 x86_64_delta_ag7648 - x86_64_delta_ag7648 Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_delta_ag7648-x86_64_delta_ag7648 Public Interface
* @defgroup x86_64_delta_ag7648-config Compile Time Configuration
* @defgroup x86_64_delta_ag7648-porting Porting Macros
*
* @}
*
*/
#endif /* __X86_64_DELTA_AG7648_DOX_H__ */

107
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_porting.h Normal file
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@@ -0,0 +1,107 @@
/**************************************************************************//**
*
* @file
* @brief x86_64_delta_ag7648 Porting Macros.
*
* @addtogroup x86_64_delta_ag7648-porting
* @{
*
*****************************************************************************/
#ifndef __X86_64_DELTA_AG7648_PORTING_H__
#define __X86_64_DELTA_AG7648_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef x86_64_delta_ag7648_MALLOC
#if defined(GLOBAL_MALLOC)
#define x86_64_delta_ag7648_MALLOC GLOBAL_MALLOC
#elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag7648_MALLOC malloc
#else
#error The macro x86_64_delta_ag7648_MALLOC is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag7648_FREE
#if defined(GLOBAL_FREE)
#define x86_64_delta_ag7648_FREE GLOBAL_FREE
#elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag7648_FREE free
#else
#error The macro x86_64_delta_ag7648_FREE is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag7648_MEMSET
#if defined(GLOBAL_MEMSET)
#define x86_64_delta_ag7648_MEMSET GLOBAL_MEMSET
#elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag7648_MEMSET memset
#else
#error The macro x86_64_delta_ag7648_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag7648_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define x86_64_delta_ag7648_MEMCPY GLOBAL_MEMCPY
#elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag7648_MEMCPY memcpy
#else
#error The macro x86_64_delta_ag7648_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag7648_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define x86_64_delta_ag7648_STRNCPY GLOBAL_STRNCPY
#elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag7648_STRNCPY strncpy
#else
#error The macro x86_64_delta_ag7648_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag7648_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define x86_64_delta_ag7648_VSNPRINTF GLOBAL_VSNPRINTF
#elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag7648_VSNPRINTF vsnprintf
#else
#error The macro x86_64_delta_ag7648_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag7648_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define x86_64_delta_ag7648_SNPRINTF GLOBAL_SNPRINTF
#elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag7648_SNPRINTF snprintf
#else
#error The macro x86_64_delta_ag7648_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag7648_STRLEN
#if defined(GLOBAL_STRLEN)
#define x86_64_delta_ag7648_STRLEN GLOBAL_STRLEN
#elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag7648_STRLEN strlen
#else
#error The macro x86_64_delta_ag7648_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __X86_64_DELTA_AG7648_PORTING_H__ */
/* @} */

10
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/make.mk Normal file
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@@ -0,0 +1,10 @@
###############################################################################
#
#
#
###############################################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_delta_ag7648_INCLUDES := -I $(THIS_DIR)inc
x86_64_delta_ag7648_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_delta_ag7648_DEPENDMODULE_ENTRIES := init:x86_64_delta_ag7648 ucli:x86_64_delta_ag7648

9
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/Makefile Normal file
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@@ -0,0 +1,9 @@
###############################################################################
#
# Local source generation targets.
#
###############################################################################
ucli:
@../../../../tools/uclihandlers.py x86_64_delta_ag7648_ucli.c

44
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c Executable file
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#if X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEBUG == 1
#include <unistd.h>
static char help__[] =
"Usage: debug [options]\n"
" -c CPLD Versions\n"
" -h Help\n"
;
int
x86_64_delta_ag7648_debug_main(int argc, char* argv[])
{
int c = 0;
int help = 0;
int rv = 0;
while( (c = getopt(argc, argv, "ch")) != -1) {
switch(c)
{
case 'c': c = 1; break;
case 'h': help = 1; rv = 0; break;
default: help = 1; rv = 1; break;
}
}
if(help || argc == 1) {
printf("%s", help__);
return rv;
}
if(c) {
printf("Not implemented.\n");
}
return 0;
}
#endif

593
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/fani.c Executable file
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@@ -0,0 +1,593 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Fan Platform Implementation Defaults.
*
***********************************************************/
#include <onlp/platformi/fani.h>
#include <unistd.h>
#include <fcntl.h>
#include "platform_lib.h"
#include "x86_64_delta_ag7648_int.h"
#include "x86_64_delta_i2c.h"
#define MAX_FAN_SPEED 19000
#define MAX_PSU1_FAN_SPEED 19000
#define MAX_PSU2_FAN_SPEED 18000
#define FILE_NAME_LEN 80
#define CPLD_FAN_NAME "MASTERCPLD"
#define CPLD_FAN_TRAY0_PRESENT_REG (0x8)
#define CPLD_FAN_TRAY0_PRESENT_REG_OFFSET (0x6)
#define CPLD_FAN_TRAY1_PRESENT_REG (0x8)
#define CPLD_FAN_TRAY1_PRESENT_REG_OFFSET (0x7)
#define CPLD_FAN_TRAY2_PRESENT_REG (0x9)
#define CPLD_FAN_TRAY2_PRESENT_REG_OFFSET (0x0)
/* The MAX6620 registers, valid channel numbers: 0, 1 */
#define MAX6639_REG_STATUS 0x02
#define MAX6639_REG_FAN_CONFIG1(ch) (0x10 + 4*(ch-1))
#define MAX6639_REG_FAN_CNT(ch) (0x20 + (ch-1))
#define MAX6639_REG_TARGET_CNT(ch) (0x22 + (ch-1))
/*define the reg bit mask*/
#define MAX6639_REG_FAN_STATUS_BIT(ch) (0X02>>(ch-1))
#define MAX6639_FAN_CONFIG1_RPM_RANGE 0x03
#define MAX6639_FAN_PRESENT_REG (0x0c)
#define MAX6639_FAN_PRESENT_BIT (0x2)
#define MAX6639_FAN_GOOD_BIT (0x1)
#define FAN_FROM_REG(d1, d2) \
{ \
int tech = (d1 << 3) | ((d2 >> 5) & 0x07);\
rpm = (491520 * 4) / (2 * tech);\
}
#define FAN_TO_REG(rpm) \
{ \
float ftech; \
uint32_t tech; \
ftech = (491520.0 * 4)/ (2.0 * rpm); \
ftech = ftech + 0.3; \
tech = (uint32_t) ftech; \
d1 = (uint8_t)(tech >> 3); \
d2 = (uint8_t)((tech << 5) & 0xe0);\
}
static int fan_initd=0;
enum onlp_fan_id
{
FAN_RESERVED = 0,
FAN_1_ON_MAIN_BOARD, /*fan tray 0*/
FAN_2_ON_MAIN_BOARD, /*fan tray 0*/
FAN_3_ON_MAIN_BOARD, /*fan tray 1*/
FAN_4_ON_MAIN_BOARD, /*fan tray 1*/
FAN_5_ON_MAIN_BOARD, /*fan tray 2*/
FAN_6_ON_MAIN_BOARD, /*fan tray 2*/
FAN_1_ON_PSU1,
FAN_1_ON_PSU2
};
enum onlp_fan_tray_id
{
FAN_TRAY_0 = 0,
FAN_TRAY_1 = 1,
FAN_TRAY_2 = 2
};
#define MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(id) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##id##_ON_MAIN_BOARD), "Chassis Fan "#id, 0 }, \
ONLP_FAN_STATUS_B2F | ONLP_FAN_STATUS_PRESENT, \
(ONLP_FAN_CAPS_SET_PERCENTAGE |ONLP_FAN_CAPS_SET_RPM| ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE), \
0, \
0, \
ONLP_FAN_MODE_INVALID, \
}
#define MAKE_FAN_INFO_NODE_ON_PSU(psu_id, fan_id) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##fan_id##_ON_PSU##psu_id), "Chassis PSU-"#psu_id " Fan "#fan_id, 0 }, \
ONLP_FAN_STATUS_B2F | ONLP_FAN_STATUS_PRESENT, \
(ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE), \
0, \
0, \
ONLP_FAN_MODE_INVALID, \
}
/* Static fan information */
onlp_fan_info_t linfo[] = {
{ }, /* Not used */
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(1),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(2),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(3),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(4),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(5),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(6),
MAKE_FAN_INFO_NODE_ON_PSU(1,1),
MAKE_FAN_INFO_NODE_ON_PSU(2,1),
};
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_FAN(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static int
_onlp_get_fan_tray(int fanId)
{
int tray_id;
if((fanId==5) || (fanId==6))
tray_id=0;
else if((fanId==3) || (fanId==4))
tray_id=1;
else
tray_id=2;
return tray_id;
}
#if 0
static int
_onlp_psu_fan_val_to_rpm (int v)
{
int lf = (v & 0xffff);
int y, n;
y = lf & 0x7ff;
n = ((lf >> 11) & 0x1f);
return (y * (1 << n));
}
#endif
static int
_onlp_fan_board_init(void)
{
int i = 0;
int d1,d2;
int rpm = 8000;
i2c_devname_write_byte("FANCTRL1", 0x00,0x10);
i2c_devname_write_byte("FANCTRL2", 0x00,0x10);
i2c_devname_write_byte("FANCTRL1", 0x01,0x00);
i2c_devname_write_byte("FANCTRL2", 0x01,0x00);
for (i = FAN_1_ON_MAIN_BOARD; i <= FAN_4_ON_MAIN_BOARD; i ++)
{
int offset = i - FAN_1_ON_MAIN_BOARD;
i2c_devname_write_byte("FANCTRL2", 0x02 + offset ,0xc0);
FAN_TO_REG(rpm);
i2c_devname_write_byte("FANCTRL2", 0x20 + 2 * offset, d1);
i2c_devname_write_byte("FANCTRL2", 0x21 + 2 * offset, d2);
}
for (i = FAN_5_ON_MAIN_BOARD; i <= FAN_6_ON_MAIN_BOARD; i ++)
{
int offset = i - FAN_5_ON_MAIN_BOARD;
i2c_devname_write_byte("FANCTRL1", 0x02 + offset ,0xc0);
FAN_TO_REG(rpm);
i2c_devname_write_byte("FANCTRL1", 0x20 + 2 * offset, d1);
i2c_devname_write_byte("FANCTRL1", 0x21 + 2 * offset, d2);
}
fan_initd=1;
return ONLP_STATUS_OK;
}
static int
_onlp_fani_info_get_fan(int local_id, onlp_fan_info_t* info)
{
int r_data, fan_present;
int fan_tray = 0;
int reg, offset;
int d1, d2;
int rpm;
/* init the fan on the board*/
if(fan_initd==0)
_onlp_fan_board_init();
fan_tray = _onlp_get_fan_tray(local_id);
if (fan_tray == 0)
{
reg = CPLD_FAN_TRAY0_PRESENT_REG;
offset = CPLD_FAN_TRAY0_PRESENT_REG_OFFSET;
}else if (fan_tray == 1)
{
reg = CPLD_FAN_TRAY1_PRESENT_REG;
offset = CPLD_FAN_TRAY1_PRESENT_REG_OFFSET;
}else if (fan_tray == 2)
{
reg = CPLD_FAN_TRAY2_PRESENT_REG;
offset = CPLD_FAN_TRAY2_PRESENT_REG_OFFSET;
}else
{
return ONLP_STATUS_E_INVALID;
}
/* get fan fault status (turn on when any one fails)*/
r_data = i2c_devname_read_byte(CPLD_FAN_NAME, reg);
if(r_data<0)
return ONLP_STATUS_E_INVALID;
fan_present = (r_data >> offset ) & 0x1;
if(!fan_present){
info->status |= ONLP_FAN_STATUS_PRESENT;
if (fan_tray == 0)
{
d1 = i2c_devname_read_byte("FANCTRL1", 0x10 + 2 * (local_id - FAN_5_ON_MAIN_BOARD));
d2 = i2c_devname_read_byte("FANCTRL1", 0x11 + 2 * (local_id - FAN_5_ON_MAIN_BOARD));
}else
{
d1 = i2c_devname_read_byte("FANCTRL2", 0x10 + 2 * (local_id - FAN_1_ON_MAIN_BOARD) );
d2 = i2c_devname_read_byte("FANCTRL2", 0x11 + 2 * (local_id - FAN_1_ON_MAIN_BOARD) );
}
if (d1 < 0 || d2 < 0)
{
info->status |= ONLP_FAN_STATUS_FAILED;
return ONLP_STATUS_E_INVALID;
}
}
else{
info->status &= ~ONLP_FAN_STATUS_PRESENT;
return ONLP_STATUS_E_UNSUPPORTED;
}
DEBUG_PRINT("d1 %d, d2 %d\r\n", d1, d2);
FAN_FROM_REG(d1,d2);
info->rpm = rpm;
DEBUG_PRINT("rpm %d\r\n", rpm);
/* get speed percentage from rpm */
info->percentage = (info->rpm * 100.0) / MAX_FAN_SPEED;
if(info->percentage>100)
strcpy(info->model,"ONLP_FAN_MODE_LAST");
else if(info->percentage==100)
strcpy(info->model,"ONLP_FAN_MODE_MAX");
else if(info->percentage>=75&&info->percentage<100)
strcpy(info->model,"ONLP_FAN_MODE_FAST");
else if(info->percentage>=35&&info->percentage<75)
strcpy(info->model,"ONLP_FAN_MODE_NORMAL");
else if(info->percentage>0&&info->percentage<35)
strcpy(info->model,"ONLP_FAN_MODE_SLOW");
else if(info->percentage<=0)
strcpy(info->model,"ONLP_FAN_MODE_OFF");
else{ }
return ONLP_STATUS_OK;
}
static int
_onlp_fani_info_get_fan_on_psu(int local_id, onlp_fan_info_t* info)
{
#if 0
int psu_id;
int r_data,fan_rpm;
psu_type_t psu_type;
/* get fan fault status
*/
psu_id = (local_id - FAN_1_ON_PSU1) + 1;
DEBUG_PRINT("[Debug][%s][%d][psu_id: %d]\n", __FUNCTION__, __LINE__, psu_id);
psu_type = get_psu_type(psu_id); /* psu_id = 1 , present PSU1. pus_id =2 , present PSU2 */
DEBUG_PRINT("[Debug][%s][%d][psu_type: %d]\n", __FUNCTION__, __LINE__, psu_type);
switch (psu_type) {
case PSU_TYPE_AC_F2B:
info->status |= (ONLP_FAN_STATUS_PRESENT | ONLP_FAN_STATUS_F2B);
break;
case PSU_TYPE_AC_B2F:
info->status |= (ONLP_FAN_STATUS_PRESENT | ONLP_FAN_STATUS_B2F);
break;
default:
return ONLP_STATUS_E_UNSUPPORTED;
}
/* get fan speed*/
if(pid == PID_AG7648){
if(psu_id==1)
r_data=i2c_devname_read_word("PSU1_PMBUS", 0x90);
else
r_data=i2c_devname_read_word("PSU2_PMBUS", 0x90);
}
else{
if(psu_id==1)
r_data=i2c_devname_read_word("PSU1_PMBUS_POE", 0x90);
else
r_data=i2c_devname_read_word("PSU2_PMBUS_POE", 0x90);
}
if(r_data<0)
return ONLP_STATUS_E_INVALID;
fan_rpm=_onlp_psu_fan_val_to_rpm(r_data);
info->rpm = fan_rpm;
/* get speed percentage from rpm */
info->percentage = (info->rpm * 100.0) / MAX_PSU_FAN_SPEED;
if(info->percentage>100)
strcpy(info->model,"ONLP_FAN_MODE_LAST");
else if(info->percentage==100)
strcpy(info->model,"ONLP_FAN_MODE_MAX");
else if(info->percentage>=75&&info->percentage<100)
strcpy(info->model,"ONLP_FAN_MODE_FAST");
else if(info->percentage>=35&&info->percentage<75)
strcpy(info->model,"ONLP_FAN_MODE_NORMAL");
else if(info->percentage>0&&info->percentage<35)
strcpy(info->model,"ONLP_FAN_MODE_SLOW");
else if(info->percentage<=0)
strcpy(info->model,"ONLP_FAN_MODE_OFF");
else{}
#endif
return ONLP_STATUS_OK;
}
/*
* This function will be called prior to all of onlp_fani_* functions.
*/
int
onlp_fani_init(void)
{
int rc;
rc=_onlp_fan_board_init();
return rc;
}
int
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
{
int rc = 0;
int local_id;
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
if (chassis_fan_count() == 0) {
local_id += 1;
}
*info = linfo[local_id];
switch (local_id)
{
case FAN_1_ON_PSU1:
case FAN_1_ON_PSU2:
rc = _onlp_fani_info_get_fan_on_psu(local_id, info);
break;
case FAN_1_ON_MAIN_BOARD:
case FAN_2_ON_MAIN_BOARD:
case FAN_3_ON_MAIN_BOARD:
case FAN_4_ON_MAIN_BOARD:
case FAN_5_ON_MAIN_BOARD:
case FAN_6_ON_MAIN_BOARD:
rc =_onlp_fani_info_get_fan(local_id, info);
break;
default:
rc = ONLP_STATUS_E_INVALID;
break;
}
return rc;
}
/*
* This function sets the speed of the given fan in RPM.
*
* This function will only be called if the fan supprots the RPM_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_rpm_set(onlp_oid_t id, int rpm)
{ /*
the rpm is the actual rpm/1000. so 16 represents the 16000(max spd)
*/
int rc1, rc2;
int local_id;
int d1, d2;
int fan_tray;
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
DEBUG_PRINT("local id %d, rpm %d\n", local_id, rpm);
if((local_id==FAN_1_ON_PSU1)||(local_id==FAN_1_ON_PSU2))
return ONLP_STATUS_E_UNSUPPORTED;
if (chassis_fan_count() == 0) {
return ONLP_STATUS_E_INVALID;
}
/* init the fan on the board*/
if(fan_initd==0)
_onlp_fan_board_init();
/* reject rpm=0 (rpm=0, stop fan) */
if (rpm == 0)
return ONLP_STATUS_E_INVALID;
/*get ret value for the speed set*/
FAN_TO_REG(rpm);
DEBUG_PRINT("local id %d, rpm %d(d1: %d, d2: %d)\n", local_id, rpm, d1, d2);
//return ONLP_STATUS_OK;
/*set the rpm speed */
fan_tray = _onlp_get_fan_tray(local_id);
if (fan_tray < 0 || fan_tray > 2)
return ONLP_STATUS_E_INVALID;
if (fan_tray == 0)
{
rc1 = i2c_devname_write_byte("FANCTRL1", 0x20 + 2 * (local_id - FAN_5_ON_MAIN_BOARD), d1);
rc2 = i2c_devname_write_byte("FANCTRL1", 0x21 + 2 * (local_id - FAN_5_ON_MAIN_BOARD), d2);
}else
{
rc1 = i2c_devname_write_byte("FANCTRL2", 0x20 + 2 * (local_id - FAN_1_ON_MAIN_BOARD), d1);
rc2 = i2c_devname_write_byte("FANCTRL2", 0x21 + 2 * (local_id - FAN_1_ON_MAIN_BOARD), d2);
}
if (rc1 < 0 || rc2 < 0)
{
return ONLP_STATUS_E_INVALID;
}
return ONLP_STATUS_OK;
}
/*set the percentage for the psu fan*/
/*
* This function sets the fan speed of the given OID as a percentage.
*
* This will only be called if the OID has the PERCENTAGE_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_percentage_set(onlp_oid_t id, int p)
{
/*
p is between 0 and 100 ,p=100 represents 16000(max spd)
*/
int rpm_val;
int local_id;
int d1, d2;
int rc1, rc2;
int fan_tray;
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
DEBUG_PRINT("local_id %d, percentage %d", local_id, p);
if((local_id==FAN_1_ON_PSU1)||(local_id==FAN_1_ON_PSU2))
return ONLP_STATUS_E_UNSUPPORTED;
if (chassis_fan_count() == 0) {
return ONLP_STATUS_E_INVALID;
}
/* init the fan on the board*/
if(fan_initd==0)
_onlp_fan_board_init();
/* reject p=0 (p=0, stop fan) */
if (p == 0){
return ONLP_STATUS_E_INVALID;
}
rpm_val=p* MAX_FAN_SPEED/100;
/*get ret value for the speed set*/
FAN_TO_REG(rpm_val);
DEBUG_PRINT("local_id %d, p %d, rpm_val %d(d1:%d, d2:%d)", local_id, p, rpm_val, d1, d2);
//return ONLP_STATUS_OK;
/*set the rpm speed */
fan_tray = _onlp_get_fan_tray(local_id);
if (fan_tray < 0 || fan_tray > 2)
return ONLP_STATUS_E_INVALID;
if (fan_tray == 0)
{
rc1 = i2c_devname_write_byte("FANCTRL1", 0x20 + 2 * (local_id - FAN_5_ON_MAIN_BOARD), d1);
rc2 = i2c_devname_write_byte("FANCTRL1", 0x21 + 2 * (local_id - FAN_5_ON_MAIN_BOARD), d2);
}else
{
rc1 = i2c_devname_write_byte("FANCTRL2", 0x20 + 2 * (local_id - FAN_1_ON_MAIN_BOARD) , d1);
rc2 = i2c_devname_write_byte("FANCTRL2", 0x21 + 2 * (local_id - FAN_1_ON_MAIN_BOARD) , d2);
}
if (rc1 < 0 || rc2 < 0)
{
return ONLP_STATUS_E_INVALID;
}
return ONLP_STATUS_OK;
}
/*
* This function sets the fan speed of the given OID as per
* the predefined ONLP fan speed modes: off, slow, normal, fast, max.
*
* Interpretation of these modes is up to the platform.
*
*/
int
onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan direction of the given OID.
*
* This function is only relevant if the fan OID supports both direction
* capabilities.
*
* This function is optional unless the functionality is available.
*/
int
onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Generic fan ioctl. Optional.
*/
int
onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

443
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/ledi.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/ledi.h>
#include <sys/mman.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include <onlplib/mmap.h>
#include "platform_lib.h"
#include "x86_64_delta_ag7648_int.h"
#include "x86_64_delta_i2c.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_LED(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
#define CPLD_NAME1 "SYSCPLD"
#define CPLD_NAME2 "MASTERCPLD"
#define CPLD_NAME3 "SLAVECPLD"
#define CPLD_LED_REG_BITS (0X3) //the reg bits
#define CPLD_LED_FAN_TRAY_REG (0X8)
#define CPLD_LED_FAN_TRAY0_REG_OFFSET (0X0)
#define CPLD_LED_FAN_TRAY1_REG_OFFSET (0X2)
#define CPLD_LED_FAN_TRAY2_REG_OFFSET (0X4)
#define CPLD_LED_POWER_REG (0X6)
#define CPLD_LED_POWER_REG_OFFSET (0X6)
#define CPLD_LED_SYS_REG (0X7)
#define CPLD_LED_SYS_REG_OFFSET (0X5)
#define CPLD_LED_LOCATOR_REG_OFFSET (0X3)
#define CPLD_LED_FAN_REG (0X9)
#define CPLD_LED_FAN_REG_OFFSET (0X3)
/*
* Get the information for the given LED OID.
*/
static onlp_led_info_t linfo[] =
{
{ }, /* Not used */
{
{ ONLP_LED_ID_CREATE(LED_SYS), "sys", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_GREEN_BLINKING |ONLP_LED_CAPS_GREEN |
ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_YELLOW ,
},
{
{ ONLP_LED_ID_CREATE(LED_FAN), "fan", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW_BLINKING |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_YELLOW,
},
{
{ ONLP_LED_ID_CREATE(LED_LOCATOR), "locator", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN |
ONLP_LED_CAPS_GREEN_BLINKING ,
},
{
{ ONLP_LED_ID_CREATE(LED_POWER), "power", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN |
ONLP_LED_CAPS_YELLOW_BLINKING,
},
{
{ ONLP_LED_ID_CREATE(LED_FAN_TRAY0), "fan_tray0", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN |
ONLP_LED_CAPS_YELLOW,
},
{
{ ONLP_LED_ID_CREATE(LED_FAN_TRAY1), "fan_tray1", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN |
ONLP_LED_CAPS_YELLOW,
},
{
{ ONLP_LED_ID_CREATE(LED_FAN_TRAY2), "fan_tray2", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN |
ONLP_LED_CAPS_YELLOW,
},
};
static int conver_led_light_mode_to_onl(uint32_t id, int led_ligth_mode)
{
switch (id) {
case LED_SYS:
switch (led_ligth_mode) {
case SYS_LED_MODE_GREEN_BLINKING: return ONLP_LED_MODE_GREEN_BLINKING;
case SYS_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN;
case SYS_LED_MODE_YELLOW: return ONLP_LED_MODE_YELLOW;
case SYS_LED_MODE_YELLOW_BLINKING: return ONLP_LED_MODE_YELLOW_BLINKING;
default: return ONLP_LED_MODE_GREEN_BLINKING;
}
case LED_FAN:
switch (led_ligth_mode) {
case FAN_LED_MODE_OFF: return ONLP_LED_MODE_OFF;
case FAN_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN;
case FAN_LED_MODE_YELLOW: return ONLP_LED_MODE_YELLOW;
case FAN_LED_MODE_YELLOW_BLINKING: return ONLP_LED_MODE_YELLOW_BLINKING;
default: return ONLP_LED_MODE_OFF;
}
case LED_LOCATOR:
switch (led_ligth_mode) {
case LOCATOR_LED_MODE_OFF: return ONLP_LED_MODE_OFF;
case LOCATOR_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN;
case LOCATOR_LED_MODE_GREEN_BLINKING: return ONLP_LED_MODE_GREEN_BLINKING;
default: return ONLP_LED_MODE_OFF;
}
case LED_POWER:
switch (led_ligth_mode) {
case POWER_LED_MODE_OFF: return ONLP_LED_MODE_OFF;
case POWER_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN;
case POWER_LED_MODE_YELLOW_BLINKING: return ONLP_LED_MODE_YELLOW_BLINKING;
default: return ONLP_LED_MODE_OFF;
}
case LED_FAN_TRAY0:
case LED_FAN_TRAY1:
case LED_FAN_TRAY2:
switch (led_ligth_mode) {
case FAN_TRAY_LED_MODE_OFF: return ONLP_LED_MODE_OFF;
case FAN_TRAY_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN;
case FAN_TRAY_LED_MODE_YELLOW: return ONLP_LED_MODE_YELLOW_BLINKING;
default: return ONLP_LED_MODE_OFF;
}
}
return ONLP_LED_MODE_OFF;
}
static int conver_onlp_led_light_mode_to_driver(uint32_t id, int led_ligth_mode)
{
switch (id) {
case LED_SYS:
switch (led_ligth_mode) {
case ONLP_LED_MODE_GREEN_BLINKING: return SYS_LED_MODE_GREEN_BLINKING;
case ONLP_LED_MODE_GREEN: return SYS_LED_MODE_GREEN;
case ONLP_LED_MODE_YELLOW: return SYS_LED_MODE_YELLOW ;
case ONLP_LED_MODE_YELLOW_BLINKING: return SYS_LED_MODE_YELLOW_BLINKING;
default: return SYS_LED_MODE_UNKNOWN;
}
case LED_FAN:
switch (led_ligth_mode) {
case ONLP_LED_MODE_OFF: return FAN_LED_MODE_OFF;
case ONLP_LED_MODE_GREEN: return FAN_LED_MODE_GREEN ;
case ONLP_LED_MODE_YELLOW: return FAN_LED_MODE_YELLOW;
case ONLP_LED_MODE_YELLOW_BLINKING: return FAN_LED_MODE_YELLOW_BLINKING;
default: return FAN_LED_MODE_UNKNOWN;
}
case LED_LOCATOR:
switch (led_ligth_mode) {
case ONLP_LED_MODE_OFF: return LOCATOR_LED_MODE_OFF;
case ONLP_LED_MODE_GREEN: return LOCATOR_LED_MODE_GREEN;
case ONLP_LED_MODE_GREEN_BLINKING: return LOCATOR_LED_MODE_GREEN_BLINKING;
default: return LOCATOR_LED_MODE_UNKNOWN;
}
case LED_POWER:
switch (led_ligth_mode) {
case ONLP_LED_MODE_OFF: return POWER_LED_MODE_OFF;
case ONLP_LED_MODE_GREEN: return POWER_LED_MODE_GREEN;
case ONLP_LED_MODE_YELLOW_BLINKING: return POWER_LED_MODE_YELLOW_BLINKING;
default: return POWER_LED_MODE_UNKNOWN;
}
case LED_FAN_TRAY0:
case LED_FAN_TRAY1:
case LED_FAN_TRAY2:
switch (led_ligth_mode) {
case ONLP_LED_MODE_OFF: return FAN_TRAY_LED_MODE_OFF;
case ONLP_LED_MODE_GREEN: return FAN_TRAY_LED_MODE_GREEN;
case ONLP_LED_MODE_YELLOW_BLINKING: return FAN_TRAY_LED_MODE_YELLOW;
default: return FAN_TRAY_LED_MODE_UNKNOWN;
}
}
return ONLP_LED_MODE_OFF;
}
/*
* This function will be called prior to any other onlp_ledi_* functions.
*/
int
onlp_ledi_init(void)
{
return ONLP_STATUS_OK;
}
static int
onlp_ledi_oid_to_internal_id(onlp_oid_t id)
{
enum ag7648_product_id pid = get_product_id();
int lid = ONLP_OID_ID_GET(id);
if (pid != PID_AG7648) {
return lid;
}
switch (lid) {
case 1: return LED_SYS;
case 2: return LED_FAN;
case 3: return LED_LOCATOR;
case 4: return LED_POWER;
case 5: return LED_FAN_TRAY0;
case 6: return LED_FAN_TRAY1;
case 7: return LED_FAN_TRAY2;
}
return lid;
}
int
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
{
int r_data,m_data;
int lid = onlp_ledi_oid_to_internal_id(id);
VALIDATE(id);
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[lid];
DEBUG_PRINT("id %u lid %d\n", id, lid);
switch (lid)
{
case LED_POWER:
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_POWER_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
m_data = (r_data >> CPLD_LED_POWER_REG_OFFSET) & CPLD_LED_REG_BITS;
break;
case LED_SYS:
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_SYS_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
m_data = (r_data >> CPLD_LED_SYS_REG_OFFSET) & CPLD_LED_REG_BITS;
break;
case LED_LOCATOR:
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_SYS_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
m_data = (r_data >> CPLD_LED_LOCATOR_REG_OFFSET) & CPLD_LED_REG_BITS;
break;
case LED_FAN:
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
m_data = (r_data >> CPLD_LED_FAN_REG_OFFSET) & CPLD_LED_REG_BITS;
break;
case LED_FAN_TRAY0:
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
m_data = (r_data >> CPLD_LED_FAN_TRAY0_REG_OFFSET) & CPLD_LED_REG_BITS;
break;
case LED_FAN_TRAY1:
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
m_data = (r_data >> CPLD_LED_FAN_TRAY1_REG_OFFSET) & CPLD_LED_REG_BITS;
break;
case LED_FAN_TRAY2:
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
m_data = (r_data >> CPLD_LED_FAN_TRAY2_REG_OFFSET) & CPLD_LED_REG_BITS;
break;
default:
return ONLP_STATUS_E_INTERNAL;
}
info->mode = conver_led_light_mode_to_onl(lid, m_data);
/* Set the on/off status */
if (info->mode != ONLP_LED_MODE_OFF) {
info->status |= ONLP_LED_STATUS_ON;
}
return ONLP_STATUS_OK;
}
/*
* This function puts the LED into the given mode. It is a more functional
* interface for multimode LEDs.
*
* Only modes reported in the LED's capabilities will be attempted.
*/
int
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
{
int r_data,driver_mode, rc;
int reg;
int lid = onlp_ledi_oid_to_internal_id(id);
VALIDATE(id);
driver_mode = conver_onlp_led_light_mode_to_driver(lid, mode);
if((driver_mode==SYS_LED_MODE_UNKNOWN)||(driver_mode==FAN_LED_MODE_UNKNOWN)||\
(driver_mode==POWER_LED_MODE_UNKNOWN)||(driver_mode==LOCATOR_LED_MODE_UNKNOWN))
return ONLP_STATUS_E_UNSUPPORTED;
switch (lid)
{
case LED_POWER:
reg = CPLD_LED_POWER_REG;
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_POWER_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_POWER_REG_OFFSET);
r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_POWER_REG_OFFSET;
break;
case LED_SYS:
reg = CPLD_LED_SYS_REG;
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_SYS_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_SYS_REG_OFFSET);
r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_SYS_REG_OFFSET;
break;
case LED_LOCATOR:
reg = CPLD_LED_SYS_REG;
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_SYS_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_LOCATOR_REG_OFFSET);
r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_LOCATOR_REG_OFFSET;
break;
case LED_FAN:
reg = CPLD_LED_FAN_REG;
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_FAN_REG_OFFSET);
r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_FAN_REG_OFFSET;
break;
case LED_FAN_TRAY0:
reg = CPLD_LED_FAN_TRAY_REG;
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_FAN_TRAY0_REG_OFFSET);
r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_FAN_TRAY0_REG_OFFSET;
break;
case LED_FAN_TRAY1:
reg = CPLD_LED_FAN_TRAY_REG;
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_FAN_TRAY1_REG_OFFSET);
r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_FAN_TRAY1_REG_OFFSET;
break;
case LED_FAN_TRAY2:
reg = CPLD_LED_FAN_TRAY_REG;
r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG);
if (r_data < 0)
return ONLP_STATUS_E_INTERNAL;
r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_FAN_TRAY2_REG_OFFSET);
r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_FAN_TRAY2_REG_OFFSET;
break;
default:
return ONLP_STATUS_E_INTERNAL;
}
rc=i2c_devname_write_byte(CPLD_NAME2, reg, r_data);
if(rc<0){
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
/*
* Turn an LED on or off.
*
* This function will only be called if the LED OID supports the ONOFF
* capability.
*
* What 'on' means in terms of colors or modes for multimode LEDs is
* up to the platform to decide. This is intended as baseline toggle mechanism.
*/
int
onlp_ledi_set(onlp_oid_t id, int on_or_off)
{
if (!on_or_off) {
return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF);
}
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Generic LED ioctl interface.
*/
int
onlp_ledi_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

9
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/make.mk Normal file
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###############################################################################
#
#
#
###############################################################################
LIBRARY := x86_64_delta_ag7648
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
include $(BUILDER)/lib.mk

98
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2015 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <sys/mman.h>
#include <errno.h>
#include <string.h>
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <AIM/aim.h>
#include "platform_lib.h"
#define I2C_PSU_MODEL_NAME_LEN 13
psu_type_t get_psu_type(int id, char* modelname, int modelname_len)
{
DEBUG_PRINT("id %d, modelname %s, length %d\r\n", id, modelname, modelname_len);
#if 0
char *node = NULL;
char model_name[I2C_PSU_MODEL_NAME_LEN + 1] = {0};
/* Check AC model name */
node = (id == PSU1_ID) ? PSU1_AC_HWMON_NODE(psu_model_name) : PSU2_AC_HWMON_NODE(psu_model_name);
if (deviceNodeReadString(node, model_name, sizeof(model_name), 0) == 0) {
if (strncmp(model_name, "CPR-4011-4M11", strlen("CPR-4011-4M11")) == 0) {
if (modelname) {
strncpy(modelname, model_name, modelname_len-1);
}
return PSU_TYPE_AC_F2B;
}
else if (strncmp(model_name, "CPR-4011-4M21", strlen("CPR-4011-4M21")) == 0) {
if (modelname) {
strncpy(modelname, model_name, modelname_len-1);
}
return PSU_TYPE_AC_B2F;
}
}
/* Check DC model name */
memset(model_name, 0, sizeof(model_name));
node = (id == PSU1_ID) ? PSU1_DC_HWMON_NODE(psu_model_name) : PSU2_DC_HWMON_NODE(psu_model_name);
if (deviceNodeReadString(node, model_name, sizeof(model_name), 0) == 0) {
if (strncmp(model_name, "um400d01G", strlen("um400d01G")) == 0) {
if (modelname) {
strncpy(modelname, model_name, modelname_len-1);
}
return PSU_TYPE_DC_48V_B2F;
}
else if (strncmp(model_name, "um400d01-01G", strlen("um400d01-01G")) == 0) {
if (modelname) {
strncpy(modelname, model_name, modelname_len-1);
}
return PSU_TYPE_DC_48V_F2B;
}
}
#endif
return PSU_TYPE_UNKNOWN;
}
enum ag7648_product_id get_product_id(void)
{
return PID_AG7648;
}
int chassis_fan_count(void)
{
return 6 ;
}
int chassis_led_count(void)
{
return 7;
}

148
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.h Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2015 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#ifndef __PLATFORM_LIB_H__
#define __PLATFORM_LIB_H__
#include "x86_64_delta_ag7648_log.h"
#define PSU1_ID 1
#define PSU2_ID 2
#define CHASSIS_FAN_COUNT 6
#define CHASSIS_THERMAL_COUNT 4
#define CHASSIS_PSU_COUNT 2
typedef enum psu_type {
PSU_TYPE_UNKNOWN,
PSU_TYPE_AC_F2B,
PSU_TYPE_AC_B2F,
PSU_TYPE_DC_48V_F2B,
PSU_TYPE_DC_48V_B2F
} psu_type_t;
psu_type_t get_psu_type(int id, char* modelname, int modelname_len);
#define DEBUG_MODE 0
#if (DEBUG_MODE == 1)
#define DEBUG_PRINT(format, ...) \
{\
printf("[%s:%d] ", __FUNCTION__, __LINE__);\
printf(format, __VA_ARGS__); \
}
#else
#define DEBUG_PRINT(format, ...)
#endif
enum onlp_fan_duty_cycle_percentage
{
FAN_IDLE_RPM = 7500,
FAN_LEVEL1_RPM = 10000,
FAN_LEVEL2_RPM = 13000,
FAN_LEVEL3_RPM = 16000,
FAN_LEVEL4_RPM = 19000,
};
enum ag7648_product_id {
PID_AG7648= 2,
PID_UNKNOWN
};
/* LED related data */
enum sys_led_light_mode {
SYS_LED_MODE_GREEN_BLINKING = 0,
SYS_LED_MODE_GREEN,
SYS_LED_MODE_YELLOW,
SYS_LED_MODE_YELLOW_BLINKING,
SYS_LED_MODE_UNKNOWN
};
enum fan_led_light_mode {
FAN_LED_MODE_OFF = 0,
FAN_LED_MODE_YELLOW,
FAN_LED_MODE_GREEN,
FAN_LED_MODE_YELLOW_BLINKING,
FAN_LED_MODE_UNKNOWN
};
enum psu_led_light_mode {
PSU_LED_MODE_OFF = 0,
PSU_LED_MODE_GREEN,
PSU_LED_MODE_YELLOW,
PSU_LED_MODE_YELLOW_BLINKING,
PSU_LED_MODE_RESERVERD,
PSU_LED_MODE_UNKNOWN
};
enum locator_led_light_mode {
LOCATOR_LED_MODE_OFF = 0,
LOCATOR_LED_MODE_GREEN_BLINKING,
LOCATOR_LED_MODE_GREEN,
LOCATOR_LED_MODE_RESERVERD,
LOCATOR_LED_MODE_UNKNOWN
};
enum power_led_light_mode {
POWER_LED_MODE_OFF = 0,
POWER_LED_MODE_YELLOW,
POWER_LED_MODE_GREEN,
POWER_LED_MODE_YELLOW_BLINKING,
POWER_LED_MODE_UNKNOWN
};
enum fan_tray_led_light_mode {
FAN_TRAY_LED_MODE_OFF = 0,
FAN_TRAY_LED_MODE_GREEN,
FAN_TRAY_LED_MODE_YELLOW,
FAN_TRAY_LED_MODE_RESERVERD,
FAN_TRAY_LED_MODE_UNKNOWN
};
typedef enum onlp_led_id
{
LED_RESERVED = 0,
LED_SYS,
LED_FAN,
LED_LOCATOR,
LED_POWER,
LED_FAN_TRAY0,
LED_FAN_TRAY1,
LED_FAN_TRAY2,
} onlp_led_id_t;
enum ag7648_product_id get_product_id(void);
int chassis_fan_count(void);
int chassis_led_count(void);
typedef enum platform_id_e {
PLATFORM_ID_UNKNOWN,
PLATFORM_ID_DELTA_AG7648_R0,
} platform_id_t;
extern platform_id_t platform_id;
#endif /* __PLATFORM_LIB_H__ */

357
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/psui.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/psui.h>
#include <onlplib/mmap.h>
#include <stdio.h>
#include <string.h>
#include "platform_lib.h"
#include "x86_64_delta_ag7648_int.h"
#include "x86_64_delta_i2c.h"
#define CPLD_PSU_NAME "MASTERCPLD"
#define PSU_STATUS_PRESENT 1
#define PSU_STATUS_POWER_GOOD 1
#define PSU_STATUS_REG (0X03)
#define PSU_STATUS_PRESENT_BIT(ch) (0x8<<4*(ch-1))
#define PSU_STATUS_GOOD_BIT(ch) (0x4<<4*(ch-1))
#define PSU_STATUS_PRESENT_OFFSET(ch) (4*ch-1)
#define PSU_STATUS_GOOD_OFFSET(ch) (0x2+4*(ch-1))
#define PSU_PNBUS_VIN_REG (0x88)
#define PSU_PNBUS_IIN_REG (0x89)
#define PSU_PNBUS_PIN_REG (0x97)
#define PSU_PNBUS_VOUT_REG (0x8b)
#define PSU_PNBUS_IOUT_REG (0x8c)
#define PSU_PNBUS_POUT_REG (0x96)
#define PSU_PNBUS_SERIAL_REG (0x39)
#define PSU_PNBUS_MODEL_REG (0xc)
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_PSU(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static long psu_data_convert(unsigned int d, int mult)
{
long X, Y, N, n;
Y = d & 0x07FF;
N = (d >> 11) & 0x0f;
n = d & 0x8000 ? 1 : 0;
if (n)
X = (Y * mult) / ((1<<(((~N)&0xf)+1))) ;
else
X = (Y * mult) * (N=(1<<(N&0xf)));
return X;
}
static long psu_data_convert_16(unsigned int d, int mult)
{
long X;
X = (d * mult) / (1 << 9);
return X;
}
static int
psu_status_info_get(int id, char *node)
{
int ret;
char r_data;
ret=i2c_devname_read_byte(CPLD_PSU_NAME,PSU_STATUS_REG);
if(ret<0)
return -1;
if (PSU1_ID == id) {
if(!strcmp("present",node))
r_data=!((ret& PSU_STATUS_PRESENT_BIT(id))>> PSU_STATUS_PRESENT_OFFSET(id));
else if(!strcmp("good",node))
r_data=((ret& PSU_STATUS_GOOD_BIT(id))>> PSU_STATUS_GOOD_OFFSET(id));
else
r_data=-1;
}
else if (PSU2_ID == id) {
if(!strcmp("present",node))
r_data=!((ret& PSU_STATUS_PRESENT_BIT(id))>> PSU_STATUS_PRESENT_OFFSET(id));
else if(!strcmp("good",node))
r_data=((ret& PSU_STATUS_GOOD_BIT(id))>> PSU_STATUS_GOOD_OFFSET(id));
else
r_data=-1;
}
else{
r_data=-1;
}
return r_data;
}
static int
psu_value_info_get(int id, char *type)
{
int ret;
char *dev_name;
int reg_offset;
if(PSU1_ID == id)
dev_name="PSU1_PMBUS";
else
dev_name="PSU2_PMBUS";
if(!strcmp(type,"vin"))
reg_offset=PSU_PNBUS_VIN_REG;
else if(!strcmp(type,"iin"))
reg_offset=PSU_PNBUS_IIN_REG;
else if(!strcmp(type,"pin"))
reg_offset=PSU_PNBUS_PIN_REG;
else if(!strcmp(type,"vout"))
reg_offset=PSU_PNBUS_VOUT_REG;
else if(!strcmp(type,"iout"))
reg_offset=PSU_PNBUS_IOUT_REG;
else
reg_offset=PSU_PNBUS_POUT_REG;
ret=i2c_devname_read_word(dev_name,reg_offset);
if(ret<0)
return -1;
return ret;
}
static int
psu_serial_model_info_get(int id,char *type,char*data,int data_len)
{
int i,r_data,re_cnt;
char *dev_name;
int reg_offset;
if(PSU1_ID == id)
dev_name="PSU1_EEPROM";
else
dev_name="PSU2_EEPROM";
if(!strcmp(type,"serial"))
reg_offset=PSU_PNBUS_SERIAL_REG;
else
reg_offset=PSU_PNBUS_MODEL_REG;
for(i=0;i<data_len;i++){
re_cnt=3;
while(re_cnt){
r_data=i2c_devname_read_byte(dev_name,reg_offset+i);
if(r_data<0){
re_cnt--;
continue;
}
data[i]=r_data;
break;
}
if(re_cnt==0){
AIM_LOG_ERROR("Unable to read the %d reg \r\n",i);
return ONLP_STATUS_E_INTERNAL;
}
}
return ONLP_STATUS_OK;
}
int
onlp_psui_init(void)
{
return ONLP_STATUS_OK;
}
/*
* Get all information about the given PSU oid.
*/
static onlp_psu_info_t pinfo[] =
{
{ }, /* Not used */
{
{ ONLP_PSU_ID_CREATE(PSU1_ID), "PSU-1", 0 },
},
{
{ ONLP_PSU_ID_CREATE(PSU2_ID), "PSU-2", 0 },
}
};
int
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
{
int val = 0;
int ret = ONLP_STATUS_OK;
int index = ONLP_OID_ID_GET(id);
psu_type_t psu_type;
int r_data;
char sn_data[15]={0};
char model_data[17]={0};
VALIDATE(id);
memset(info, 0, sizeof(onlp_psu_info_t));
*info = pinfo[index]; /* Set the onlp_oid_hdr_t */
/* Get the present state */
val=psu_status_info_get(index, "present");
if (val<0) {
AIM_LOG_INFO("Unable to read PSU %d present value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
if (val != PSU_STATUS_PRESENT) {
info->status &= ~ONLP_PSU_STATUS_PRESENT;
return ONLP_STATUS_OK;
}
info->status |= ONLP_PSU_STATUS_PRESENT;
/* Get power good status */
val=psu_status_info_get(index,"good");
if (val<0) {
AIM_LOG_INFO("Unable to read PSU %d good value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
if (val != PSU_STATUS_POWER_GOOD) {
info->status |= ONLP_PSU_STATUS_FAILED;
}
/* Get PSU type
*/
psu_type = get_psu_type(index, info->model, sizeof(info->model));
switch (psu_type) {
case PSU_TYPE_AC_F2B:
case PSU_TYPE_AC_B2F:
info->caps = ONLP_PSU_CAPS_AC;
ret = ONLP_STATUS_OK;
break;
case PSU_TYPE_UNKNOWN: /* User insert a unknown PSU or unplugged.*/
info->status |= ONLP_PSU_STATUS_UNPLUGGED;
info->status &= ~ONLP_PSU_STATUS_FAILED;
ret = ONLP_STATUS_OK;
break;
default:
ret = ONLP_STATUS_E_UNSUPPORTED;
break;
}
/* Get PSU vin,vout*/
r_data=psu_value_info_get(index,"vin");
if (r_data<0) {
AIM_LOG_INFO("Unable to read PSU %d Vin value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
info->mvin=psu_data_convert(r_data,1000);
r_data=psu_value_info_get(index,"vout");
if (r_data<0) {
AIM_LOG_INFO("Unable to read PSU %d Vout value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
info->mvout=psu_data_convert_16(r_data,1000);
/* Get PSU iin, iout
*/
r_data=psu_value_info_get(index,"iin");
if (r_data<0) {
AIM_LOG_INFO("Unable to read PSU %d Iin value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
info->miin=psu_data_convert(r_data,1000);
r_data=psu_value_info_get(index,"iout");
if (r_data<0) {
AIM_LOG_INFO("Unable to read PSU %d Iout value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
info->miout=psu_data_convert(r_data,1000);
/* Get PSU pin, pout
*/
r_data=psu_value_info_get(index,"pin");
if (r_data<0) {
AIM_LOG_INFO("Unable to read PSU %d Pin value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
info->mpin=psu_data_convert(r_data,1000);
r_data=psu_value_info_get(index,"pout");
if (r_data<0) {
AIM_LOG_INFO("Unable to read PSU %d Pout value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
info->mpout=psu_data_convert(r_data,1000);
/* Get PSU serial
*/
ret=psu_serial_model_info_get(index,"serial",sn_data,14);
if (ret!=ONLP_STATUS_OK) {
AIM_LOG_INFO("Unable to read PSU %d SN value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
strcpy(info->serial,sn_data);
/* Get PSU model
*/
ret=psu_serial_model_info_get(index,"model",model_data,16);
if (ret!=ONLP_STATUS_OK) {
AIM_LOG_INFO("Unable to read PSU %d model value)\r\n", index);
return ONLP_STATUS_E_INVALID;
}
strcpy(info->model,model_data);
return ONLP_STATUS_OK;
}
int
onlp_psui_ioctl(onlp_oid_t pid, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

464
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sfpi.c Executable file
View File

@@ -0,0 +1,464 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/sfpi.h>
#include "platform_lib.h"
#include <x86_64_delta_ag7648/x86_64_delta_ag7648_config.h>
#include "x86_64_delta_ag7648_log.h"
#include "x86_64_delta_i2c.h"
#define SFP_PLUS_MIN_PORT 1
#define SFP_PLUS_MAX_PORT 48
#define QSFP_MIN_PORT 49
#define QSFP_MAX_PORT 54
#define SFP_PLUS_1_8_PRESENT_REG (0X2)
#define SFP_PLUS_9_16_PRESENT_REG (0X3)
#define SFP_PLUS_17_24_PRESENT_REG (0X4)
#define SFP_PLUS_25_32_PRESENT_REG (0X5)
#define SFP_PLUS_33_40_PRESENT_REG (0X6)
#define SFP_PLUS_41_48_PRESENT_REG (0X7)
#define SFP_PLUS_1_8_RX_LOS_REG (0XE)
#define SFP_PLUS_9_16_RX_LOS_REG (0XF)
#define SFP_PLUS_17_24_RX_LOS_REG (0X10)
#define SFP_PLUS_25_32_RX_LOS_REG (0X11)
#define SFP_PLUS_33_40_RX_LOS_REG (0X12)
#define SFP_PLUS_41_48_RX_LOS_REG (0X13)
#define SFP_PLUS_1_8_TX_DISABLE_REG (0X8)
#define SFP_PLUS_9_16_TX_DISABLE_REG (0X9)
#define SFP_PLUS_17_24_TX_DISABLE_REG (0XA)
#define SFP_PLUS_25_32_TX_DISABLE_REG (0XB)
#define SFP_PLUS_33_40_TX_DISABLE_REG (0XC)
#define SFP_PLUS_41_48_TX_DISABLE_REG (0XD)
#define QSFP_49_54_PRESENT_REG (0xC)
#define INVALID_REG (0xFF)
#define INVALID_REG_BIT (0xFF)
struct portCtrl{
int portId;
char cpldName[32];
int presentReg;
int presentRegBit;
int rxLosReg;
int rxLosRegBit;
int txDisableReg;
int txDisableRegBit;
};
#define CPLD_NAME1 "SYSCPLD"
#define CPLD_NAME2 "MASTERCPLD"
#define CPLD_NAME3 "SLAVECPLD"
static struct portCtrl gPortCtrl[] =
{
{1, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 0, SFP_PLUS_1_8_RX_LOS_REG, 0, SFP_PLUS_1_8_TX_DISABLE_REG, 0},
{2, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 1, SFP_PLUS_1_8_RX_LOS_REG, 1, SFP_PLUS_1_8_TX_DISABLE_REG, 1},
{3, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 2, SFP_PLUS_1_8_RX_LOS_REG, 1, SFP_PLUS_1_8_TX_DISABLE_REG, 2},
{4, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 3, SFP_PLUS_1_8_RX_LOS_REG, 2, SFP_PLUS_1_8_TX_DISABLE_REG, 3},
{5, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 4, SFP_PLUS_1_8_RX_LOS_REG, 3, SFP_PLUS_1_8_TX_DISABLE_REG, 4},
{6, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 5, SFP_PLUS_1_8_RX_LOS_REG, 4, SFP_PLUS_1_8_TX_DISABLE_REG, 5},
{7, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 6, SFP_PLUS_1_8_RX_LOS_REG, 5, SFP_PLUS_1_8_TX_DISABLE_REG, 6},
{8, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 7, SFP_PLUS_1_8_RX_LOS_REG, 6, SFP_PLUS_1_8_TX_DISABLE_REG, 7},
{9, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 0, SFP_PLUS_9_16_RX_LOS_REG, 0, SFP_PLUS_9_16_TX_DISABLE_REG, 0},
{10, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 1, SFP_PLUS_9_16_RX_LOS_REG, 1, SFP_PLUS_9_16_TX_DISABLE_REG, 1},
{11, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 2, SFP_PLUS_9_16_RX_LOS_REG, 1, SFP_PLUS_9_16_TX_DISABLE_REG, 2},
{12, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 3, SFP_PLUS_9_16_RX_LOS_REG, 2, SFP_PLUS_9_16_TX_DISABLE_REG, 3},
{13, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 4, SFP_PLUS_9_16_RX_LOS_REG, 3, SFP_PLUS_9_16_TX_DISABLE_REG, 4},
{14, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 5, SFP_PLUS_9_16_RX_LOS_REG, 4, SFP_PLUS_9_16_TX_DISABLE_REG, 5},
{15, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 6, SFP_PLUS_9_16_RX_LOS_REG, 5, SFP_PLUS_9_16_TX_DISABLE_REG, 6},
{16, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 7, SFP_PLUS_9_16_RX_LOS_REG, 6, SFP_PLUS_9_16_TX_DISABLE_REG, 7},
{17, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 0, SFP_PLUS_17_24_RX_LOS_REG, 0, SFP_PLUS_17_24_TX_DISABLE_REG, 0},
{18, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 1, SFP_PLUS_17_24_RX_LOS_REG, 1, SFP_PLUS_17_24_TX_DISABLE_REG, 1},
{19, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 2, SFP_PLUS_17_24_RX_LOS_REG, 1, SFP_PLUS_17_24_TX_DISABLE_REG, 2},
{20, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 3, SFP_PLUS_17_24_RX_LOS_REG, 2, SFP_PLUS_17_24_TX_DISABLE_REG, 3},
{21, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 4, SFP_PLUS_17_24_RX_LOS_REG, 3, SFP_PLUS_17_24_TX_DISABLE_REG, 4},
{22, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 5, SFP_PLUS_17_24_RX_LOS_REG, 4, SFP_PLUS_17_24_TX_DISABLE_REG, 5},
{23, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 6, SFP_PLUS_17_24_RX_LOS_REG, 5, SFP_PLUS_17_24_TX_DISABLE_REG, 6},
{24, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 7, SFP_PLUS_17_24_RX_LOS_REG, 6, SFP_PLUS_17_24_TX_DISABLE_REG, 7},
{25, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 0, SFP_PLUS_25_32_RX_LOS_REG, 0, SFP_PLUS_25_32_TX_DISABLE_REG, 0},
{26, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 1, SFP_PLUS_25_32_RX_LOS_REG, 1, SFP_PLUS_25_32_TX_DISABLE_REG, 1},
{27, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 2, SFP_PLUS_25_32_RX_LOS_REG, 1, SFP_PLUS_25_32_TX_DISABLE_REG, 2},
{28, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 3, SFP_PLUS_25_32_RX_LOS_REG, 2, SFP_PLUS_25_32_TX_DISABLE_REG, 3},
{29, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 4, SFP_PLUS_25_32_RX_LOS_REG, 3, SFP_PLUS_25_32_TX_DISABLE_REG, 4},
{30, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 5, SFP_PLUS_25_32_RX_LOS_REG, 4, SFP_PLUS_25_32_TX_DISABLE_REG, 5},
{31, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 6, SFP_PLUS_25_32_RX_LOS_REG, 5, SFP_PLUS_25_32_TX_DISABLE_REG, 6},
{32, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 7, SFP_PLUS_25_32_RX_LOS_REG, 6, SFP_PLUS_25_32_TX_DISABLE_REG, 7},
{33, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 0, SFP_PLUS_33_40_RX_LOS_REG, 0, SFP_PLUS_33_40_TX_DISABLE_REG, 0},
{34, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 1, SFP_PLUS_33_40_RX_LOS_REG, 1, SFP_PLUS_33_40_TX_DISABLE_REG, 1},
{35, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 2, SFP_PLUS_33_40_RX_LOS_REG, 1, SFP_PLUS_33_40_TX_DISABLE_REG, 2},
{36, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 3, SFP_PLUS_33_40_RX_LOS_REG, 2, SFP_PLUS_33_40_TX_DISABLE_REG, 3},
{37, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 4, SFP_PLUS_33_40_RX_LOS_REG, 3, SFP_PLUS_33_40_TX_DISABLE_REG, 4},
{38, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 5, SFP_PLUS_33_40_RX_LOS_REG, 4, SFP_PLUS_33_40_TX_DISABLE_REG, 5},
{39, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 6, SFP_PLUS_33_40_RX_LOS_REG, 5, SFP_PLUS_33_40_TX_DISABLE_REG, 6},
{40, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 7, SFP_PLUS_33_40_RX_LOS_REG, 6, SFP_PLUS_33_40_TX_DISABLE_REG, 7},
{41, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 0, SFP_PLUS_41_48_RX_LOS_REG, 0, SFP_PLUS_41_48_TX_DISABLE_REG, 0},
{42, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 1, SFP_PLUS_41_48_RX_LOS_REG, 1, SFP_PLUS_41_48_TX_DISABLE_REG, 1},
{43, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 2, SFP_PLUS_41_48_RX_LOS_REG, 1, SFP_PLUS_41_48_TX_DISABLE_REG, 2},
{44, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 3, SFP_PLUS_41_48_RX_LOS_REG, 2, SFP_PLUS_41_48_TX_DISABLE_REG, 3},
{45, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 4, SFP_PLUS_41_48_RX_LOS_REG, 3, SFP_PLUS_41_48_TX_DISABLE_REG, 4},
{46, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 5, SFP_PLUS_41_48_RX_LOS_REG, 4, SFP_PLUS_41_48_TX_DISABLE_REG, 5},
{47, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 6, SFP_PLUS_41_48_RX_LOS_REG, 5, SFP_PLUS_41_48_TX_DISABLE_REG, 6},
{48, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 7, SFP_PLUS_41_48_RX_LOS_REG, 6, SFP_PLUS_41_48_TX_DISABLE_REG, 7},
{49, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 0, INVALID_REG, 0, INVALID_REG_BIT, 0},
{50, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 1, INVALID_REG, 1, INVALID_REG_BIT, 1},
{51, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 2, INVALID_REG, 1, INVALID_REG_BIT, 2},
{52, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 3, INVALID_REG, 2, INVALID_REG_BIT, 3},
{53, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 4, INVALID_REG, 3, INVALID_REG_BIT, 4},
{54, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 5, INVALID_REG, 4, INVALID_REG_BIT, 5},
{0xFFFF, "", INVALID_REG, 0, INVALID_REG, 0, INVALID_REG_BIT, 0},
};
/************************************************************
*
* SFPI Entry Points
*
***********************************************************/
int
onlp_sfpi_init(void)
{
/* Called at initialization time */
return ONLP_STATUS_OK;
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
int p;
int start_port, end_port;
if(platform_id == PLATFORM_ID_DELTA_AG7648_R0)
{
start_port = SFP_PLUS_MIN_PORT;
end_port = QSFP_MAX_PORT;
}
else /*reserved*/
{
AIM_LOG_ERROR("The platform id %d is invalid \r\n", platform_id);
return ONLP_STATUS_E_UNSUPPORTED;
}
for(p = start_port; p <=end_port; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_is_present(int port)
{
/*
* Return 1 if present.
* Return 0 if not present.
* Return < 0 if error.
*/
int present,r_data;
if((port >= SFP_PLUS_MIN_PORT) && (port <= QSFP_MAX_PORT)){
r_data=i2c_devname_read_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].presentReg);
}
else{
AIM_LOG_ERROR("The port %d is invalid \r\n", port);
return ONLP_STATUS_E_UNSUPPORTED;
}
if(r_data<0){
AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
r_data = (~r_data) & 0xFF;
present = (r_data >> gPortCtrl[port - 1].presentRegBit) & 0x1;
return present;
}
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
int status;
int port, i = 0;
uint64_t presence_all=0;
AIM_BITMAP_CLR_ALL(dst);
if(platform_id == PLATFORM_ID_DELTA_AG7648_R0)
{
port = 1;
}
else{
AIM_LOG_ERROR("The platform id %d is invalid \r\n", platform_id);
return ONLP_STATUS_E_UNSUPPORTED;
}
/*read 8 ports present status once*/
for (i = port; i <= QSFP_MAX_PORT;)
{
/*
AIM_LOG_ERROR("port %d, cpldname %s, reg %d\r\n", i, gPortCtrl[i - 1].cpldName, \
gPortCtrl[i - 1].presentReg);
*/
status = i2c_devname_read_byte(gPortCtrl[i - 1].cpldName, gPortCtrl[i - 1].presentReg);
if(status<0){
AIM_LOG_ERROR("Unable to read presence from the port %d to %d value(status %d) \r\n", i, i + 8, status);
return ONLP_STATUS_E_INTERNAL;
}
status = ~(status) & 0xFF;
presence_all |= ((uint64_t)(status)) << (((i - 1)/ 8) * 8);
i += 8;
}
/* Populate bitmap */
for(i = port; presence_all; i++) {
AIM_BITMAP_MOD(dst, i, (presence_all & 1));
presence_all >>= 1;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
{
int status;
int port,i = 0;
uint64_t rx_los_all;
if(platform_id == PLATFORM_ID_DELTA_AG7648_R0)
{
port = 1;
}
else{
AIM_LOG_ERROR("The platform id %d is invalid \r\n", platform_id);
return ONLP_STATUS_E_UNSUPPORTED;
}
/*read 8 ports present status once*/
for (i = port; i <= QSFP_MAX_PORT;)
{
status = i2c_devname_read_byte(gPortCtrl[i - 1].cpldName, gPortCtrl[i - 1].rxLosReg);
if(status<0){
AIM_LOG_ERROR("Unable to read rx los from the port %d to %d value. \r\n", i, i + 8);
return ONLP_STATUS_E_INTERNAL;
}
status = ~(status) & 0xFF;
rx_los_all |= status << (((i - 1)/ 8) * 8);
i += 8;
}
/* Populate bitmap */
for(i = port; rx_los_all; i++) {
AIM_BITMAP_MOD(dst, i, (rx_los_all & 1));
rx_los_all >>= 1;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
int i;//,r_data,re_cnt;
char sfp_name[32];
//int i,re_cnt;uint8_t r_data;
memset(data, 0, 256);
memset(sfp_name, 0x0, sizeof(sfp_name));
if (port < SFP_PLUS_MIN_PORT || port > QSFP_MAX_PORT)
{
AIM_LOG_ERROR("port %d is not invalid\r\n", port);
return ONLP_STATUS_E_INVALID;
}
if (onlp_sfpi_is_present(port) <= 0)
{
AIM_LOG_WARN("port %d is note present or error\r\n", port);
return ONLP_STATUS_E_MISSING;
}
if (port <= SFP_PLUS_MAX_PORT)
sprintf(sfp_name, "SFP%d", port);
else
sprintf(sfp_name, "QSFP%d", port);
for(i=0;i<8;i++){
if (i2c_devname_read_block(sfp_name, (32*i), (uint8_t*)(data+32*i), 32) < 0)
{
AIM_LOG_ERROR("Unable to read the port %d eeprom\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
return onlp_sfpi_eeprom_read( port, data);
}
int
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
{
/*value is 1 if the tx disable
value is 0 if the tx enable
*/
int rc,r_data,dis_value,present;
if (port < SFP_PLUS_MIN_PORT || port > QSFP_MAX_PORT)
{
AIM_LOG_ERROR("port %d is not invalid\r\n", port);
return ONLP_STATUS_E_INVALID;
}
present=onlp_sfpi_is_present(port);
if(present <= 0){
AIM_LOG_INFO("The port %d is not present and can not set tx disable\r\n",port);
return ONLP_STATUS_E_UNSUPPORTED;
}
r_data = i2c_devname_read_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].txDisableReg);
if(r_data<0){
AIM_LOG_INFO("Unable to read sfp tx disable reg value\r\n");
return ONLP_STATUS_E_INTERNAL;
}
r_data &= ~(0x1 << gPortCtrl[port - 1].txDisableReg);
dis_value = value << gPortCtrl[port - 1].txDisableReg;
dis_value |= r_data;
switch(control)
{
case ONLP_SFP_CONTROL_TX_DISABLE:
{
rc = i2c_devname_write_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].txDisableReg, dis_value);
if (rc<0) {
AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
break;
}
default:
return ONLP_STATUS_E_UNSUPPORTED;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
{
int r_data,present;
if (port < SFP_PLUS_MIN_PORT || port > QSFP_MAX_PORT)
{
AIM_LOG_ERROR("port %d is not invalid\r\n", port);
return ONLP_STATUS_E_INVALID;
}
present=onlp_sfpi_is_present(port);
if(present <= 0){
AIM_LOG_INFO("The port %d is not present\r\n",port);
return ONLP_STATUS_E_UNSUPPORTED;
}
switch(control)
{
case ONLP_SFP_CONTROL_RX_LOS:
{
r_data=i2c_devname_read_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].rxLosReg);
if (r_data<0) {
AIM_LOG_ERROR("Unable to read rx_los status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
r_data &= (0x1 << gPortCtrl[port - 1].rxLosRegBit);
*value = (r_data >> gPortCtrl[port - 1].rxLosRegBit);
break;
}
case ONLP_SFP_CONTROL_TX_DISABLE:
{
r_data=i2c_devname_read_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].txDisableReg);
if (r_data<0) {
AIM_LOG_ERROR("Unable to read tx_disabled status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
r_data &= (0x1 << gPortCtrl[port - 1].txDisableRegBit);
*value = (r_data >> gPortCtrl[port - 1].txDisableRegBit);
break;
}
default:
return ONLP_STATUS_E_UNSUPPORTED;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}

304
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sysi.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <unistd.h>
#include <fcntl.h>
#include <stdio.h>
#include <onlplib/file.h>
#include <onlp/platformi/sysi.h>
#include <onlp/platformi/ledi.h>
#include <onlp/platformi/thermali.h>
#include <onlp/platformi/fani.h>
#include <onlp/platformi/psui.h>
#include "x86_64_delta_ag7648_int.h"
#include "x86_64_delta_ag7648_log.h"
#include "platform_lib.h"
#include "x86_64_delta_i2c.h"
platform_id_t platform_id = PLATFORM_ID_UNKNOWN;
#define ONIE_PLATFORM_NAME "x86-64-delta-ag7648-r0"
const char*
onlp_sysi_platform_get(void)
{
enum ag7648_product_id pid = get_product_id();
if (pid == PID_AG7648)
return "x86-64-delta-ag7648";
else
return "unknow";
}
int
onlp_sysi_platform_set(const char* platform)
{
if(strstr(platform,"x86-64-delta-ag7648-r0")) {
platform_id = PLATFORM_ID_DELTA_AG7648_R0;
return ONLP_STATUS_OK;
}
AIM_LOG_ERROR("No support for platform '%s'", platform);
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sysi_platform_info_get(onlp_platform_info_t* pi)
{
int v;
v = i2c_devname_read_byte("SYSCPLD", 0X0);
pi->cpld_versions = aim_fstrdup("%d", v & 0xf);
return 0;
}
int
onlp_sysi_onie_data_get(uint8_t** data, int* size)
{
int i,re_cnt;
uint8_t* rdata = aim_zmalloc(256);
if(!rdata){
AIM_LOG_ERROR("Unable to malloc memory \r\n");
return ONLP_STATUS_E_INTERNAL;
}
for(i=0;i<8;i++){
re_cnt=3;
while(re_cnt){
if (i2c_devname_read_block("ID_EEPROM", i * 32, (rdata + i * 32), 32) < 0)
{
re_cnt--;
continue;
}
break;
}
if(re_cnt==0){
AIM_LOG_ERROR("Unable to read the %d reg \r\n",i);
break;
}
}
*data = rdata;
return ONLP_STATUS_OK;
}
void
onlp_sysi_onie_data_free(uint8_t* data)
{
aim_free(data);
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
int i;
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
/* 1 Thermal sensors on the chassis */
for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++) {
*e++ = ONLP_THERMAL_ID_CREATE(i);
}
/* LEDs on the chassis */
for (i = 1; i <= chassis_led_count(); i++) {
*e++ = ONLP_LED_ID_CREATE(i);
}
/* 1 Fans on the chassis */
for (i = 1; i <= chassis_fan_count(); i++) {
*e++ = ONLP_FAN_ID_CREATE(i);
}
/* 2 PSUs on the chassis */
for (i = 1; i <= CHASSIS_PSU_COUNT; i++) {
*e++ = ONLP_PSU_ID_CREATE(i);
}
return 0;
}
int
onlp_sysi_onie_info_get(onlp_onie_info_t* onie)
{
if(onie){
onie->platform_name = aim_strdup(ONIE_PLATFORM_NAME);
}
return ONLP_STATUS_OK;
}
int
onlp_sysi_platform_manage_fans(void)
{
int rc;
onlp_thermal_info_t ti2, ti3, ti4;
int mtemp=0;
int new_rpm=0;
if (chassis_fan_count() == 0) {
return ONLP_STATUS_E_UNSUPPORTED;
}
/* Get temperature */
/*rc = onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(1), &ti1);
if (rc != ONLP_STATUS_OK) {
return rc;
}*/
rc = onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(2), &ti2);
if (rc != ONLP_STATUS_OK) {
return rc;
}
rc = onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(3), &ti3);
if (rc != ONLP_STATUS_OK) {
return rc;
}
rc = onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(4), &ti4);
if (rc != ONLP_STATUS_OK) {
return rc;
}
mtemp=(ti2.mcelsius+ti3.mcelsius + ti4.mcelsius) / 3;
DEBUG_PRINT("mtemp %d\n", mtemp);
/* Bring fan speed according the temp
*/
if(mtemp<25000)
new_rpm=FAN_IDLE_RPM;
else if((mtemp>=30000)&&(mtemp<40000))
new_rpm=FAN_LEVEL1_RPM;
else if((mtemp>=45000)&&(mtemp<55000))
new_rpm=FAN_LEVEL2_RPM;
else if((mtemp>=60000)&&(mtemp<75000))
new_rpm=FAN_LEVEL3_RPM;
else if(mtemp>=80000)
new_rpm=FAN_LEVEL4_RPM;
else{
return ONLP_STATUS_OK;
}
onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(1),new_rpm);
onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(2),new_rpm);
onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(3),new_rpm);
onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(4),new_rpm);
onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(5),new_rpm);
onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(6),new_rpm);
return ONLP_STATUS_OK;
}
int
onlp_sysi_platform_manage_leds(void)
{
int i,tray_i,rc;
onlp_fan_info_t info;
onlp_led_mode_t fan_new_mode;
onlp_led_mode_t fan_tray_new_mode[3];
onlp_psu_info_t psu;
onlp_led_mode_t psu_new_mode;
onlp_led_mode_t sys_new_mode;
onlp_led_mode_t locator_new_mode;
/*fan led */
/*fan led */
for(tray_i=0;tray_i<3;tray_i++){
for(i=CHASSIS_FAN_COUNT-2*tray_i;i>=CHASSIS_FAN_COUNT-2*tray_i-1;i--){
rc=onlp_fani_info_get(ONLP_FAN_ID_CREATE(i), &info);
if ((rc != ONLP_STATUS_OK) ||((info.status&0x1)!=1)){
fan_tray_new_mode[tray_i]=ONLP_LED_MODE_OFF;
goto tray_next;
}
else{
if((info.status&0x2)==1){
fan_tray_new_mode[tray_i]=ONLP_LED_MODE_YELLOW;
goto tray_next;
}
}
}
fan_tray_new_mode[tray_i]=ONLP_LED_MODE_GREEN;
tray_next: continue;
}
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_FAN_TRAY0),fan_tray_new_mode[0]);
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_FAN_TRAY1),fan_tray_new_mode[1]);
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_FAN_TRAY2),fan_tray_new_mode[2]);
if((fan_tray_new_mode[0]==ONLP_LED_MODE_GREEN)&&(fan_tray_new_mode[1]==ONLP_LED_MODE_GREEN)&&
(fan_tray_new_mode[2]==ONLP_LED_MODE_GREEN))
fan_new_mode=ONLP_LED_MODE_GREEN;
else if((fan_tray_new_mode[0]==ONLP_LED_MODE_OFF)||(fan_tray_new_mode[1]==ONLP_LED_MODE_OFF)||
(fan_tray_new_mode[2]==ONLP_LED_MODE_OFF))
fan_new_mode=ONLP_LED_MODE_YELLOW;
else
fan_new_mode=ONLP_LED_MODE_YELLOW_BLINKING;
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_FAN),fan_new_mode);
/*psu1 and psu2 led */
for(i=1;i<=CHASSIS_PSU_COUNT;i++){
rc=onlp_psui_info_get(ONLP_PSU_ID_CREATE(i),&psu);
if (rc != ONLP_STATUS_OK) {
continue;
}
if((psu.status&0x1)&&!(psu.status&0x2)){
psu_new_mode=ONLP_LED_MODE_GREEN;
goto sys_led;
}
}
psu_new_mode=ONLP_LED_MODE_YELLOW_BLINKING;
sys_led :
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_POWER),psu_new_mode);
//sys led ----------------
if((fan_new_mode!=ONLP_LED_MODE_GREEN)||(psu_new_mode!=ONLP_LED_MODE_GREEN))
sys_new_mode=ONLP_LED_MODE_YELLOW_BLINKING;
else
sys_new_mode=ONLP_LED_MODE_GREEN;
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_SYS),sys_new_mode);
locator_new_mode=ONLP_LED_MODE_GREEN;
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_LOCATOR),locator_new_mode);
return ONLP_STATUS_OK;
}

140
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Thermal Sensor Platform Implementation.
*
***********************************************************/
#include <unistd.h>
#include <onlplib/mmap.h>
#include <onlplib/file.h>
#include <onlp/platformi/thermali.h>
#include <fcntl.h>
#include "platform_lib.h"
#include "x86_64_delta_ag7648_log.h"
#include <stdio.h>
#define prefix_path "/sys/bus/i2c/devices/"
#define LOCAL_DEBUG 0
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_THERMAL(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
enum onlp_thermal_id
{
THERMAL_RESERVED = 0,
THERMAL_1_CLOSE_TO_CPU,
THERMAL_1_CLOSE_TO_MAC,
THERMAL_2_CLOSE_TO_PHY_SFP_PLUS,
THERMAL_3_CLOSE_TO_PHY_QSFP,
THERMAL_1_ON_PSU1,
THERMAL_1_ON_PSU2,
};
static char* last_path[] = /* must map with onlp_thermal_id */
{
"reserved",
"2-004d/hwmon/hwmon1/temp1_input",
"3-004c/hwmon/hwmon2/temp1_input",
"3-004d/hwmon/hwmon3/temp1_input",
"3-004e/hwmon/hwmon4/temp1_input",
"4-0058/psu_temp1_input",
"5-0058/psu_temp1_input",
};
/* Static values */
static onlp_thermal_info_t linfo[] = {
{ }, /* Not used */
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_CLOSE_TO_CPU), "Thermal Sensor 1- close to cpu", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_CLOSE_TO_MAC), "Thermal Sensor 1- close to mac", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_2_CLOSE_TO_PHY_SFP_PLUS), "Thermal Sensor 2- close to sfp+ phy", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_3_CLOSE_TO_PHY_QSFP), "Thermal Sensor 2- close to qsfp phy", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU1), "PSU-1 Thermal Sensor 1", ONLP_PSU_ID_CREATE(1)},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU2), "PSU-2 Thermal Sensor 1", ONLP_PSU_ID_CREATE(2)},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
}
};
/*
* This will be called to intiialize the thermali subsystem.
*/
int
onlp_thermali_init(void)
{
return ONLP_STATUS_OK;
}
/*
* Retrieve the information structure for the given thermal OID.
*
* If the OID is invalid, return ONLP_E_STATUS_INVALID.
* If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
* Otherwise, return ONLP_STATUS_OK with the OID's information.
*
* Note -- it is expected that you fill out the information
* structure even if the sensor described by the OID is not present.
*/
int
onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
{
int len, nbytes = 10, temp_base=1, local_id;
uint8_t r_data[10]={0};
char fullpath[50] = {0};
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
DEBUG_PRINT("\n[Debug][%s][%d][local_id: %d]", __FUNCTION__, __LINE__, local_id);
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[local_id];
/* get fullpath */
sprintf(fullpath, "%s%s", prefix_path, last_path[local_id]);
//OPEN_READ_FILE(fd, fullpath, r_data, nbytes, len);
onlp_file_read(r_data,nbytes,&len, fullpath);
info->mcelsius =ONLPLIB_ATOI((char*)r_data) / temp_base;
DEBUG_PRINT("\n[Debug][%s][%d][save data: %d]\n", __FUNCTION__, __LINE__, info->mcelsius);
return ONLP_STATUS_OK;
}

81
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_config.c Normal file
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@@ -0,0 +1,81 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag7648/x86_64_delta_ag7648_config.h>
/* <auto.start.cdefs(X86_64_DELTA_AG7648_CONFIG_HEADER).source> */
#define __x86_64_delta_ag7648_config_STRINGIFY_NAME(_x) #_x
#define __x86_64_delta_ag7648_config_STRINGIFY_VALUE(_x) __x86_64_delta_ag7648_config_STRINGIFY_NAME(_x)
x86_64_delta_ag7648_config_settings_t x86_64_delta_ag7648_config_settings[] =
{
#ifdef X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING
{ __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING) },
#else
{ X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT
{ __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT) },
#else
{ X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT
{ __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT) },
#else
{ X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT
{ __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
#else
{ X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB
{ __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB) },
#else
{ X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
{ __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
#else
{ X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI
{ __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI) },
#else
{ X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
{ __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION) },
#else
{ X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" },
#endif
{ NULL, NULL }
};
#undef __x86_64_delta_ag7648_config_STRINGIFY_VALUE
#undef __x86_64_delta_ag7648_config_STRINGIFY_NAME
const char*
x86_64_delta_ag7648_config_lookup(const char* setting)
{
int i;
for(i = 0; x86_64_delta_ag7648_config_settings[i].name; i++) {
if(strcmp(x86_64_delta_ag7648_config_settings[i].name, setting)) {
return x86_64_delta_ag7648_config_settings[i].value;
}
}
return NULL;
}
int
x86_64_delta_ag7648_config_show(struct aim_pvs_s* pvs)
{
int i;
for(i = 0; x86_64_delta_ag7648_config_settings[i].name; i++) {
aim_printf(pvs, "%s = %s\n", x86_64_delta_ag7648_config_settings[i].name, x86_64_delta_ag7648_config_settings[i].value);
}
return i;
}
/* <auto.end.cdefs(X86_64_DELTA_AG7648_CONFIG_HEADER).source> */

10
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_enums.c Normal file
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@@ -0,0 +1,10 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag7648/x86_64_delta_ag7648_config.h>
/* <--auto.start.enum(ALL).source> */
/* <auto.end.enum(ALL).source> */

12
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_int.h Normal file
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@@ -0,0 +1,12 @@
/**************************************************************************//**
*
* x86_64_delta_ag7648 Internal Header
*
*****************************************************************************/
#ifndef __x86_64_delta_ag7648_INT_H__
#define __x86_64_delta_ag7648_INT_H__
#include <x86_64_delta_ag7648/x86_64_delta_ag7648_config.h>
#endif /* __x86_64_delta_ag7648_INT_H__ */

18
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.c Normal file
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@@ -0,0 +1,18 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag7648/x86_64_delta_ag7648_config.h>
#include "x86_64_delta_ag7648_log.h"
/*
* x86_64_delta_ag7648 log struct.
*/
AIM_LOG_STRUCT_DEFINE(
X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT,
X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT,
NULL, /* Custom log map */
X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT
);

12
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.h Normal file
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@@ -0,0 +1,12 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#ifndef __x86_64_delta_ag7648_LOG_H__
#define __x86_64_delta_ag7648_LOG_H__
#define AIM_LOG_MODULE_NAME x86_64_delta_ag7648
#include <AIM/aim_log.h>
#endif /* __x86_64_delta_ag7648_LOG_H__ */

24
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_module.c Normal file
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@@ -0,0 +1,24 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag7648/x86_64_delta_ag7648_config.h>
#include "x86_64_delta_ag7648_log.h"
static int
datatypes_init__(void)
{
#define x86_64_delta_ag7648_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
#include <x86_64_delta_ag7648/x86_64_delta_ag7648.x>
return 0;
}
void __x86_64_delta_ag7648_module_init__(void)
{
AIM_LOG_STRUCT_REGISTER();
datatypes_init__();
}
int __onlp_platform_version__ = 1;

50
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_ucli.c Normal file
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@@ -0,0 +1,50 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag7648/x86_64_delta_ag7648_config.h>
#if X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI == 1
#include <uCli/ucli.h>
#include <uCli/ucli_argparse.h>
#include <uCli/ucli_handler_macros.h>
static ucli_status_t
x86_64_delta_ag7648_ucli_ucli__config__(ucli_context_t* uc)
{
UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_delta_ag7648)
}
/* <auto.ucli.handlers.start> */
/* <auto.ucli.handlers.end> */
static ucli_module_t
x86_64_delta_ag7648_ucli_module__ =
{
"x86_64_delta_ag7648_ucli",
NULL,
x86_64_delta_ag7648_ucli_ucli_handlers__,
NULL,
NULL,
};
ucli_node_t*
x86_64_delta_ag7648_ucli_node_create(void)
{
ucli_node_t* n;
ucli_module_init(&x86_64_delta_ag7648_ucli_module__);
n = ucli_node_create("x86_64_delta_ag7648", NULL, &x86_64_delta_ag7648_ucli_module__);
ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_delta_ag7648"));
return n;
}
#else
void*
x86_64_delta_ag7648_ucli_node_create(void)
{
return NULL;
}
#endif

204
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c Executable file
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@@ -0,0 +1,204 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc
* Copyright 2017 Delta Networks, Inc
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************/
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include <errno.h>
#include <stdlib.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <unistd.h>
#include <pthread.h>
#include "x86_64_delta_ag7648_log.h"
#include "x86_64_delta_i2c.h"
#include <onlplib/i2c.h>
struct i2c_device_info i2c_device_list[]={
{"RTC",0X0,0X69},
{"TMP1_CLOSE_TO_CPU",0X2,0X4d},
{"TMP1_CLOSE_TO_MAC",0X3,0X4c},
{"TMP2_CLOSE_TO_SFP_PLUS",0X3,0X4d},
{"TMP3_CLOSE_TO_QSFP",0X3,0X4E},
{"SYSCPLD",0X2,0X31},
{"MASTERCPLD",0X2,0X32},
{"SLAVECPLD",0X2,0X33},
{"FAN1EEPROM",0X3,0X51},
{"FAN2EEPROM",0X3,0X52},
{"FAN3EEPROM",0X3,0X53},
{"FANCTRL1",0X3,0X2A},
{"FANCTRL2",0X3,0X29},
{"CURT_MONTOR",0X1,0X40},
{"ID_EEPROM",0X2,0X53},
{"SFP1",0XA,0X50},
{"SFP2",0XB,0X50},
{"SFP3",0XC,0X50},
{"SFP4",0XD,0X50},
{"SFP5",0XE,0X50},
{"SFP6",0XF,0X50},
{"SFP7",0X10,0X50},
{"SFP8",0X11,0X50},
{"SFP9",0X12,0X50},
{"SFP10",0X13,0X50},
{"SFP11",0X14,0X50},
{"SFP12",0X15,0X50},
{"SFP13",0X16,0X50},
{"SFP14",0X17,0X50},
{"SFP15",0X18,0X50},
{"SFP16",0X19,0X50},
{"SFP17",0X1A,0X50},
{"SFP18",0X1B,0X50},
{"SFP19",0X1C,0X50},
{"SFP20",0X1D,0X50},
{"SFP21",0X1E,0X50},
{"SFP22",0X1F,0X50},
{"SFP23",0X20,0X50},
{"SFP24",0X21,0X50},
{"SFP25",0X22,0X50},
{"SFP26",0X23,0X50},
{"SFP27",0X24,0X50},
{"SFP28",0X25,0X50},
{"SFP29",0X26,0X50},
{"SFP30",0X27,0X50},
{"SFP31",0X28,0X50},
{"SFP32",0X29,0X50},
{"SFP33",0X2A,0X50},
{"SFP34",0X2B,0X50},
{"SFP35",0X2C,0X50},
{"SFP36",0X2D,0X50},
{"SFP37",0X2E,0X50},
{"SFP38",0X2F,0X50},
{"SFP39",0X30,0X50},
{"SFP40",0X31,0X50},
{"SFP41",0X32,0X50},
{"SFP42",0X33,0X50},
{"SFP43",0X34,0X50},
{"SFP44",0X35,0X50},
{"SFP45",0X36,0X50},
{"SFP46",0X37,0X50},
{"SFP47",0X38,0X50},
{"SFP48",0X39,0X50},
{"QSFP49",0X3A,0X50},
{"QSFP50",0X3B,0X50},
{"QSFP51",0X3C,0X50},
{"QSFP52",0X3D,0X50},
{"QSFP53",0X3E,0X50},
{"QSFP54",0X3F,0X50},
// -------------------------
{"PSU1_PMBUS",0X6,0X58},
{"PSU2_PMBUS",0X6,0X59},
{"PSU1_EEPROM",0X6,0X50},
{"PSU2_EEPROM",0X6,0X51},
{NULL, -1,-1},
};
uint32_t i2c_flag=ONLP_I2C_F_FORCE;
i2c_device_info_t *i2c_dev_find_by_name (char *name)
{
i2c_device_info_t *i2c_dev = i2c_device_list;
if (name == NULL) return NULL;
while (i2c_dev->name) {
if (strcmp (name, i2c_dev->name) == 0) break;
++ i2c_dev;
}
if (i2c_dev->name == NULL) return NULL;
return i2c_dev;
}
int i2c_devname_read_byte (char *name, int reg)
{
int ret=-1;
i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name);
if(i2c_dev==NULL) return -1;
ret=onlp_i2c_readb(i2c_dev->i2cbus, i2c_dev->addr, reg, i2c_flag);
return ret;
}
int i2c_devname_write_byte (char *name, int reg, int value)
{
int ret=-1;
i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name);
if(i2c_dev==NULL) return -1;
ret=onlp_i2c_writeb (i2c_dev->i2cbus, i2c_dev->addr, reg, value, i2c_flag);
return ret;
}
int i2c_devname_read_word (char *name, int reg)
{
int ret=-1;
i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name);
if(i2c_dev==NULL) return -1;
ret=onlp_i2c_readw(i2c_dev->i2cbus, i2c_dev->addr, reg, i2c_flag);
return ret;
}
int i2c_devname_write_word (char *name, int reg, int value)
{
int ret=-1;
i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name);
if(i2c_dev==NULL) return -1;
ret=onlp_i2c_writew (i2c_dev->i2cbus, i2c_dev->addr, reg, value, i2c_flag);
return ret;
}
int i2c_devname_read_block (char *name, int reg, uint8_t*buff, int buff_size)
{
int ret = -1;
i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name);
if(i2c_dev==NULL) return -1;
ret =onlp_i2c_block_read (i2c_dev->i2cbus, i2c_dev->addr, reg, buff_size, buff, i2c_flag);
return ret;
}

55
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.h Executable file
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@@ -0,0 +1,55 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
* Copyright 2017 Delta Networks, Inc
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************/
/* the i2c struct header*/
#ifndef __X86_64_DELTA_I2C_H__
#define __X86_64_DELTA_I2C_H__
#include "x86_64_delta_ag7648_log.h"
struct i2c_device_info {
/*i2c device name*/
char *name;
char i2cbus;
char addr;
};
typedef struct i2c_device_info i2c_device_info_t;
extern struct i2c_device_info i2c_device_list[];
extern int i2c_devname_read_byte(char *name, int reg);
extern int i2c_devname_write_byte(char *name, int reg, int value);
extern int i2c_devname_read_word(char *name, int reg);
extern int i2c_devname_write_word(char *name, int reg, int value);
extern int i2c_devname_read_block (char *name, int reg, uint8_t*buff, int buff_size);
//extern int i2c_devname_write_block(char *name, int reg, char *buff, int buff_size);
#endif

13
packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/x86_64_delta_ag7648.mk Normal file
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@@ -0,0 +1,13 @@
###############################################################################
#
# Inclusive Makefile for the x86_64_delta_ag7648 module.
#
# Autogenerated 2017-03-20 15:05:23.627200
#
###############################################################################
x86_64_delta_ag7648_BASEDIR := $(dir $(abspath $(lastword $(MAKEFILE_LIST))))
include $(x86_64_delta_ag7648_BASEDIR)module/make.mk
include $(x86_64_delta_ag7648_BASEDIR)module/auto/make.mk
include $(x86_64_delta_ag7648_BASEDIR)module/src/make.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/Makefile Normal file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/Makefile Normal file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/PKG.yml Normal file
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@@ -0,0 +1 @@
!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=delta BASENAME=x86-64-delta-ag7648 REVISION=r0

32
packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/lib/x86-64-delta-ag7648-r0.yml Normal file
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@@ -0,0 +1,32 @@
---
######################################################################
#
# platform-config for AG7648
#
######################################################################
x86-64-delta-ag7648-r0:
grub:
serial: >-
--port=0x3f8
--speed=115200
--word=8
--parity=no
--stop=1
kernel:
<<: *kernel-3-16
args: >-
nopat
acpi=off
console=ttyS0,115200n8
##network
## interfaces:
## ma1:
## name: ~
## syspath: pci0000:00/0000:00:14.0

29
packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/python/x86_64_delta_ag7648_r0/__init__.py Normal file
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@@ -0,0 +1,29 @@
from onl.platform.base import *
from onl.platform.delta import *
class OnlPlatform_x86_64_delta_ag7648_r0(OnlPlatformDelta,OnlPlatformPortConfig_48x10_6x40):
PLATFORM='x86-64-delta-ag7648-r0'
MODEL="AG7648"
SYS_OBJECT_ID=".7648.1"
def baseconfig(self):
self.new_i2c_device('pca9547', 0x70, 1);
self.insmod('x86-64-delta-ag7648-cpld-mux-1.ko')
self.insmod('x86-64-delta-ag7648-cpld-mux-2.ko')
########### initialize I2C bus 0 ###########
self.new_i2c_devices(
[
('clock_gen', 0x69, 0),
('tmp75', 0x4d, 2),
('tmp75', 0x4c, 3),
('tmp75', 0x4d, 3),
('tmp75', 0x4e, 3),
]
)
return True

8
packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c
View File

@@ -348,14 +348,14 @@ onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
return ONLP_STATUS_E_UNSUPPORTED;
}
int
int
onlp_fani_get_min_rpm(int id)
{
int len = 0, nbytes = 10;
char r_data[10] = {0};
char fullpath[65] = {0};
snprintf(fullpath, sizeof(fullpath), "%s%s", PREFIX_PATH, fan_path[id].min);
OPEN_READ_FILE(fullpath, r_data, nbytes, len);
if (onlp_file_read((uint8_t*)r_data, nbytes, &len, "%s%s", PREFIX_PATH, fan_path[id].min) < 0)
return ONLP_STATUS_E_INTERNAL;
return atoi(r_data);
}

8
packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c
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@@ -534,14 +534,14 @@ onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
return ONLP_STATUS_E_UNSUPPORTED;
}
int
int
onlp_fani_get_min_rpm(int id)
{
int len = 0, nbytes = 10;
char r_data[10] = {0};
char fullpath[65] = {0};
snprintf(fullpath, sizeof(fullpath), "%s%s", PREFIX_PATH, fan_path[id].min);
OPEN_READ_FILE(fullpath, r_data, nbytes, len);
if (onlp_file_read((uint8_t*)r_data, nbytes, &len, "%s%s", PREFIX_PATH, fan_path[id].min) < 0)
return ONLP_STATUS_E_INTERNAL;
return atoi(r_data);
}

6
packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c
View File

@@ -538,9 +538,9 @@ onlp_fani_get_min_rpm(int id)
{
int len = 0, nbytes = 10;
char r_data[10] = {0};
char fullpath[65] = {0};
snprintf(fullpath, sizeof(fullpath), "%s%s", PREFIX_PATH, fan_path[id].min);
OPEN_READ_FILE(fullpath, r_data, nbytes, len);
if (onlp_file_read((uint8_t*)r_data, nbytes, &len, "%s%s", PREFIX_PATH, fan_path[id].min) < 0)
return ONLP_STATUS_E_INTERNAL;
return atoi(r_data);
}

1
packages/platforms/netberg/Makefile Executable file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/netberg/vendor-config/Makefile Executable file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/netberg/vendor-config/PKG.yml Executable file
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@@ -0,0 +1 @@
!include $ONL_TEMPLATES/platform-config-vendor.yml VENDOR=netberg Vendor=Netberg

7
packages/platforms/netberg/vendor-config/src/python/netberg/__init__.py Executable file
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@@ -0,0 +1,7 @@
#!/usr/bin/python
from onl.platform.base import *
class OnlPlatformNetberg(OnlPlatformBase):
MANUFACTURER='Netberg'
PRIVATE_ENTERPRISE_NUMBER=47294

1
packages/platforms/netberg/x86-64/Makefile Executable file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/netberg/x86-64/modules/Makefile Executable file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/netberg/x86-64/modules/PKG.yml Executable file
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!include $ONL_TEMPLATES/arch-vendor-modules.yml ARCH=amd64 VENDOR=netberg KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64"

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lib

6
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KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64
KMODULES := $(wildcard *.c)
VENDOR := netberg
BASENAME := common
ARCH := x86_64
include $(ONL)/make/kmodule.mk

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*x86*64*netberg*aurora*620*rangeley*.mk
onlpdump.mk

1
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/Makefile Executable file
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include $(ONL)/make/pkg.mk

1
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include $(ONL)/make/pkg.mk

1
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/PKG.yml Executable file
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!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-620-rangeley

1
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/Makefile Executable file
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include $(ONL)/make/pkg.mk

1
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/PKG.yml Executable file
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!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-netberg-aurora-620-rangeley ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

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FILTER=src
include $(ONL)/make/subdirs.mk

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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-netberg-aurora-620-rangeley
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_netberg_aurora_620_rangeley onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-netberg-aurora-620-rangeley.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

45
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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_netberg_aurora_620_rangeley onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

1
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name: x86_64_netberg_aurora_620_rangeley

9
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###############################################################################
#
#
#
###############################################################################
include $(ONL)/make/config.mk
MODULE := x86_64_netberg_aurora_620_rangeley
AUTOMODULE := x86_64_netberg_aurora_620_rangeley
include $(BUILDER)/definemodule.mk

9
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/make.mk Executable file
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###############################################################################
#
# x86_64_netberg_aurora_620_rangeley Autogeneration
#
###############################################################################
x86_64_netberg_aurora_620_rangeley_AUTO_DEFS := module/auto/x86_64_netberg_aurora_620_rangeley.yml
x86_64_netberg_aurora_620_rangeley_AUTO_DIRS := module/inc/x86_64_netberg_aurora_620_rangeley module/src
include $(BUILDER)/auto.mk

114
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/x86_64_netberg_aurora_620_rangeley.yml Executable file
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###############################################################################
#
# x86_64_netberg_aurora_620_rangeley Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB
- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD:
doc: "RPM Threshold at which the fan is considered to have failed."
default: 3000
definitions:
cdefs:
X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_netberg_aurora_620_rangeley_config
enum: &enums
fan_id:
members:
- FAN1 : 1
- FAN2 : 2
- FAN3 : 3
- FAN4 : 4
- FAN5 : 5
- FAN6 : 6
- FAN7 : 7
- FAN8 : 8
- FAN9 : 9
- FAN10 : 10
fan_oid:
members:
- FAN1 : ONLP_FAN_ID_CREATE(1)
- FAN2 : ONLP_FAN_ID_CREATE(2)
- FAN3 : ONLP_FAN_ID_CREATE(3)
- FAN4 : ONLP_FAN_ID_CREATE(4)
- FAN5 : ONLP_FAN_ID_CREATE(5)
- FAN6 : ONLP_FAN_ID_CREATE(6)
- FAN7 : ONLP_FAN_ID_CREATE(7)
- FAN8 : ONLP_FAN_ID_CREATE(8)
- FAN9 : ONLP_FAN_ID_CREATE(9)
- FAN10 : ONLP_FAN_ID_CREATE(10)
psu_id:
members:
- PSU1 : 1
- PSU2 : 2
psu_oid:
members:
- PSU1 : ONLP_PSU_ID_CREATE(1)
- PSU2 : ONLP_PSU_ID_CREATE(2)
thermal_id:
members:
- THERMAL1 : 1
- THERMAL2 : 2
- THERMAL3 : 3
- THERMAL4 : 4
- THERMAL5 : 5
- THERMAL6 : 6
- THERMAL7 : 7
thermal_oid:
members:
- THERMAL1 : ONLP_THERMAL_ID_CREATE(1)
- THERMAL2 : ONLP_THERMAL_ID_CREATE(2)
- THERMAL3 : ONLP_THERMAL_ID_CREATE(3)
- THERMAL4 : ONLP_THERMAL_ID_CREATE(4)
- THERMAL5 : ONLP_THERMAL_ID_CREATE(5)
- THERMAL6 : ONLP_THERMAL_ID_CREATE(6)
- THERMAL7 : ONLP_THERMAL_ID_CREATE(7)
led_id:
members:
- STAT : 1
led_oid:
members:
- STAT : ONLP_LED_ID_CREATE(1)
portingmacro:
X86_64_NETBERG_AURORA_620_RANGELEY:
macros:
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

14
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley.x Executable file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

135
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h Executable file
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/**************************************************************************//**
*
* @file
* @brief x86_64_netberg_aurora_620_rangeley Configuration Header
*
* @addtogroup x86_64_netberg_aurora_620_rangeley-config
* @{
*
*****************************************************************************/
#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_H__
#define __X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_INCLUDE_CUSTOM_CONFIG
#include <x86_64_netberg_aurora_620_rangeley_custom_config.h>
#endif
/* <auto.start.cdefs(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING
#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT
#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT
#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB
#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB 1
#endif
/**
* X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB
#endif
/**
* X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI
#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI 0
#endif
/**
* X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
*
* RPM Threshold at which the fan is considered to have failed. */
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_netberg_aurora_620_rangeley_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_netberg_aurora_620_rangeley_config_settings_t;
/** Configuration settings table. */
/** x86_64_netberg_aurora_620_rangeley_config_settings table. */
extern x86_64_netberg_aurora_620_rangeley_config_settings_t x86_64_netberg_aurora_620_rangeley_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_netberg_aurora_620_rangeley_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_netberg_aurora_620_rangeley_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_HEADER).header> */
#include "x86_64_netberg_aurora_620_rangeley_porting.h"
#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_H__ */
/* @} */

26
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_dox.h Executable file
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/**************************************************************************//**
*
* x86_64_netberg_aurora_620_rangeley Doxygen Header
*
*****************************************************************************/
#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_DOX_H__
#define __X86_64_NETBERG_AURORA_620_RANGELEY_DOX_H__
/**
* @defgroup x86_64_netberg_aurora_620_rangeley x86_64_netberg_aurora_620_rangeley - x86_64_netberg_aurora_620_rangeley Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_netberg_aurora_620_rangeley-x86_64_netberg_aurora_620_rangeley Public Interface
* @defgroup x86_64_netberg_aurora_620_rangeley-config Compile Time Configuration
* @defgroup x86_64_netberg_aurora_620_rangeley-porting Porting Macros
*
* @}
*
*/
#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_DOX_H__ */

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packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_porting.h Executable file
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/**************************************************************************//**
*
* @file
* @brief x86_64_netberg_aurora_620_rangeley Porting Macros.
*
* @addtogroup x86_64_netberg_aurora_620_rangeley-porting
* @{
*
*****************************************************************************/
#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_PORTING_H__
#define __X86_64_NETBERG_AURORA_620_RANGELEY_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET
#if defined(GLOBAL_MEMSET)
#define X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET GLOBAL_MEMSET
#elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET memset
#else
#error The macro X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY GLOBAL_MEMCPY
#elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY memcpy
#else
#error The macro X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY GLOBAL_STRNCPY
#elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY strncpy
#else
#error The macro X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF GLOBAL_VSNPRINTF
#elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF vsnprintf
#else
#error The macro X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF GLOBAL_SNPRINTF
#elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF snprintf
#else
#error The macro X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN
#if defined(GLOBAL_STRLEN)
#define X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN GLOBAL_STRLEN
#elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN strlen
#else
#error The macro X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_PORTING_H__ */
/* @} */

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packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/make.mk Executable file
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###############################################################################
#
#
#
###############################################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_netberg_aurora_620_rangeley_INCLUDES := -I $(THIS_DIR)inc
x86_64_netberg_aurora_620_rangeley_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_netberg_aurora_620_rangeley_DEPENDMODULE_ENTRIES := init:x86_64_netberg_aurora_620_rangeley ucli:x86_64_netberg_aurora_620_rangeley

9
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/Makefile Executable file
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###############################################################################
#
# Local source generation targets.
#
###############################################################################
ucli:
@../../../../tools/uclihandlers.py x86_64_netberg_aurora_620_rangeley_ucli.c

234
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h>
#include <onlp/platformi/fani.h>
#include "x86_64_netberg_aurora_620_rangeley_int.h"
#include "x86_64_netberg_aurora_620_rangeley_log.h"
#include <onlplib/file.h>
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_FAN(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static int
sys_fan_info_get__(onlp_fan_info_t* info, int id)
{
int value = 0;
int rv;
rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_abs", ((id/2)+1));
if (rv != ONLP_STATUS_OK)
return rv;
if (value == 0)
{
info->status = ONLP_FAN_STATUS_FAILED;
}
else
{
info->status = ONLP_FAN_STATUS_PRESENT;
rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_dir", ((id/2)+1));
if (rv != ONLP_STATUS_OK)
return rv;
if (value == 1)
{
info->status |= ONLP_FAN_STATUS_B2F;
info->caps |= ONLP_FAN_CAPS_B2F;
}
else
{
info->status |= ONLP_FAN_STATUS_F2B;
info->caps |= ONLP_FAN_CAPS_F2B;
}
rv = onlp_file_read_int(&(info->rpm), SYS_HWMON1_PREFIX "/fan%d_rpm", (id+1));
if (rv == ONLP_STATUS_E_INTERNAL)
return rv;
if (rv == ONLP_STATUS_E_MISSING)
{
info->status &= ~1;
return 0;
}
if (info->rpm <= X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD)
info->status |= ONLP_FAN_STATUS_FAILED;
rv = onlp_file_read_int(&(info->percentage), SYS_HWMON1_PREFIX "/fan%d_duty", (id+1));
if (rv == ONLP_STATUS_E_INTERNAL)
return rv;
if (rv == ONLP_STATUS_E_MISSING)
{
info->status &= ~1;
return 0;
}
}
return 0;
}
static int
psu_fan_info_get__(onlp_fan_info_t* info, int id)
{
return onlp_file_read_int(&(info->rpm), SYS_HWMON2_PREFIX "/psu%d_fan_speed", id);
}
/* Onboard Fans */
static onlp_fan_info_t fans__[] = {
{ }, /* Not used */
{ { FAN_OID_FAN1, "Fan1_rotor1", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN2, "Fan1_rotor2", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN3, "Fan2_rotor1", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN4, "Fan2_rotor2", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN5, "Fan3_rotor1", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN6, "Fan3_rotor2", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN7, "Fan4_rotor1", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN8, "Fan4_rotor2", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN9, "PSU-1 Fan", 0 }, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN10, "PSU-2 Fan", 0 }, ONLP_FAN_STATUS_PRESENT },
};
/*
* This function will be called prior to all of onlp_fani_* functions.
*/
int
onlp_fani_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
{
int fid;
VALIDATE(id);
memset(info, 0, sizeof(onlp_fan_info_t));
fid = ONLP_OID_ID_GET(id);
*info = fans__[fid];
info->caps |= ONLP_FAN_CAPS_GET_RPM;
switch(fid)
{
case FAN_ID_FAN1:
case FAN_ID_FAN2:
case FAN_ID_FAN3:
case FAN_ID_FAN4:
case FAN_ID_FAN5:
case FAN_ID_FAN6:
case FAN_ID_FAN7:
case FAN_ID_FAN8:
return sys_fan_info_get__(info, (fid - 1));
break;
case FAN_ID_FAN9:
case FAN_ID_FAN10:
return psu_fan_info_get__(info, (fid - FAN_ID_FAN9 + 1));
break;
default:
return ONLP_STATUS_E_INVALID;
break;
}
return ONLP_STATUS_E_INVALID;
}
/*
* This function sets the speed of the given fan in RPM.
*
* This function will only be called if the fan supprots the RPM_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_rpm_set(onlp_oid_t id, int rpm)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan speed of the given OID as a percentage.
*
* This will only be called if the OID has the PERCENTAGE_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_percentage_set(onlp_oid_t id, int p)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan speed of the given OID as per
* the predefined ONLP fan speed modes: off, slow, normal, fast, max.
*
* Interpretation of these modes is up to the platform.
*
*/
int
onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan direction of the given OID.
*
* This function is only relevant if the fan OID supports both direction
* capabilities.
*
* This function is optional unless the functionality is available.
*/
int
onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Generic fan ioctl. Optional.
*/
int
onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

165
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/ledi.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2013 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/ledi.h>
#include <onlplib/file.h>
#include "x86_64_netberg_aurora_620_rangeley_int.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_LED(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
/* LED related data
*/
enum led_light_mode { /*must be the same with the definition @ kernel driver */
LED_MODE_OFF = 0,
LED_MODE_AMBER,
LED_MODE_GREEN,
};
int led_light_map_mode[][2] =
{
{LED_MODE_OFF, ONLP_LED_MODE_OFF},
{LED_MODE_AMBER, ONLP_LED_MODE_ORANGE},
{LED_MODE_GREEN, ONLP_LED_MODE_GREEN},
};
/*
* Get the information for the given LED OID.
*/
static onlp_led_info_t linfo[] =
{
{ }, /* Not used */
{
{ LED_OID_LED1, "Chassis LED 1 (STAT LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN,
ONLP_LED_MODE_OFF,
},
};
static int conver_led_light_mode_to_driver(int led_ligth_mode)
{
int i, nsize = sizeof(led_light_map_mode)/sizeof(led_light_map_mode[0]);
for(i=0; i<nsize; i++)
{
if (led_ligth_mode == led_light_map_mode[i][1])
{
return led_light_map_mode[i][0];
}
}
return 0;
}
/*
* This function will be called prior to any other onlp_ledi_* functions.
*/
int
onlp_ledi_init(void)
{
/*
* Turn on the STAT LEDs at startup
*/
onlp_ledi_mode_set(LED_OID_LED1, ONLP_LED_MODE_GREEN);
return ONLP_STATUS_OK;
}
int
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
{
int local_id;
VALIDATE(id);
memset(info, 0, sizeof(onlp_led_info_t));
local_id = ONLP_OID_ID_GET(id);
*info = linfo[local_id];
return ONLP_STATUS_OK;
}
/*
* Turn an LED on or off.
*
* This function will only be called if the LED OID supports the ONOFF
* capability.
*
* What 'on' means in terms of colors or modes for multimode LEDs is
* up to the platform to decide. This is intended as baseline toggle mechanism.
*/
int
onlp_ledi_set(onlp_oid_t id, int on_or_off)
{
VALIDATE(id);
if (!on_or_off)
return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF);
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function puts the LED into the given mode. It is a more functional
* interface for multimode LEDs.
*
* Only modes reported in the LED's capabilities will be attempted.
*/
int
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
{
int local_id;
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
switch(local_id)
{
case LED_ID_LED1:
linfo[local_id].status = ONLP_LED_STATUS_PRESENT;
if (mode != ONLP_LED_MODE_OFF)
linfo[local_id].status |= ONLP_LED_STATUS_ON;
linfo[local_id].mode = mode;
return onlp_file_write_int(conver_led_light_mode_to_driver(mode), SYS_HWMON2_PREFIX "/system_led");
break;
default:
return ONLP_STATUS_E_INVALID;
break;
}
return ONLP_STATUS_E_INVALID;
}
/*
* Generic LED ioctl interface.
*/
int
onlp_ledi_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

9
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/make.mk Executable file
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###############################################################################
#
#
#
###############################################################################
LIBRARY := x86_64_netberg_aurora_620_rangeley
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
include $(BUILDER)/lib.mk

201
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/psui.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h>
#include <onlp/platformi/psui.h>
#include <onlplib/file.h>
#include "x86_64_netberg_aurora_620_rangeley_int.h"
#include "x86_64_netberg_aurora_620_rangeley_log.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_PSU(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static onlp_psu_info_t psus__[] = {
{ }, /* Not used */
{
{
PSU_OID_PSU1,
"PSU-1",
0,
{
FAN_OID_FAN9,
},
}
},
{
{
PSU_OID_PSU2,
"PSU-2",
0,
{
FAN_OID_FAN10,
},
}
},
};
/*
* This function will be called prior to any other onlp_psui functions.
*/
int
onlp_psui_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
{
int rv;
int pid;
uint8_t data[256];
int value = -1;
int len;
double dvalue;
int i;
VALIDATE(id);
memset(info, 0, sizeof(onlp_psu_info_t));
pid = ONLP_OID_ID_GET(id);
*info = psus__[pid];
rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_abs", pid);
if (rv != ONLP_STATUS_OK)
return rv;
if (value == 0)
{
info->status = ONLP_PSU_STATUS_UNPLUGGED;
return ONLP_STATUS_OK;
}
/* PSU is present. */
info->status = ONLP_PSU_STATUS_PRESENT;
memset(data, 0, sizeof(data));
rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid);
if (rv == ONLP_STATUS_OK)
{
i = 11;
/* Manufacturer Name */
len = (data[i]&0x0f);
i++;
i += len;
/* Product Name */
len = (data[i]&0x0f);
i++;
memcpy(info->model, (char *) &(data[i]), len);
i += len;
/* Product part,model number */
len = (data[i]&0x0f);
i++;
i += len;
/* Product Version */
len = (data[i]&0x0f);
i++;
i += len;
/* Product Serial Number */
len = (data[i]&0x0f);
i++;
memcpy(info->serial, (char *) &(data[i]), len);
}
else
{
strcpy(info->model, "Missing");
strcpy(info->serial, "Missing");
}
info->caps |= ONLP_PSU_CAPS_AC;
#if 0
/* PSU is powered. */
rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_pg", pid);
if (rv != ONLP_STATUS_OK)
return rv;
if (value == 0)
{
info->status |= ONLP_PSU_STATUS_FAILED;
return ONLP_STATUS_OK;
}
#endif
memset(data, 0, sizeof(data));
rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid);
if (rv == ONLP_STATUS_OK)
{
dvalue = atof((const char *)data);
if (dvalue > 0.0)
{
info->caps |= ONLP_PSU_CAPS_IOUT;
info->miout = (int)(dvalue * 1000);
}
}
memset(data, 0, sizeof(data));
rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid);
if (rv == ONLP_STATUS_OK)
{
dvalue = atof((const char *)data);
if (dvalue > 0.0)
{
info->caps |= ONLP_PSU_CAPS_VOUT;
info->mvout = (int)(dvalue * 1000);
}
}
memset(data, 0, sizeof(data));
rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid);
if (rv == ONLP_STATUS_OK)
{
dvalue = atof((const char *)data);
if (dvalue > 0.0)
{
info->caps |= ONLP_PSU_CAPS_PIN;
info->mpin = (int)(dvalue * 1000);
}
}
memset(data, 0, sizeof(data));
rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid);
if (rv == ONLP_STATUS_OK)
{
dvalue = atof((const char *)data);
if (dvalue > 0.0)
{
info->caps |= ONLP_PSU_CAPS_POUT;
info->mpout = (int)(dvalue * 1000);
}
}
return ONLP_STATUS_OK;
}
/*
* This is an optional generic ioctl() interface.
* Its purpose is to allow future expansion and
* custom functionality that is not otherwise exposed
* in the standard interface.
*
* The semantics of this function are platform specific.
* This function is completely optional.
*/
int
onlp_psui_ioctl(onlp_oid_t pid, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

389
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sfpi.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* SFPI Interface for the Aurora 620 Platform
*
***********************************************************/
#include <x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h>
#include <onlp/oids.h>
#include <onlp/platformi/sfpi.h>
#include <onlplib/file.h>
#include <onlplib/sfp.h>
#include "x86_64_netberg_aurora_620_rangeley_int.h"
#include "x86_64_netberg_aurora_620_rangeley_log.h"
#include <unistd.h>
#include <fcntl.h>
/* Model ID Definition */
typedef enum
{
HURACAN_WITH_BMC = 0x0,
HURACAN_WITHOUT_BMC,
CABRERAIII_WITH_BMC,
CABRERAIII_WITHOUT_BMC,
SESTO_WITH_BMC,
SESTO_WITHOUT_BMC,
NCIIX_WITH_BMC,
NCIIX_WITHOUT_BMC,
ASTERION_WITH_BMC,
ASTERION_WITHOUT_BMC,
HURACAN_A_WITH_BMC,
HURACAN_A_WITHOUT_BMC,
MODEL_ID_LAST
} modelId_t;
static int
onlp_board_model_id_get(void)
{
static int board_model_id = MODEL_ID_LAST;
if (board_model_id == MODEL_ID_LAST)
{
if (onlp_file_read_int(&board_model_id, SYS_HWMON1_PREFIX "/board_model_id") != ONLP_STATUS_OK)
return 0;
}
return board_model_id;
}
/*
* This function will be called prior to all other onlp_sfpi_* functions.
*/
int
onlp_sfpi_init(void)
{
return ONLP_STATUS_OK;
}
/*
* This function should populate the give bitmap with
* all valid, SFP-capable port numbers.
*
* Only port numbers in this bitmap will be queried by the the
* ONLP framework.
*
* No SFPI functions will be called with ports that are
* not in this bitmap. You can ignore all error checking
* on the incoming ports defined in this interface.
*/
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
int p;
int total_port = 0;
int board_model_id = onlp_board_model_id_get();
switch (board_model_id)
{
case HURACAN_WITH_BMC:
case HURACAN_WITHOUT_BMC:
case HURACAN_A_WITH_BMC:
case HURACAN_A_WITHOUT_BMC:
total_port = 32;
break;
case SESTO_WITH_BMC:
case SESTO_WITHOUT_BMC:
case NCIIX_WITH_BMC:
case NCIIX_WITHOUT_BMC:
total_port = 54;
break;
case ASTERION_WITH_BMC:
case ASTERION_WITHOUT_BMC:
total_port = 64;
break;
default:
break;
}
AIM_BITMAP_CLR_ALL(bmap);
for(p = 0; p < total_port; p++)
AIM_BITMAP_SET(bmap, p);
return ONLP_STATUS_OK;
}
/*
* This function should return whether an SFP is inserted on the given
* port.
*
* Returns 1 if the SFP is present.
* Returns 0 if the SFP is not present.
* Returns ONLP_E_* if there was an error determining the status.
*/
int
onlp_sfpi_is_present(int port)
{
int value = 0;
onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/port_%d_abs", (port+1));
return value;
}
int
onlp_sfpi_port_map(int port, int* rport)
{
int board_model_id = onlp_board_model_id_get();
switch (board_model_id)
{
case HURACAN_WITH_BMC:
case HURACAN_WITHOUT_BMC:
case HURACAN_A_WITH_BMC:
case HURACAN_A_WITHOUT_BMC:
/* odd <=> even */
if (port & 0x1)
*rport = (port - 1);
else
*rport = (port + 1);
break;
default:
*rport = port; break;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
int p;
int total_port = 0;
int board_model_id = onlp_board_model_id_get();
switch (board_model_id)
{
case SESTO_WITH_BMC:
case SESTO_WITHOUT_BMC:
case NCIIX_WITH_BMC:
case NCIIX_WITHOUT_BMC:
case ASTERION_WITH_BMC:
case ASTERION_WITHOUT_BMC:
total_port = 48;
break;
default:
break;
}
AIM_BITMAP_CLR_ALL(bmap);
for(p = 0; p < total_port; p++)
AIM_BITMAP_SET(bmap, p);
return ONLP_STATUS_OK;
}
/*
* This function reads the SFPs idrom and returns in
* in the data buffer provided.
*/
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
int rv = ONLP_STATUS_OK;
char fname[128];
memset(data, 0, 256);
memset(fname, 0, sizeof(fname));
sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a0", (port+1));
rv = onlplib_sfp_eeprom_read_file(fname, data);
if (rv != ONLP_STATUS_OK)
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
return rv;
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
int rv = ONLP_STATUS_OK;
char fname[128];
memset(data, 0, 256);
memset(fname, 0, sizeof(fname));
sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a2", (port+1));
rv = onlplib_sfp_eeprom_read_file(fname, data);
if (rv != ONLP_STATUS_OK)
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
return rv;
}
/*
* Manually enable or disable the given SFP.
*
*/
int
onlp_sfpi_enable_set(int port, int enable)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Returns whether the SFP is currently enabled or disabled.
*/
int
onlp_sfpi_enable_get(int port, int* enable)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* If the platform requires any setup or equalizer modifications
* based on the actual SFP that was inserted then that custom
* setup should be performed here.
*
* After a new SFP is detected by the ONLP framework this
* function will be called to perform the (optional) setup.
*/
int
onlp_sfpi_post_insert(int port, sff_info_t* sff_info)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Return the current status of the SFP.
* See onlp_sfp_status_t;
*/
int
onlp_sfpi_status_get(int port, uint32_t* status)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* supported)
{
if (supported == NULL)
return ONLP_STATUS_E_PARAM;
*supported = 0;
switch (control)
{
case ONLP_SFP_CONTROL_TX_DISABLE:
case ONLP_SFP_CONTROL_RX_LOS:
{
int board_model_id = onlp_board_model_id_get();
switch (board_model_id)
{
case SESTO_WITH_BMC:
case SESTO_WITHOUT_BMC:
case NCIIX_WITH_BMC:
case NCIIX_WITHOUT_BMC:
case ASTERION_WITH_BMC:
case ASTERION_WITHOUT_BMC:
if (port < 48)
*supported = 1;
break;
default:
break;
}
}
break;
default:
break;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
{
int rv = ONLP_STATUS_OK;
int supported = 0;
if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0))
return ONLP_STATUS_E_UNSUPPORTED;
switch (control)
{
case ONLP_SFP_CONTROL_TX_DISABLE:
rv = onlp_file_write_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1));
break;
default:
break;
}
return rv;
}
int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
{
int rv = ONLP_STATUS_OK;
int supported = 0;
if (value == NULL)
return ONLP_STATUS_E_PARAM;
if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0))
return ONLP_STATUS_E_UNSUPPORTED;
*value = 0;
switch (control)
{
case ONLP_SFP_CONTROL_RX_LOS:
rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_rxlos", (port+1));
break;
case ONLP_SFP_CONTROL_TX_DISABLE:
rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1));
break;
default:
break;
}
return rv;
}
/*
* This is a generic ioctl interface.
*/
int
onlp_sfpi_ioctl(int port, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* De-initialize the SFPI subsystem.
*/
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}

98
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/sysi.h>
#include <onlplib/file.h>
#include "x86_64_netberg_aurora_620_rangeley_int.h"
#include "x86_64_netberg_aurora_620_rangeley_log.h"
/*
* This is the first function called by the ONLP framework.
*
* It should return the name of your platform driver.
*
* If the name of your platform driver is the same as the
* current platform then this driver will be used.
*
* If the name of the driver is different from the current
* platform, or the driver is capable of supporting multiple
* platform variants, see onlp_sysi_platform_set() below.
*/
const char*
onlp_sysi_platform_get(void)
{
return "x86-64-netberg-aurora-620-rangeley-r0";
}
/*
* This is the first function the ONLP framework will call
* after it has validated the the platform is supported using the mechanisms
* described above.
*
* If this function does not return ONL_STATUS_OK
* then platform initialization is aborted.
*/
int
onlp_sysi_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_sysi_onie_info_get(onlp_onie_info_t* onie)
{
int rv;
uint8_t data[256];
int len;
memset(data, 0, sizeof(data));
rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/eeprom");
if (rv == ONLP_STATUS_OK)
{
rv = onlp_onie_decode(onie, (uint8_t*)data, sizeof(data));
if(rv >= 0)
{
onie->platform_name = aim_strdup("x86-64-netberg-aurora-620-rangeley-r0");
}
}
return rv;
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
int i;
int n_thermal=7, n_fan=10, n_led=1;
/* 2 PSUs */
*e++ = ONLP_PSU_ID_CREATE(1);
*e++ = ONLP_PSU_ID_CREATE(2);
/* LEDs Item */
for (i=1; i<=n_led; i++)
{
*e++ = ONLP_LED_ID_CREATE(i);
}
/* THERMALs Item */
for (i=1; i<=n_thermal; i++)
{
*e++ = ONLP_THERMAL_ID_CREATE(i);
}
/* Fans Item */
for (i=1; i<=n_fan; i++)
{
*e++ = ONLP_FAN_ID_CREATE(i);
}
return 0;
}

173
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/thermali.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/thermali.h>
#include <onlplib/file.h>
#include "x86_64_netberg_aurora_620_rangeley_int.h"
#include "x86_64_netberg_aurora_620_rangeley_log.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_THERMAL(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static int
sys_thermal_info_get__(onlp_thermal_info_t* info, int id)
{
int rv;
if (id == THERMAL_ID_THERMAL3)
{
rv = onlp_file_read_int(&info->mcelsius, SYS_HWMON1_PREFIX "/mac_temp");
info->mcelsius *= 1000;
}
else
{
uint8_t buffer[64];
double dvalue;
int len;
memset(buffer, 0, sizeof(buffer));
rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON1_PREFIX "/remote_temp%d", id);
if (rv == ONLP_STATUS_OK)
{
dvalue = atof((const char *)buffer);
info->mcelsius = (int)(dvalue * 1000);
}
}
if(rv == ONLP_STATUS_E_INTERNAL)
return rv;
if(rv == ONLP_STATUS_E_MISSING)
{
info->status &= ~1;
return ONLP_STATUS_OK;
}
return ONLP_STATUS_OK;
}
static int
psu1_thermal_info_get__(onlp_thermal_info_t* info, int id)
{
int rv;
uint8_t buffer[64];
double dvalue;
int len;
memset(buffer, 0, sizeof(buffer));
rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu1_temp_%d", id);
if (rv == ONLP_STATUS_OK)
{
dvalue = atof((const char *)buffer);
info->mcelsius = (int)(dvalue * 1000);
}
return rv;
}
static int
psu2_thermal_info_get__(onlp_thermal_info_t* info, int id)
{
int rv;
uint8_t buffer[64];
double dvalue;
int len;
memset(buffer, 0, sizeof(buffer));
rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu2_temp_%d", id);
if (rv == ONLP_STATUS_OK)
{
dvalue = atof((const char *)buffer);
info->mcelsius = (int)(dvalue * 1000);
}
return rv;
}
static onlp_thermal_info_t temps__[] =
{
{ }, /* Not used */
{ { THERMAL_OID_THERMAL1, "Chassis Thermal 1 (Front of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
{ { THERMAL_OID_THERMAL2, "Chassis Thermal 2 (Rear of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
{ { THERMAL_OID_THERMAL3, "Chassis Thermal 3 (MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
{ { THERMAL_OID_THERMAL4, "PSU-1 Thermal 1", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
{ { THERMAL_OID_THERMAL5, "PSU-1 Thermal 2", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
{ { THERMAL_OID_THERMAL6, "PSU-2 Thermal 1", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
{ { THERMAL_OID_THERMAL7, "PSU-2 Thermal 2", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
};
/*
* This will be called to intiialize the thermali subsystem.
*/
int
onlp_thermali_init(void)
{
return ONLP_STATUS_OK;
}
/*
* Retrieve the information structure for the given thermal OID.
*
* If the OID is invalid, return ONLP_E_STATUS_INVALID.
* If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
* Otherwise, return ONLP_STATUS_OK with the OID's information.
*
* Note -- it is expected that you fill out the information
* structure even if the sensor described by the OID is not present.
*/
int
onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
{
int tid;
VALIDATE(id);
memset(info, 0, sizeof(onlp_thermal_info_t));
tid = ONLP_OID_ID_GET(id);
*info = temps__[tid];
switch(tid)
{
case THERMAL_ID_THERMAL1:
case THERMAL_ID_THERMAL2:
case THERMAL_ID_THERMAL3:
return sys_thermal_info_get__(info, tid);
case THERMAL_ID_THERMAL4:
case THERMAL_ID_THERMAL5:
return psu1_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL4 + 1));
case THERMAL_ID_THERMAL6:
case THERMAL_ID_THERMAL7:
return psu2_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL6 + 1));
}
return ONLP_STATUS_E_INVALID;
}

80
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_config.c Executable file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h>
/* <auto.start.cdefs(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_HEADER).source> */
#define __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(_x) #_x
#define __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(_x) __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(_x)
x86_64_netberg_aurora_620_rangeley_config_settings_t x86_64_netberg_aurora_620_rangeley_config_settings[] =
{
#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING
{ __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING) },
#else
{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT
{ __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT) },
#else
{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT
{ __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT) },
#else
{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
{ __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
#else
{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB
{ __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB) },
#else
{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
{ __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
#else
{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI
{ __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI) },
#else
{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
{ __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) },
#else
{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
{ NULL, NULL }
};
#undef __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE
#undef __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME
const char*
x86_64_netberg_aurora_620_rangeley_config_lookup(const char* setting)
{
int i;
for(i = 0; x86_64_netberg_aurora_620_rangeley_config_settings[i].name; i++) {
if(strcmp(x86_64_netberg_aurora_620_rangeley_config_settings[i].name, setting)) {
return x86_64_netberg_aurora_620_rangeley_config_settings[i].value;
}
}
return NULL;
}
int
x86_64_netberg_aurora_620_rangeley_config_show(struct aim_pvs_s* pvs)
{
int i;
for(i = 0; x86_64_netberg_aurora_620_rangeley_config_settings[i].name; i++) {
aim_printf(pvs, "%s = %s\n", x86_64_netberg_aurora_620_rangeley_config_settings[i].name, x86_64_netberg_aurora_620_rangeley_config_settings[i].value);
}
return i;
}
/* <auto.end.cdefs(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_HEADER).source> */

10
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_enums.c Executable file
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@@ -0,0 +1,10 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h>
/* <--auto.start.enum(ALL).source> */
/* <auto.end.enum(ALL).source> */

239
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_int.h Executable file
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@@ -0,0 +1,239 @@
/**************************************************************************//**
*
* x86_64_netberg_aurora_620_rangeley Internal Header
*
*****************************************************************************/
#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_INT_H__
#define __X86_64_NETBERG_AURORA_620_RANGELEY_INT_H__
#include <x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h>
#include <limits.h>
/* <auto.start.enum(ALL).header> */
/** thermal_oid */
typedef enum thermal_oid_e {
THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1),
THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2),
THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3),
THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4),
THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5),
THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6),
THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7),
THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8),
THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9),
THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10),
} thermal_oid_t;
/** Enum names. */
const char* thermal_oid_name(thermal_oid_t e);
/** Enum values. */
int thermal_oid_value(const char* str, thermal_oid_t* e, int substr);
/** Enum descriptions. */
const char* thermal_oid_desc(thermal_oid_t e);
/** Enum validator. */
int thermal_oid_valid(thermal_oid_t e);
/** validator */
#define THERMAL_OID_VALID(_e) \
(thermal_oid_valid((_e)))
/** thermal_oid_map table. */
extern aim_map_si_t thermal_oid_map[];
/** thermal_oid_desc_map table. */
extern aim_map_si_t thermal_oid_desc_map[];
/** thermal_id */
typedef enum thermal_id_e {
THERMAL_ID_THERMAL1 = 1,
THERMAL_ID_THERMAL2 = 2,
THERMAL_ID_THERMAL3 = 3,
THERMAL_ID_THERMAL4 = 4,
THERMAL_ID_THERMAL5 = 5,
THERMAL_ID_THERMAL6 = 6,
THERMAL_ID_THERMAL7 = 7,
THERMAL_ID_THERMAL8 = 8,
THERMAL_ID_THERMAL9 = 9,
THERMAL_ID_THERMAL10 = 10,
} thermal_id_t;
/** Enum names. */
const char* thermal_id_name(thermal_id_t e);
/** Enum values. */
int thermal_id_value(const char* str, thermal_id_t* e, int substr);
/** Enum descriptions. */
const char* thermal_id_desc(thermal_id_t e);
/** Enum validator. */
int thermal_id_valid(thermal_id_t e);
/** validator */
#define THERMAL_ID_VALID(_e) \
(thermal_id_valid((_e)))
/** thermal_id_map table. */
extern aim_map_si_t thermal_id_map[];
/** thermal_id_desc_map table. */
extern aim_map_si_t thermal_id_desc_map[];
/** psu_oid */
typedef enum psu_oid_e {
PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1),
PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2),
} psu_oid_t;
/** Enum names. */
const char* psu_oid_name(psu_oid_t e);
/** Enum values. */
int psu_oid_value(const char* str, psu_oid_t* e, int substr);
/** Enum descriptions. */
const char* psu_oid_desc(psu_oid_t e);
/** Enum validator. */
int psu_oid_valid(psu_oid_t e);
/** validator */
#define PSU_OID_VALID(_e) \
(psu_oid_valid((_e)))
/** psu_oid_map table. */
extern aim_map_si_t psu_oid_map[];
/** psu_oid_desc_map table. */
extern aim_map_si_t psu_oid_desc_map[];
/** psu_id */
typedef enum psu_id_e {
PSU_ID_PSU1 = 1,
PSU_ID_PSU2 = 2,
} psu_id_t;
/** Enum names. */
const char* psu_id_name(psu_id_t e);
/** Enum values. */
int psu_id_value(const char* str, psu_id_t* e, int substr);
/** Enum descriptions. */
const char* psu_id_desc(psu_id_t e);
/** Enum validator. */
int psu_id_valid(psu_id_t e);
/** validator */
#define PSU_ID_VALID(_e) \
(psu_id_valid((_e)))
/** psu_id_map table. */
extern aim_map_si_t psu_id_map[];
/** psu_id_desc_map table. */
extern aim_map_si_t psu_id_desc_map[];
/** fan_oid */
typedef enum fan_oid_e {
FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1),
FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2),
FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3),
FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4),
FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5),
FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6),
FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7),
FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8),
FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9),
FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10),
} fan_oid_t;
/** Enum names. */
const char* fan_oid_name(fan_oid_t e);
/** Enum values. */
int fan_oid_value(const char* str, fan_oid_t* e, int substr);
/** Enum descriptions. */
const char* fan_oid_desc(fan_oid_t e);
/** Enum validator. */
int fan_oid_valid(fan_oid_t e);
/** validator */
#define FAN_OID_VALID(_e) \
(fan_oid_valid((_e)))
/** fan_oid_map table. */
extern aim_map_si_t fan_oid_map[];
/** fan_oid_desc_map table. */
extern aim_map_si_t fan_oid_desc_map[];
/** fan_id */
typedef enum fan_id_e {
FAN_ID_FAN1 = 1,
FAN_ID_FAN2 = 2,
FAN_ID_FAN3 = 3,
FAN_ID_FAN4 = 4,
FAN_ID_FAN5 = 5,
FAN_ID_FAN6 = 6,
FAN_ID_FAN7 = 7,
FAN_ID_FAN8 = 8,
FAN_ID_FAN9 = 9,
FAN_ID_FAN10 = 10,
} fan_id_t;
/** Enum names. */
const char* fan_id_name(fan_id_t e);
/** Enum values. */
int fan_id_value(const char* str, fan_id_t* e, int substr);
/** Enum descriptions. */
const char* fan_id_desc(fan_id_t e);
/** Enum validator. */
int fan_id_valid(fan_id_t e);
/** validator */
#define FAN_ID_VALID(_e) \
(fan_id_valid((_e)))
/** fan_id_map table. */
extern aim_map_si_t fan_id_map[];
/** fan_id_desc_map table. */
extern aim_map_si_t fan_id_desc_map[];
/** led_oid */
typedef enum led_oid_e {
LED_OID_LED1 = ONLP_LED_ID_CREATE(1),
LED_OID_LED2 = ONLP_LED_ID_CREATE(2),
LED_OID_LED3 = ONLP_LED_ID_CREATE(3),
LED_OID_LED4 = ONLP_LED_ID_CREATE(4),
} led_oid_t;
/** led_id */
typedef enum led_id_e {
LED_ID_LED1 = 1,
LED_ID_LED2 = 2,
LED_ID_LED3 = 3,
LED_ID_LED4 = 4,
} led_id_t;
/* <auto.end.enum(ALL).header> */
/* psu info table */
struct psu_info_s {
char path[PATH_MAX];
int present;
int busno;
int addr;
};
#define SYS_HWMON1_PREFIX "/sys/class/hwmon/hwmon1/device"
#define SYS_HWMON2_PREFIX "/sys/class/hwmon/hwmon2/device"
#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_INT_H__ */

18
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.c Executable file
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@@ -0,0 +1,18 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h>
#include "x86_64_netberg_aurora_620_rangeley_log.h"
/*
* x86_64_netberg_aurora_620_rangeley log struct.
*/
AIM_LOG_STRUCT_DEFINE(
X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT,
X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT,
NULL, /* Custom log map */
X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
);

12
packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.h Executable file
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@@ -0,0 +1,12 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_LOG_H__
#define __X86_64_NETBERG_AURORA_620_RANGELEY_LOG_H__
#define AIM_LOG_MODULE_NAME x86_64_netberg_aurora_620_rangeley
#include <AIM/aim_log.h>
#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_LOG_H__ */

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