Edgcore 4.14 kernel patches for the AS4610.

This commit is contained in:
Jeffrey Townsend
2018-12-17 15:11:03 +00:00
parent 789324a016
commit de5a09c1d1
3 changed files with 114 additions and 0 deletions

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@@ -0,0 +1,86 @@
diff -urpN a/drivers/i2c/busses/xgs_iproc_smbus.c b/drivers/i2c/busses/xgs_iproc_smbus.c
--- a/drivers/i2c/busses/xgs_iproc_smbus.c 2018-12-17 15:00:29.412457650 +0000
+++ b/drivers/i2c/busses/xgs_iproc_smbus.c 2018-12-17 15:01:26.255275662 +0000
@@ -52,6 +52,8 @@
(regval & ~(mask)) | \
((fldval) << (startbit))
+//#define IPROC_SMB_DBG 1
+
typedef enum iproc_smb_clk_freq {
I2C_SPEED_100KHz = 0,
I2C_SPEED_400KHz = 1,
@@ -178,7 +180,7 @@ static int iproc_smb_set_clk_freq(void _
SETREGFLDVAL(regval, val, CCB_SMB_TIMGCFG_MODE400_MASK,
CCB_SMB_TIMGCFG_MODE400_SHIFT);
writel(regval, base_addr + CCB_SMB_TIMGCFG_REG);
-
+
return 0;
}
@@ -208,9 +210,20 @@ static int iproc_smbus_block_init(struct
udelay(100);
/* Set default clock frequency */
- if (of_property_read_u32(dn, "clock-frequency", &i2c_clk_freq))
- /*no property available, use default: 100KHz*/
- i2c_clk_freq = I2C_SPEED_100KHz;
+ if (of_property_read_u32(dn, "clock-frequency", &i2c_clk_freq)) {
+ /*no property available, use default: 100KHz*/
+ i2c_clk_freq = 100000;
+ }
+
+/* Edgecore patch */
+ if (i2c_clk_freq == 400000) {
+ dev_info(dev->dev, "bus set to %u Hz\n", i2c_clk_freq);
+ i2c_clk_freq = I2C_SPEED_400KHz;
+ } else {
+ dev_info(dev->dev, "bus set to %u Hz\n", 100000);
+ i2c_clk_freq = I2C_SPEED_100KHz;
+ }
+
iproc_smb_set_clk_freq(base_addr, i2c_clk_freq);
/* Disable intrs */
@@ -577,7 +590,9 @@ static int iproc_smb_data_send(struct i2
if (regval != MSTR_STS_XACT_SUCCESS) {
/* We can flush Tx FIFO here */
+#ifdef IPROC_SMB_DBG
dev_err(dev->dev, "Send: Error in transaction\n");
+#endif
return -EREMOTEIO;
}
}
@@ -662,7 +677,9 @@ static int iproc_smb_data_recv(struct i2
if (regval != MSTR_STS_XACT_SUCCESS) {
/* We can flush Tx FIFO here */
+#ifdef IPROC_SMB_DBG
dev_info(dev->dev, "Error in transaction\n");
+#endif
return -EREMOTEIO;
}
}
@@ -840,8 +857,10 @@ static int iproc_smb_xfer(struct i2c_ada
}
if (rc < 0) {
+#ifdef IPROC_SMB_DBG
dev_info(dev->dev, "%s error accessing\n",
(read_write == I2C_SMBUS_READ) ? "Read" : "Write");
+#endif
up(&dev->xfer_lock);
return -EREMOTEIO;
}
@@ -856,7 +875,8 @@ static int iproc_smb_xfer(struct i2c_ada
}
}
- msleep(1);
+ /* Edge-core comments out the sleep to speed up EEPROM dump */
+ //msleep(1);
up(&dev->xfer_lock);
return (rc);

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@@ -0,0 +1,26 @@
diff -urpN a/drivers/usb/phy/phy-xgs-iproc.c b/drivers/usb/phy/phy-xgs-iproc.c
--- a/drivers/usb/phy/phy-xgs-iproc.c 2018-12-17 14:49:55.121649311 +0000
+++ b/drivers/usb/phy/phy-xgs-iproc.c 2018-12-17 14:50:06.529412019 +0000
@@ -161,12 +161,22 @@ static int xgs_iproc_usb_phy_mode(struct
int usb_mode = IPROC_USB_MODE_HOST;
u32 __maybe_unused val;
int __maybe_unused gpio_pin, ret;
+ const char *phy_mode_str;
if (!wrap_base)
dev_warn(dev, "no wrap base addr");
if (of_device_is_compatible(dn, "brcm,usb-phy-hx4") ||
of_device_is_compatible(dn, "brcm,usb-phy-kt2")) {
+
+ /* Edge-core patch: use "usb-phy-mode" in dts to decide host/device mode */
+ if (!of_property_read_string(dn, "usb-phy-mode", &phy_mode_str)) {
+ if (!strcasecmp(phy_mode_str, "host"))
+ return IPROC_USB_MODE_HOST;
+ if (!strcasecmp(phy_mode_str, "device"))
+ return IPROC_USB_MODE_DEVICE;
+ }
+
/* gpio pin 4 to control host/device mode */
gpio_pin = of_get_named_gpio(dev->of_node, "usbdev-gpio", 0);

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@@ -1,3 +1,5 @@
brcm-iproc-4.14.patch
drivers-usb-phy-phy-xgs-iproc-usb-phy-mode.patch
drivers-i2c-busses-xgs_iproc_smbus-clk-freq.patch
0001-drivers-i2c-muxes-pca954x-deselect-on-exit.patch
0002-driver-support-intel-igb-bcm5461S-phy.patch