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ef598c9b01 |
@@ -1,6 +1,6 @@
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From 1a46aa106a50a06bfa4b669d87a8143c3d59f2f4 Mon Sep 17 00:00:00 2001
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From f117d369cecadedefd2eb1467d52e9df76c14dc6 Mon Sep 17 00:00:00 2001
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From: YenLin Pan <yenlin.pan@zyxel.com.tw>
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Date: Wed, 14 May 2025 14:14:22 +0800
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Date: Wed, 9 Jul 2025 14:46:13 +0800
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Subject: [PATCH] thermal: thermal setting
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lv0 -100 -hi0 105 -off0 0
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@@ -10,11 +10,11 @@ lv3 105 -hi3 120 -off3 100
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Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
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---
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drivers/net/wireless/ath/ath12k/thermal.h | 16 ++++++++--------
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1 file changed, 8 insertions(+), 8 deletions(-)
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drivers/net/wireless/ath/ath12k/thermal.h | 24 +++++++++++------------
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1 file changed, 12 insertions(+), 12 deletions(-)
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diff --git a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h
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index 5c91906..a493cd5 100644
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index 5c91906..dae4488 100644
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--- a/drivers/net/wireless/ath/ath12k/thermal.h
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+++ b/drivers/net/wireless/ath/ath12k/thermal.h
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@@ -13,28 +13,28 @@
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@@ -34,15 +34,19 @@ index 5c91906..a493cd5 100644
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#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
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-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
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+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
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#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
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-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
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-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
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+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
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#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
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#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
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#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
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-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
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-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
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-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
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-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
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+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 115
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+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
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+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 95
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+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
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+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 100
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+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
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+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 105
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+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
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#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
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#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
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