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20 Commits

Author SHA1 Message Date
YenLin Pan
ef598c9b01 zyxel_nwa130be: fine tune thermal setting
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
2025-07-09 14:48:03 +08:00
YenLin Pan
f67a2c404b qca-wifi-7: change patches-zyxel_nwa130be path
The original path cannot be patched

Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
2025-07-09 06:42:18 +02:00
John Crispin
974351335f ucentral-schema: update to latest HEAD
f3d1356 add reenroll command

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 10:25:21 +02:00
Justin.Guo
311b1a620c cig-device-boot: update WF672A configuration
* Reduce the i2c frequency to enable the encryption chip to be recognized
* Add USB xr Serial driver and init gps uart param
* Factory reset when switching wifi mode
* SFP gpio should be input mode

Fixes: WIFI-14789
Signed-off-by: Justin.Guo <guoxijun@actiontec.com>
2025-07-08 09:47:15 +02:00
John Crispin
066b442247 ucentral-client: prevent client from starting before cloud was discovered
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 09:42:57 +02:00
John Crispin
f2b69ce972 est_client: fix reenroll call
the wrong certificate was being used

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 09:41:12 +02:00
John Crispin
88830b2537 ucentral-client: update to latest HEAD
69829f6 Revert "Cloud Package Manager"
c3a3e05 remove certupdate from proto.c
4c4710a add reenroll to proto.c

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 09:40:30 +02:00
John Crispin
842b21fb5e certificates: add an explicit uci commit call
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 09:40:06 +02:00
John Crispin
8f8eb63ac4 ubus: fix PKG_MIRROR_HASH
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 08:45:48 +02:00
Justin.Guo
367a919d67 qca-wifi-7: WF-189w/h add temperature control
1.Change the WiFi temperature threshold.
2.Use single antenna when temperature is too high.

Fixes: WIFI-14788
Signed-off-by: Justin.Guo <guoxijun@actiontec.com>
2025-07-08 08:14:39 +02:00
Jesse Wu
919fe12372 ipq807x: add EMPLUS WAP380C support
Fixes: WIFI-14791
Signed-off-by: Jesse Wu <Jesse.Wu@emplustech.com>
2025-07-08 08:13:39 +02:00
John Crispin
d6d22433c5 ucentral-schema: update to latest HEAD
50ba97e allow sta-authorized and ft-finish to wifi-frames enum

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-07 16:43:35 +02:00
John Crispin
eff579f3ec ucentral-schema: update to latest HEAD
e062b7c properly detect 320MHz channel width

Fixes: WIFI-14607
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-07 07:55:49 +02:00
John Crispin
0768008764 ucentral-schema: update to latest HEAD
2819f87 HaLow: fix channel 8/24/40 cannot be set
3b04c09 HaLow: set default channel to avoid HaLow not working when no channel set by JSON

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-07 07:53:19 +02:00
John Crispin
53c45dfaeb udevmand: update to latest HEAD
e56be31 udevmand: fix segmentation fault during iface flushing

Fixes: WIFI-14752
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-04 08:39:43 +02:00
John Crispin
7e3f851788 ucentral-schema: update to latest HEAD
2b8a58b dont crash if udevmand does not reply
985f3cb WIFI-14588: Cloud Package Manager

Fixes: WIFI-14752
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-04 08:39:26 +02:00
John Crispin
205484080e Revert "netifd: add gcmp-256 as a cipher suite when SAE is enabled on HE/EHT"
This reverts commit b17db16c15.

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-03 16:46:02 +02:00
cpchangemplu
f1fc99ccbe ipq50xx: Add back emplus,wap385c
Signed-off-by: cpchangemplu <cp.chang@emplustech.com>
2025-07-03 14:26:46 +02:00
jackcybertan
db36e09553 ipq50xx : add sonicfi rap630e
Fixes: WIFI-14728
Signed-off-by: jackcybertan <jack.tsai@cybertan.com.tw>
2025-07-03 14:23:37 +02:00
John Crispin
b3174a0434 ubus: bump to latest HEAD
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-03 09:21:59 +02:00
42 changed files with 3027 additions and 92 deletions

View File

@@ -41,8 +41,10 @@ ALLWIFIBOARDS:= \
edgecore-oap102 \
edgecore-oap103 \
edgecore-eap104 \
emplus-wap380c \
emplus-wap385c \
emplus-wap386v2 \
emplus-wap581 \
liteon-wpx8324 \
indio-um-310ax-v1 \
indio-um-510axp-v1 \
@@ -56,6 +58,7 @@ ALLWIFIBOARDS:= \
sonicfi-rap630w-311g \
sonicfi-rap630w-312g \
sonicfi-rap650c \
sonicfi-rap630e \
tplink-ex227 \
tplink-ex447 \
yuncore-ax840 \
@@ -406,8 +409,10 @@ $(eval $(call generate-ath11k-wifi-package,edgecore-eap102,Edgecore EAP102))
$(eval $(call generate-ath11k-wifi-package,edgecore-oap102,Edgecore OAP102))
$(eval $(call generate-ath11k-wifi-package,edgecore-oap103,Edgecore OAP103))
$(eval $(call generate-ath11k-wifi-package,edgecore-eap104,Edgecore EAP104))
$(eval $(call generate-ath11k-wifi-package,emplus-wap380c,Emplus WAP380C))
$(eval $(call generate-ath11k-wifi-package,emplus-wap385c,Emplus WAP385C))
$(eval $(call generate-ath11k-wifi-package,emplus-wap386v2,Emplus WAP386 V2))
$(eval $(call generate-ath11k-wifi-package,emplus-wap581,Emplus WAP581))
$(eval $(call generate-ath11k-wifi-package,liteon-wpx8324,Liteon WPX8324))
$(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1))
@@ -416,6 +421,7 @@ $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-312g,Sonicfi RAP630W 312G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap650c,SonicFi RAP650C))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630e,SonicFi RAP630E))
$(eval $(call generate-ath11k-wifi-package,tplink-ex227,TP-Link EX227))
$(eval $(call generate-ath11k-wifi-package,tplink-ex447,TP-Link EX447))
$(eval $(call generate-ath11k-wifi-package,yuncore-ax840,YunCore AX840))

View File

@@ -33,6 +33,11 @@ sonicfi,rap630c-311g|\
sonicfi,rap630w-311g)
ucidef_set_led_default "power" "POWER" "pwm:blue" "on"
;;
sonicfi,rap630e)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy1tpt"
ucidef_set_led_default "power" "POWER" "green:power" "on"
;;
edgecore,oap101|\
edgecore,oap101-6e|\
edgecore,oap101e|\

View File

@@ -68,6 +68,12 @@ qcom_setup_interfaces()
glinet,b3000)
ucidef_add_switch "switch1" "6u@eth1" "1:wan" "2:lan" "3:lan"
;;
sonicfi,rap630e)
ucidef_set_interface_wan "eth1"
ucidef_set_interface_lan "eth0"
emplus,wap581)
ucidef_set_interface_wan "eth0 eth1"
;;
esac
}
@@ -104,6 +110,16 @@ qcom_setup_macs()
wan_mac=$(cat /sys/class/net/eth1/address)
lan_mac=$(macaddr_add "$wan_mac" 2)
;;
sonicfi,rap630e)
mac=$(fw_printenv -n BaseMacAddress)
[ -z "$mac" ] && return;
lan_mac=$(macaddr_canonicalize $mac)
wan_mac=$(macaddr_add "$wan_mac" 1)
ucidef_set_network_device_mac eth1 $wan_mac
ucidef_set_network_device_mac eth0 $lan_mac
ip link set eth1 address $wan_mac
ip link set eth0 address $lan_mac
;;
*)
wan_mac=$(cat /sys/class/net/eth0/address)
lan_mac=$(macaddr_add "$wan_mac" 1)

View File

@@ -94,6 +94,15 @@ ath11k_generate_macs_gl_b3000() {
}
}
ath11k_generate_macs_rap630e() {
touch /lib/firmware/ath11k-macs
eth=$(cat /sys/class/net/eth0/address)
mac1=$(macaddr_add $eth 2)
mac2=$(macaddr_add $eth 3)
echo -ne \\x${mac1//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${mac2//:/\\x} >> /lib/firmware/ath11k-macs
}
caldata_die() {
echo "caldata: " "$*"
exit 1
@@ -122,6 +131,7 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630w-312g|\
sonicfi,rap630e|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
edgecore,eap104|\
@@ -140,6 +150,7 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
udaya,a6-od2|\
wallys,dr5018|\
yuncore,fap655|\
emplus,wap581|\
glinet,b3000)
caldata_extract "0:ART" 0x1000 0x20000
;;
@@ -152,6 +163,7 @@ ath11k/qcn6122/hw1.0/caldata_1.bin)
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630w-312g|\
sonicfi,rap630e|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
edgecore,oap101|\
@@ -163,6 +175,7 @@ ath11k/qcn6122/hw1.0/caldata_1.bin)
udaya,a6-od2|\
hfcl,ion4xi_w|\
wallys,dr5018|\
emplus,wap581|\
yuncore,fap655)
caldata_extract "0:ART" 0x26800 0x20000
;;
@@ -178,6 +191,7 @@ ath11k/qcn6122/hw1.0/caldata_2.bin)
;;
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630e|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
glinet,b3000)
@@ -213,6 +227,9 @@ ath11k-macs)
cybertan,eww631-b1)
ath11k_generate_macs_eww631_b1
;;
sonicfi,rap630e)
ath11k_generate_macs_rap630e
;;
edgecore,eap104|\
edgecore,oap101|\
edgecore,oap101-6e|\

View File

@@ -73,6 +73,7 @@ platform_check_image() {
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630w-312g|\
sonicfi,rap630e|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
edgecore,eap104|\
@@ -91,6 +92,7 @@ platform_check_image() {
edgecore,oap101|\
edgecore,oap101-6e|\
edgecore,oap101e|\
emplus,wap581|\
edgecore,oap101e-6e)
[ "$magic_long" = "73797375" ] && return 0
;;
@@ -138,6 +140,7 @@ platform_do_upgrade() {
optimcloud,d60-5g|\
optimcloud,d50|\
optimcloud,d50-5g|\
emplus,wap581|\
yuncore,fap655)
[ -f /proc/boot_info/rootfs/upgradepartition ] && {
CI_UBIPART="$(cat /proc/boot_info/rootfs/upgradepartition)"
@@ -149,7 +152,8 @@ platform_do_upgrade() {
cybertan,eww631-b1|\
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630w-312g)
sonicfi,rap630w-312g|\
sonicfi,rap630e)
boot_part=$(fw_printenv bootfrom | cut -d = -f2)
echo "Current bootfrom is $boot_part"
if [[ $boot_part == 1 ]]; then

View File

@@ -450,6 +450,8 @@ CONFIG_GPIO_DEVRES=y
# CONFIG_GPIO_SAMA5D2_PIOBU is not set
CONFIG_GPIO_SYSFS=y
# CONFIG_GPIO_USB_DETECT is not set
CONFIG_GPIO_WATCHDOG=y
CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y
# CONFIG_GSI is not set
# CONFIG_HABANA_AI is not set
CONFIG_HANDLE_DOMAIN_IRQ=y

View File

@@ -0,0 +1,831 @@
/dts-v1/;
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Emplus WAP581";
compatible = "emplus,wap581", "qcom,ipq5018-mp03.3", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart1;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E000000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E100000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E200000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4EF00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F000000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4100000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 {
no-map;
reg = <0x0 0x4E000000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 {
no-map;
reg = <0x0 0x4E100000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0xD00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 {
no-map;
reg = <0x0 0x4EF00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 {
no-map;
reg = <0x0 0x4F000000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D300000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D500000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E400000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E900000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4F800000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4D00000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D500000 {
no-map;
reg = <0x0 0x4D500000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <0>;
};
ethernet-phy@1 {
reg = <1>;
};
ethernet-phy@2 {
reg = <2>;
};
ethernet-phy@3 {
reg = <3>;
};
ethernet-phy@4 {
reg = <4>;
};
};
ess-instance {
num_devices = <0x2>;
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <&tlmm 0x27 0>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x3e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <4>;
};
};
};
};
wifi0: wifi@c000000 {
status = "ok";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
qcom,rx-page-mode = <0>;
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
qcom,rx-page-mode = <0>;
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@28 {
label = "led_blue";
gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@38 {
label = "led_red";
gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@46 {
label = "led_green";
gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
};
qcom,test@0 {
status = "ok";
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds_pins {
led_blue {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_red { /* POWER_LED */
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_green { /* 2G_LED */
pins = "gpio46";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,rproc = <&q6_wcss_pd1>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x23>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D300000 0x4D300000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,rproc = <&q6_wcss_pd2>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x50>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4D500000 0x4D500000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E400000 0x4E400000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data1>;
#else
memory-region = <&q6_qcn6122_data1>;
#endif
status = "ok";
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
status = "disabled";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};

View File

@@ -0,0 +1,893 @@
/dts-v1/;
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Sonicfi RAP630E";
compatible = "sonicfi,rap630e", "qcom,ipq5018-mp03.5", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E000000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E100000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E200000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4EF00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F000000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4100000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 {
no-map;
reg = <0x0 0x4E000000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 {
no-map;
reg = <0x0 0x4E100000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0xD00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 {
no-map;
reg = <0x0 0x4EF00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 {
no-map;
reg = <0x0 0x4F000000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D300000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D500000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E400000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E900000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4F800000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4D00000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D500000 {
no-map;
reg = <0x0 0x4D500000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
no-map;
reg = <0x0 0x4E900000 0x0 0xD00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F600000 {
no-map;
reg = <0x0 0x4F600000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F700000 {
no-map;
reg = <0x0 0x4F700000 0x0 0x100000>;
};
q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4F800000 {
no-map;
reg = <0x0 0x4F800000 0x0 0x500000>;
};
ramoops: ramoops@50400000 {
compatible = "ramoops";
reg = <0x0 0x50400000 0x0 0x80000>; // 512KB
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
no-map;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
qcom,rx-page-mode = <0>;
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
qcom,rx-page-mode = <0>;
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
};
};
qcom,test@0 {
status = "ok";
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_5g {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sys {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led34 {
label = "green:wifi5";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
default-state = "on";
};
led33 {
label = "green:wifi2";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
default-state = "on";
};
led_power: led26 {
label = "green:power";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
default-state = "on";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
start-at-boot;
always-running;
status = "okay";
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
q6_wcss_pd3: remoteproc_pd3 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
#else
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D300000 0x4D300000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
nss-radio-priority = <0>;
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,rproc = <&q6_wcss_pd3>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4E900000 0x4E900000 0x4E200000 0x0 0x0>;
qcom,caldb-addr = <0x4F800000 0x4F800000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data2>;
#else
memory-region = <&q6_qcn6122_data2>;
#endif
nss-radio-priority = <1>;
status = "ok";
};
&wifi2 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
#else
qcom,caldb-addr = <0x4FF00000>;
m3-dump-addr = <0x4FD00000>;
nss-radio-priority = <1>;
#endif
mem-region = <&q6_qcn6122_data2>;
qcom,caldb-size = <0x500000>;
status = "disabled";
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "disabled";
};
&pcie_x1 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};

View File

@@ -73,6 +73,17 @@ define Device/sonicfi_rap630w_311g
endef
TARGET_DEVICES += sonicfi_rap630w_311g
define Device/sonicfi_rap630e
DEVICE_TITLE := Sonicfi RAP630E
DEVICE_DTS := qcom-ipq5018-rap630e
SUPPORTED_DEVICES := sonicfi,rap630e
DEVICE_PACKAGES := ath11k-wifi-sonicfi-rap630e ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.5-c1
IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
IMAGE/nand-factory.ubi := append-ubi
endef
TARGET_DEVICES += sonicfi_rap630e
define Device/edgecore_eap104
DEVICE_TITLE := EdgeCore EAP104
DEVICE_DTS := qcom-ipq5018-eap104
@@ -228,3 +239,16 @@ define Device/glinet_b3000
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
endef
TARGET_DEVICES += glinet_b3000
define Device/emplus_wap581
DEVICE_TITLE := Emplus WAP581
DEVICE_DTS := qcom-ipq5018-emplus-wap581
SUPPORTED_DEVICES := emplus,wap581
DEVICE_PACKAGES := ath11k-wifi-emplus-wap581 ath11k-firmware-ipq50xx-map-spruce
DEVICE_DTS_CONFIG := config@mp03.3
IMAGES := sysupgrade.tar nand-factory.bin
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
endef
TARGET_DEVICES += emplus_wap581

View File

@@ -20,6 +20,12 @@ edgecore,oap103)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy1tpt"
ucidef_set_led_wlan "power" "POWER" "green:power" "default-on"
;;
emplus,wap380c)
ucidef_set_led_default "power" "POWER" "ipq::led0" "on"
ucidef_set_led_netdev "wan" "WAN" "ipq::led1" "eth0"
ucidef_set_led_wlan "wlan2g" "WLAN2G" "ipq::led2" "phy1tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "ipq::led3" "phy0tpt"
;;
sonicfi,rap630w-311g|\
sonicfi,rap650c|\
cybertan,eww631-b1)

View File

@@ -12,6 +12,7 @@ qcom_setup_interfaces()
ucidef_add_switch_attr "switch0" "reset" "false"
case $board in
emplus,wap380c|\
tplink,ex227|\
tplink,ex447)
ucidef_set_interface_wan "eth0"

View File

@@ -72,6 +72,7 @@ case "$FIRMWARE" in
edgecore,oap102 |\
edgecore,oap103 |\
edgecore,eap106 |\
emplus,wap380c|\
qcom,ipq807x-hk01|\
qcom,ipq807x-hk14|\
tplink,ex227|\

View File

@@ -29,6 +29,7 @@ platform_check_image() {
edgecore,oap102|\
edgecore,oap103|\
edgecore,eap106|\
emplus,wap380c|\
sonicfi,rap650c|\
tplink,ex227|\
tplink,ex447)
@@ -48,7 +49,8 @@ platform_do_upgrade() {
tplink,ex227)
qca_do_upgrade "$1"
;;
cig,wf196)
cig,wf196|\
emplus,wap380c)
[ -f /proc/boot_info/rootfs/upgradepartition ] && {
CI_UBIPART="$(cat /proc/boot_info/rootfs/upgradepartition)"
CI_BOOTCFG=1

View File

@@ -0,0 +1,648 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
/* Copyright (c) 2020 The Linux Foundation. All rights reserved.
*/
#include "ipq8074.dtsi"
#include "ipq8074-ac-cpu.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Emplus WAP380C";
compatible = "emplus,wap380c", "qcom,ipq8074-ap-hk07", "qcom,ipq8074";
qcom,msm-id = <0x143 0x0>;
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart5;
/* Aliases as required by u-boot to patch MAC addresses */
ethernet0 = "/soc/dp6";
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
stdout-path = "serial0";
};
soc {
qti: ledc@191E000 {
compatible = "qti,ledc";
reg = <0x191E000 0x20070>;
reg-names = "ledc_base_addr";
qti,tcsr_ledc_values = <0x0320193 0x00000000 \
0x00000000 0x00000000 \
0x00000000 0xFFFFFFFF \
0xFFFF7FFF 0xFFFFFFFF \
0x007D0820 0x00000000 \
0x10482094 0x03FFFFE1>;
qti,ledc_blink_indices_cnt = <6>;
qti,ledc_blink_indices = <15 14 13 12 11 10>;
qti,ledc_blink_idx_src_pair = <5 20>;
status = "ok";
};
pinctrl@1000000 {
button_pins: button_pins {
reset_button {
pins = "gpio52";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
mdio_pins: mdio_pinmux {
mux_0 {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
mux_2 {
pins = "gpio44";
function = "gpio";
bias-pull-up;
};
};
ledc_pins: ledc_pinmux {
led_clk {
pins = "gpio18";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
led_data {
pins = "gpio19";
function = "led1";
drive-strength = <8>;
bias-pull-down;
};
led_clr {
pins = "gpio20";
function = "led2";
drive-strength = <8>;
bias-pull-up;
};
};
};
serial@78b3000 {
status = "ok";
};
spi@78b5000 {
status = "ok";
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-select = <0>;
m25p80@0 {
compatible = "n25q128a11";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <50000000>;
};
};
dma@7984000 {
status = "ok";
};
nand@79b0000 {
status = "ok";
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
ssphy@78000 {
status = "ok";
};
ssphy@58000 {
status = "ok";
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
status = "ok";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
mdio: mdio@90000 {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 43 1 &tlmm 44 1>;
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
phy5: ethernet-phy@5 {
reg = <28>;
};
};
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x3e>; /* lan port bitmap */
switch_wan_bmp = <0x40>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <4>;
};
port@5 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";
};
};
port_scheduler_resource {
port@0 {
port_id = <0>;
ucast_queue = <0 143>;
mcast_queue = <256 271>;
l0sp = <0 35>;
l0cdrr = <0 47>;
l0edrr = <0 47>;
l1cdrr = <0 7>;
l1edrr = <0 7>;
};
port@1 {
port_id = <1>;
ucast_queue = <144 159>;
mcast_queue = <272 275>;
l0sp = <36 39>;
l0cdrr = <48 63>;
l0edrr = <48 63>;
l1cdrr = <8 11>;
l1edrr = <8 11>;
};
port@2 {
port_id = <2>;
ucast_queue = <160 175>;
mcast_queue = <276 279>;
l0sp = <40 43>;
l0cdrr = <64 79>;
l0edrr = <64 79>;
l1cdrr = <12 15>;
l1edrr = <12 15>;
};
port@3 {
port_id = <3>;
ucast_queue = <176 191>;
mcast_queue = <280 283>;
l0sp = <44 47>;
l0cdrr = <80 95>;
l0edrr = <80 95>;
l1cdrr = <16 19>;
l1edrr = <16 19>;
};
port@4 {
port_id = <4>;
ucast_queue = <192 207>;
mcast_queue = <284 287>;
l0sp = <48 51>;
l0cdrr = <96 111>;
l0edrr = <96 111>;
l1cdrr = <20 23>;
l1edrr = <20 23>;
};
port@5 {
port_id = <5>;
ucast_queue = <208 223>;
mcast_queue = <288 291>;
l0sp = <52 55>;
l0cdrr = <112 127>;
l0edrr = <112 127>;
l1cdrr = <24 27>;
l1edrr = <24 27>;
};
port@6 {
port_id = <6>;
ucast_queue = <224 239>;
mcast_queue = <292 295>;
l0sp = <56 59>;
l0cdrr = <128 143>;
l0edrr = <128 143>;
l1cdrr = <28 31>;
l1edrr = <28 31>;
};
port@7 {
port_id = <7>;
ucast_queue = <240 255>;
mcast_queue = <296 299>;
l0sp = <60 63>;
l0cdrr = <144 159>;
l0edrr = <144 159>;
l1cdrr = <32 35>;
l1edrr = <32 35>;
};
};
port_scheduler_config {
port@0 {
port_id = <0>;
l1scheduler {
group@0 {
sp = <0 1>; /*L0 SPs*/
/*cpri cdrr epri edrr*/
cfg = <0 0 0 0>;
};
};
l0scheduler {
group@0 {
/*unicast queues*/
ucast_queue = <0 4 8>;
/*multicast queues*/
mcast_queue = <256 260>;
/*sp cpri cdrr epri edrr*/
cfg = <0 0 0 0 0>;
};
group@1 {
ucast_queue = <1 5 9>;
mcast_queue = <257 261>;
cfg = <0 1 1 1 1>;
};
group@2 {
ucast_queue = <2 6 10>;
mcast_queue = <258 262>;
cfg = <0 2 2 2 2>;
};
group@3 {
ucast_queue = <3 7 11>;
mcast_queue = <259 263>;
cfg = <0 3 3 3 3>;
};
};
};
port@1 {
port_id = <1>;
l1scheduler {
group@0 {
sp = <36>;
cfg = <0 8 0 8>;
};
group@1 {
sp = <37>;
cfg = <1 9 1 9>;
};
};
l0scheduler {
group@0 {
ucast_queue = <144>;
ucast_loop_pri = <16>;
mcast_queue = <272>;
mcast_loop_pri = <4>;
cfg = <36 0 48 0 48>;
};
};
};
port@2 {
port_id = <2>;
l1scheduler {
group@0 {
sp = <40>;
cfg = <0 12 0 12>;
};
group@1 {
sp = <41>;
cfg = <1 13 1 13>;
};
};
l0scheduler {
group@0 {
ucast_queue = <160>;
ucast_loop_pri = <16>;
mcast_queue = <276>;
mcast_loop_pri = <4>;
cfg = <40 0 64 0 64>;
};
};
};
port@3 {
port_id = <3>;
l1scheduler {
group@0 {
sp = <44>;
cfg = <0 16 0 16>;
};
group@1 {
sp = <45>;
cfg = <1 17 1 17>;
};
};
l0scheduler {
group@0 {
ucast_queue = <176>;
ucast_loop_pri = <16>;
mcast_queue = <280>;
mcast_loop_pri = <4>;
cfg = <44 0 80 0 80>;
};
};
};
port@4 {
port_id = <4>;
l1scheduler {
group@0 {
sp = <48>;
cfg = <0 20 0 20>;
};
group@1 {
sp = <49>;
cfg = <1 21 1 21>;
};
};
l0scheduler {
group@0 {
ucast_queue = <192>;
ucast_loop_pri = <16>;
mcast_queue = <284>;
mcast_loop_pri = <4>;
cfg = <48 0 96 0 96>;
};
};
};
port@5 {
port_id = <5>;
l1scheduler {
group@0 {
sp = <52>;
cfg = <0 24 0 24>;
};
group@1 {
sp = <53>;
cfg = <1 25 1 25>;
};
};
l0scheduler {
group@0 {
ucast_queue = <208>;
ucast_loop_pri = <16>;
mcast_queue = <288>;
mcast_loop_pri = <4>;
cfg = <52 0 112 0 112>;
};
};
};
port@6 {
port_id = <6>;
l1scheduler {
group@0 {
sp = <56>;
cfg = <0 28 0 28>;
};
group@1 {
sp = <57>;
cfg = <1 29 1 29>;
};
};
l0scheduler {
group@0 {
ucast_queue = <224>;
ucast_loop_pri = <16>;
mcast_queue = <292>;
mcast_loop_pri = <4>;
cfg = <56 0 128 0 128>;
};
};
};
port@7 {
port_id = <7>;
l1scheduler {
group@0 {
sp = <60>;
cfg = <0 32 0 32>;
};
group@1 {
sp = <61>;
cfg = <1 33 1 33>;
};
};
l0scheduler {
group@0 {
ucast_queue = <240>;
ucast_loop_pri = <16>;
mcast_queue = <296>;
cfg = <60 0 144 0 144>;
};
};
};
};
};
dp6 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <6>;
reg = <0x3a001800 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
phy-mode = "sgmii";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio>;
};
};
};
&apc_cpr {
/* Same CPR configuration as OAK */
compatible = "qcom,cpr4-ipq817x-apss-regulator";
thread@0 {
apc_vreg: regulator {
regulator-min-microvolt = <1>;
regulator-max-microvolt = <2>;
qcom,cpr-fuse-corners = <2>;
qcom,cpr-corners = <3>;
qcom,cpr-speed-bin-corners = <3>;
qcom,cpr-corner-fmax-map = <1 3>;
qcom,cpr-voltage-ceiling =
<840000 904000 944000>;
qcom,cpr-voltage-floor =
<592000 648000 712000>;
qcom,corner-frequencies =
<1017600000 1382400000 1382400000>;
qcom,cpr-open-loop-voltage-fuse-adjustment-0 =
/* Speed bin 0; CPR rev 0..7 */
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>;
qcom,cpr-open-loop-voltage-fuse-adjustment-1 =
/* Speed bin 0; CPR rev 0..7 */
< 0 0>,
< 0 0>,
< 0 0>,
< 20000 26000>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>;
qcom,cpr-open-loop-voltage-fuse-adjustment-v2-0 =
/* Speed bin 0; CPR rev 0..7 */
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>;
qcom,cpr-open-loop-voltage-fuse-adjustment-v2-1 =
/* Speed bin 0; CPR rev 0..7 */
< 0 0>,
< 0 7000>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>;
qcom,cpr-floor-to-ceiling-max-range =
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>;
};
};
};
&npu_cpr {
status = "disabled";
};
&nss0 {
qcom,low-frequency = <187200000>;
qcom,mid-frequency = <748800000>;
qcom,max-frequency = <1497600000>;
};
&nss0 {
npu-supply = <&dummy_reg>;
mx-supply = <&dummy_reg>;
};
&wifi0 {
qcom,board_id = <0x92>;
};
&wifi1 {
qcom,board_id = <0x290>;
};
&ledc {
pinctrl-0 = <&ledc_pins>;
pinctrl-names = "default";
status = "ok";
led_power: led0 {
label = "ipq::led0";
linux,default-trigger = "default-on";
};
wan: led1 {
label = "ipq::led1";
linux,default-trigger = "netdev";
};
wifi2g: led2 {
label = "ipq::led2";
linux,default-trigger = "phy1tpt";
};
wifi5g: led3 {
label = "ipq::led3";
linux,default-trigger = "phy0tpt";
};
led4 {
label = "ipq::led4";
linux,default-trigger = "none";
};
led5 {
label = "ipq::led5";
linux,default-trigger = "none";
};
};

View File

@@ -57,6 +57,15 @@ define Device/edgecore_eap106
endef
#TARGET_DEVICES += edgecore_eap106
define Device/emplus_wap380c
DEVICE_TITLE := Emplus WAP380C
DEVICE_DTS := qcom-ipq807x-wap380c
DEVICE_DTS_CONFIG=config@hk07
SUPPORTED_DEVICES := emplus,wap380c
DEVICE_PACKAGES := ath11k-wifi-emplus-wap380c uboot-envtools
endef
TARGET_DEVICES += emplus_wap380c
define Device/sonicfi_rap650c
DEVICE_TITLE := SonicFi RAP650C
DEVICE_DTS := qcom-ipq807x-rap650c

View File

@@ -0,0 +1,29 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=cig-device-boot
PKG_RELEASE:=1
PKG_LICENSE:=GPL-2.0
include $(INCLUDE_DIR)/package.mk
define Package/cig-device-boot
SECTION:=utils
CATEGORY:=Utilities
DEPENDS:=+kmod-usb-serial-xr
TITLE:=CIG device init
endef
define Package/cig-device-boot/description
Initialize particular functions of the CIG device
endef
define Build/Compile
endef
define Package/cig-device-boot/install
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_BIN) ./files/cig-device.init $(1)/etc/init.d/cig-device-boot
endef
$(eval $(call BuildPackage,cig-device-boot))

View File

@@ -0,0 +1,7 @@
#!/bin/sh /etc/rc.common
START=99
boot(){
[ -e /dev/ttyUSB0 ] && stty -F /dev/ttyUSB0 115200 cs8 -cstopb -parenb -icrnl -onlcr
}

View File

@@ -3,9 +3,9 @@
band=$1
if [ $band -eq 2 ] || [ $band -eq 3 ]; then
echo $band > /proc/rf_switch
echo "reboot for switch wifi mode 2/3 bands"
echo "firstboot for switch wifi mode 2/3 bands"
sleep 1
reboot
firstboot -y -r
else
echo "error band param"
fi

View File

@@ -1225,3 +1225,4 @@ CONFIG_PSTORE_PMSG=y
CONFIG_PSTORE_RAM=y
# CONFIG_RTL8221D_PHY is not set
# CONFIG_INPUT_LSM303AGR is not set
# CONFIG_USB_SERIAL_XR is not set

View File

@@ -59,6 +59,8 @@
num_devices = <0x1>;
ess-switch@3a000000 {
pinctrl-0 = <&sfp_pins>;
pinctrl-names = "default";
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x2>; /* lan port bitmap */
switch_wan_bmp = <0x4>; /* wan port bitmap */
@@ -284,7 +286,7 @@
&blsp1_i2c1 {
status = "okay";
clock-frequency = <400000>;
clock-frequency = <100000>;
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
extgpio:pca9555@20{
@@ -442,6 +444,13 @@
};
};
sfp_pins: sfp-state {
pins = "gpio43";
function = "gpio";
bias-pull-up;
input-enable;
};
spi_0_data_clk_pins: spi-0-data-clk-state {
pins = "gpio14", "gpio15", "gpio16";
function = "blsp0_spi";

View File

@@ -0,0 +1,181 @@
diff -Nur a/drivers/net/wireless/ath/ath12k/mac.c b/drivers/net/wireless/ath/ath12k/mac.c
--- a/drivers/net/wireless/ath/ath12k/mac.c 2025-06-24 15:49:49.813180049 +0800
+++ b/drivers/net/wireless/ath/ath12k/mac.c 2025-06-24 15:50:19.499525336 +0800
@@ -10451,6 +10451,30 @@
return 0;
}
+int ath12k_mac_set_antenna(struct ath12k *ar, u32 tx_ant, u32 rx_ant)
+{
+ int ret;
+
+ if (!tx_ant || !rx_ant) {
+ ath12k_warn(ar->ab, "Invalid chainmask tx=0x%x rx=0x%x\n", tx_ant, rx_ant);
+ return -EINVAL;
+ }
+
+ /* return if it is no changed */
+ if (ar->cfg_tx_chainmask == tx_ant && ar->cfg_rx_chainmask == rx_ant)
+ return 0;
+
+ mutex_lock(&ar->conf_mutex);
+ ret = __ath12k_set_antenna(ar, tx_ant, rx_ant);
+ if (!ret) {
+ ar->cfg_tx_chainmask = tx_ant;
+ ar->cfg_rx_chainmask = rx_ant;
+ }
+ mutex_unlock(&ar->conf_mutex);
+
+ return ret;
+}
+
static void ath12k_mgmt_over_wmi_tx_drop(struct ath12k *ar, struct sk_buff *skb)
{
int num_mgmt = 0;
diff -Nur a/drivers/net/wireless/ath/ath12k/mac.h b/drivers/net/wireless/ath/ath12k/mac.h
--- a/drivers/net/wireless/ath/ath12k/mac.h 2025-06-24 15:49:49.719178955 +0800
+++ b/drivers/net/wireless/ath/ath12k/mac.h 2025-06-24 15:50:19.500525348 +0800
@@ -168,6 +168,7 @@
extern const struct htt_rx_ring_tlv_filter ath12k_mac_mon_status_filter_default;
+int ath12k_mac_set_antenna(struct ath12k *ar, u32 tx_ant, u32 rx_ant);
void ath12k_mac_set_cw_intf_detect(struct ath12k *ar, u8 intf_detect_param);
void ath12k_mac_set_vendor_intf_detect(struct ath12k *ar, u8 intf_detect_bitmap);
void ath12k_mac_ap_ps_recalc(struct ath12k *ar);
diff -Nur a/drivers/net/wireless/ath/ath12k/thermal.c b/drivers/net/wireless/ath/ath12k/thermal.c
--- a/drivers/net/wireless/ath/ath12k/thermal.c 2025-06-24 15:49:49.388175103 +0800
+++ b/drivers/net/wireless/ath/ath12k/thermal.c 2025-06-24 15:50:19.500525348 +0800
@@ -401,8 +401,25 @@
complete(&ar->thermal.wmi_sync);
}
+static void ath12k_thermal_antenna_switch_work(struct work_struct *work) {
+ struct ath12k_thermal_work *thermal_work = container_of(work, struct ath12k_thermal_work, work);
+ struct ath12k *ar = thermal_work->ar;
+ int ret;
+
+ ret = ath12k_mac_set_antenna(ar, thermal_work->tx_mask, thermal_work->rx_mask);
+ if (ret) {
+ ath12k_warn(ar->ab, "Radio %d: Failed to set antenna (tx=0x%x rx=0x%x, err=%d)\n",
+ ar->pdev_idx, thermal_work->tx_mask, thermal_work->rx_mask, ret);
+ }
+ kfree(thermal_work);
+}
+
void ath12k_thermal_event_throt_level(struct ath12k *ar, int curr_level)
{
+ int temp = ar->thermal.temperature;
+ u32 tx_mask, rx_mask;
+ bool need_switch = false;
+
if (test_bit(WMI_TLV_SERVICE_THERM_THROT_POUT_REDUCTION, ar->ab->wmi_ab.svc_map) &&
curr_level >= ENHANCED_THERMAL_LEVELS)
return;
@@ -416,7 +433,37 @@
else
ar->thermal.throttle_state =
tt_level_configs[ATH12K_DEFAULT_THERMAL_LEVEL][curr_level].dcoffpercent;
- spin_unlock_bh(&ar->data_lock);
+
+ /* configure ant mode */
+ if (temp >= 110 && ar->cfg_tx_chainmask != 0x1) {
+ tx_mask = 0x1;
+ rx_mask = 0x1;
+ need_switch = true;
+ } else if (temp <= 105 && ar->cfg_tx_chainmask != ar->thermal.default_tx_chainmask) {
+ tx_mask = ar->thermal.default_tx_chainmask;
+ rx_mask = ar->thermal.default_rx_chainmask;
+ need_switch = true;
+ }
+
+ spin_unlock_bh(&ar->data_lock);
+
+ /* set param async*/
+ if (need_switch) {
+ struct ath12k_thermal_work *work = kmalloc(sizeof(*work), GFP_ATOMIC);
+ if (work) {
+ work->ar = ar;
+ work->tx_mask = tx_mask;
+ work->rx_mask = rx_mask;
+ INIT_WORK(&work->work, ath12k_thermal_antenna_switch_work);
+ schedule_work(&work->work);
+
+ ath12k_info(ar->ab, "Radio %d: Temp %d°C, %s → %s antenna (level=%d)\n",
+ ar->pdev_idx, temp,
+ (ar->cfg_tx_chainmask > 0x1) ? "dual" : "single",
+ (tx_mask > 0x1) ? "dual" : "single",
+ curr_level);
+ }
+ }
}
static SENSOR_DEVICE_ATTR(temp1_input, 0444, ath12k_thermal_show_temp,
@@ -459,6 +506,11 @@
param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].priority = 0;
param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].pout_reduction_db =
tt_level_configs[ATH12K_ENHANCED_THERMAL_LEVEL][level].pout_reduction_db;
+
+ ath12k_info(NULL, "Using low=%d, high=%d; throttle_state=%d\n",
+ param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].tmplwm,
+ param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].tmphwm,
+ param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].dcoffpercent);
}
} else {
tt_level_configs[ATH12K_DEFAULT_THERMAL_LEVEL][0].dcoffpercent = throttle_state;
@@ -494,6 +546,10 @@
for (i = 0; i < ab->num_radios; i++) {
pdev = &ab->pdevs[i];
ar = pdev->ar;
+
+ ar->thermal.default_tx_chainmask = ar->pdev->cap.tx_chain_mask;
+ ar->thermal.default_rx_chainmask = ar->pdev->cap.rx_chain_mask;
+
if (!ar)
continue;
diff -Nur a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h
--- a/drivers/net/wireless/ath/ath12k/thermal.h 2025-06-24 15:49:49.388175103 +0800
+++ b/drivers/net/wireless/ath/ath12k/thermal.h 2025-06-24 15:53:27.288704303 +0800
@@ -22,15 +22,15 @@
#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
-#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 100
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 95
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 110
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 115
+#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 125
#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
@@ -83,6 +83,16 @@
* protected by data_lock
*/
int temperature;
+
+ u32 default_tx_chainmask;
+ u32 default_rx_chainmask;
+};
+
+struct ath12k_thermal_work {
+ struct work_struct work;
+ struct ath12k *ar;
+ u32 tx_mask;
+ u32 rx_mask;
};
#ifdef CPTCFG_ATH12K_POWER_OPTIMIZATION

View File

@@ -0,0 +1,181 @@
diff -Nur a/drivers/net/wireless/ath/ath12k/mac.c b/drivers/net/wireless/ath/ath12k/mac.c
--- a/drivers/net/wireless/ath/ath12k/mac.c 2025-06-24 15:49:49.813180049 +0800
+++ b/drivers/net/wireless/ath/ath12k/mac.c 2025-06-24 15:50:19.499525336 +0800
@@ -10451,6 +10451,30 @@
return 0;
}
+int ath12k_mac_set_antenna(struct ath12k *ar, u32 tx_ant, u32 rx_ant)
+{
+ int ret;
+
+ if (!tx_ant || !rx_ant) {
+ ath12k_warn(ar->ab, "Invalid chainmask tx=0x%x rx=0x%x\n", tx_ant, rx_ant);
+ return -EINVAL;
+ }
+
+ /* return if it is no changed */
+ if (ar->cfg_tx_chainmask == tx_ant && ar->cfg_rx_chainmask == rx_ant)
+ return 0;
+
+ mutex_lock(&ar->conf_mutex);
+ ret = __ath12k_set_antenna(ar, tx_ant, rx_ant);
+ if (!ret) {
+ ar->cfg_tx_chainmask = tx_ant;
+ ar->cfg_rx_chainmask = rx_ant;
+ }
+ mutex_unlock(&ar->conf_mutex);
+
+ return ret;
+}
+
static void ath12k_mgmt_over_wmi_tx_drop(struct ath12k *ar, struct sk_buff *skb)
{
int num_mgmt = 0;
diff -Nur a/drivers/net/wireless/ath/ath12k/mac.h b/drivers/net/wireless/ath/ath12k/mac.h
--- a/drivers/net/wireless/ath/ath12k/mac.h 2025-06-24 15:49:49.719178955 +0800
+++ b/drivers/net/wireless/ath/ath12k/mac.h 2025-06-24 15:50:19.500525348 +0800
@@ -168,6 +168,7 @@
extern const struct htt_rx_ring_tlv_filter ath12k_mac_mon_status_filter_default;
+int ath12k_mac_set_antenna(struct ath12k *ar, u32 tx_ant, u32 rx_ant);
void ath12k_mac_set_cw_intf_detect(struct ath12k *ar, u8 intf_detect_param);
void ath12k_mac_set_vendor_intf_detect(struct ath12k *ar, u8 intf_detect_bitmap);
void ath12k_mac_ap_ps_recalc(struct ath12k *ar);
diff -Nur a/drivers/net/wireless/ath/ath12k/thermal.c b/drivers/net/wireless/ath/ath12k/thermal.c
--- a/drivers/net/wireless/ath/ath12k/thermal.c 2025-06-24 15:49:49.388175103 +0800
+++ b/drivers/net/wireless/ath/ath12k/thermal.c 2025-06-24 15:50:19.500525348 +0800
@@ -401,8 +401,25 @@
complete(&ar->thermal.wmi_sync);
}
+static void ath12k_thermal_antenna_switch_work(struct work_struct *work) {
+ struct ath12k_thermal_work *thermal_work = container_of(work, struct ath12k_thermal_work, work);
+ struct ath12k *ar = thermal_work->ar;
+ int ret;
+
+ ret = ath12k_mac_set_antenna(ar, thermal_work->tx_mask, thermal_work->rx_mask);
+ if (ret) {
+ ath12k_warn(ar->ab, "Radio %d: Failed to set antenna (tx=0x%x rx=0x%x, err=%d)\n",
+ ar->pdev_idx, thermal_work->tx_mask, thermal_work->rx_mask, ret);
+ }
+ kfree(thermal_work);
+}
+
void ath12k_thermal_event_throt_level(struct ath12k *ar, int curr_level)
{
+ int temp = ar->thermal.temperature;
+ u32 tx_mask, rx_mask;
+ bool need_switch = false;
+
if (test_bit(WMI_TLV_SERVICE_THERM_THROT_POUT_REDUCTION, ar->ab->wmi_ab.svc_map) &&
curr_level >= ENHANCED_THERMAL_LEVELS)
return;
@@ -416,7 +433,37 @@
else
ar->thermal.throttle_state =
tt_level_configs[ATH12K_DEFAULT_THERMAL_LEVEL][curr_level].dcoffpercent;
- spin_unlock_bh(&ar->data_lock);
+
+ /* configure ant mode */
+ if (temp >= 110 && ar->cfg_tx_chainmask != 0x1) {
+ tx_mask = 0x1;
+ rx_mask = 0x1;
+ need_switch = true;
+ } else if (temp <= 105 && ar->cfg_tx_chainmask != ar->thermal.default_tx_chainmask) {
+ tx_mask = ar->thermal.default_tx_chainmask;
+ rx_mask = ar->thermal.default_rx_chainmask;
+ need_switch = true;
+ }
+
+ spin_unlock_bh(&ar->data_lock);
+
+ /* set param async*/
+ if (need_switch) {
+ struct ath12k_thermal_work *work = kmalloc(sizeof(*work), GFP_ATOMIC);
+ if (work) {
+ work->ar = ar;
+ work->tx_mask = tx_mask;
+ work->rx_mask = rx_mask;
+ INIT_WORK(&work->work, ath12k_thermal_antenna_switch_work);
+ schedule_work(&work->work);
+
+ ath12k_info(ar->ab, "Radio %d: Temp %d°C, %s → %s antenna (level=%d)\n",
+ ar->pdev_idx, temp,
+ (ar->cfg_tx_chainmask > 0x1) ? "dual" : "single",
+ (tx_mask > 0x1) ? "dual" : "single",
+ curr_level);
+ }
+ }
}
static SENSOR_DEVICE_ATTR(temp1_input, 0444, ath12k_thermal_show_temp,
@@ -459,6 +506,11 @@
param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].priority = 0;
param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].pout_reduction_db =
tt_level_configs[ATH12K_ENHANCED_THERMAL_LEVEL][level].pout_reduction_db;
+
+ ath12k_info(NULL, "Using low=%d, high=%d; throttle_state=%d\n",
+ param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].tmplwm,
+ param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].tmphwm,
+ param.levelconf[ATH12K_ENHANCED_THERMAL_LEVEL][level].dcoffpercent);
}
} else {
tt_level_configs[ATH12K_DEFAULT_THERMAL_LEVEL][0].dcoffpercent = throttle_state;
@@ -494,6 +546,10 @@
for (i = 0; i < ab->num_radios; i++) {
pdev = &ab->pdevs[i];
ar = pdev->ar;
+
+ ar->thermal.default_tx_chainmask = ar->pdev->cap.tx_chain_mask;
+ ar->thermal.default_rx_chainmask = ar->pdev->cap.rx_chain_mask;
+
if (!ar)
continue;
diff -Nur a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h
--- a/drivers/net/wireless/ath/ath12k/thermal.h 2025-06-24 15:49:49.388175103 +0800
+++ b/drivers/net/wireless/ath/ath12k/thermal.h 2025-06-24 15:53:27.288704303 +0800
@@ -22,15 +22,15 @@
#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
-#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 100
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 95
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 110
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 115
+#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 125
#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
@@ -83,6 +83,16 @@
* protected by data_lock
*/
int temperature;
+
+ u32 default_tx_chainmask;
+ u32 default_rx_chainmask;
+};
+
+struct ath12k_thermal_work {
+ struct work_struct work;
+ struct ath12k *ar;
+ u32 tx_mask;
+ u32 rx_mask;
};
#ifdef CPTCFG_ATH12K_POWER_OPTIMIZATION

View File

@@ -1,6 +1,6 @@
From 1a46aa106a50a06bfa4b669d87a8143c3d59f2f4 Mon Sep 17 00:00:00 2001
From f117d369cecadedefd2eb1467d52e9df76c14dc6 Mon Sep 17 00:00:00 2001
From: YenLin Pan <yenlin.pan@zyxel.com.tw>
Date: Wed, 14 May 2025 14:14:22 +0800
Date: Wed, 9 Jul 2025 14:46:13 +0800
Subject: [PATCH] thermal: thermal setting
lv0 -100 -hi0 105 -off0 0
@@ -10,11 +10,11 @@ lv3 105 -hi3 120 -off3 100
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
---
drivers/net/wireless/ath/ath12k/thermal.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
drivers/net/wireless/ath/ath12k/thermal.h | 24 +++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h
index 5c91906..a493cd5 100644
index 5c91906..dae4488 100644
--- a/drivers/net/wireless/ath/ath12k/thermal.h
+++ b/drivers/net/wireless/ath/ath12k/thermal.h
@@ -13,28 +13,28 @@
@@ -34,15 +34,19 @@ index 5c91906..a493cd5 100644
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 95
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120

View File

@@ -475,6 +475,22 @@ endef
$(eval $(call KernelPackage,usb-f-qdss))
define KernelPackage/usb-serial-xr
TITLE:=USB xr Serial driver support
KCONFIG:=CONFIG_USB_SERIAL_XR
FILES:=\
$(LINUX_DIR)/drivers/usb/serial/xr_serial.ko
AUTOLOAD:=$(call AutoLoad,60,xr_serial)
DEPENDS:=+kmod-usb-serial
$(call AddPlatformDepends/usb)
endef
define KernelPackage/usb-serial-xr/description
USB MaxLinear/Exar USB to Serial driver
endef
$(eval $(call KernelPackage,usb-serial-xr))
LEDS_MENU:=LED modules
define KernelPackage/leds-tlc591xx

View File

@@ -4,3 +4,4 @@ uci add system certificates
uci set system.@certificates[-1].key=/etc/ucentral/key.pem
uci set system.@certificates[-1].cert=/etc/ucentral/operational.pem
uci set system.@certificates[-1].ca=/etc/ucentral/operational.ca
uci commit

View File

@@ -105,8 +105,10 @@ cig,wf189h|\
cig,wf186h|\
cig,wf196|\
cig,wf188n|\
emplus,wap380c|\
emplus,wap385c|\
emplus,wap386v2|\
emplus,wap581|\
yuncore,ax840|\
yuncore,fap655)
PART_NAME=rootfs_1

View File

@@ -65,11 +65,11 @@ function p7_too_pem(src, dst) {
return 0;
}
function call_est_server(cert, target) {
function call_est_server(path, cert, target) {
if (generate_csr(cert))
return 1;
let ret = system('curl -X POST https://qaest.certificates.open-lan.org:8001/.well-known/est/simpleenroll -d @/tmp/csr.nohdr.p10 -H "Content-Type: application/pkcs10" --cert /etc/ucentral/cert.pem --key /etc/ucentral/key.pem --cacert /etc/ucentral/insta.pem -o /tmp/operational.nohdr.p7');
let ret = system('curl -X POST https://qaest.certificates.open-lan.org:8001/.well-known/est/' + path + ' -d @/tmp/csr.nohdr.p10 -H "Content-Type: application/pkcs10" --cert ' + cert + ' --key /etc/ucentral/key.pem --cacert /etc/ucentral/insta.pem -o /tmp/operational.nohdr.p7');
if (ret) {
ulog(LOG_INFO, 'Failed to request operational certificate\n');
return 1;
@@ -86,7 +86,7 @@ function simpleenroll() {
return 0;
}
if (call_est_server('/etc/ucentral/cert.pem', '/etc/ucentral/operational.pem'))
if (call_est_server('simpleenroll', '/etc/ucentral/cert.pem', '/etc/ucentral/operational.pem'))
return 1;
ulog(LOG_INFO, 'Operational cert acquired\n');
@@ -100,7 +100,7 @@ function simplereenroll() {
return 0;
}
if (call_est_server('/etc/ucentral/operational.pem', '/tmp/operational.pem'))
if (call_est_server('simplereenroll', '/etc/ucentral/operational.pem', '/tmp/operational.pem'))
return 1;
ulog(LOG_INFO, 'Operational cert updated\n');
@@ -114,7 +114,7 @@ function load_operational_ca() {
ulog(LOG_INFO, 'Operational CA is present\n');
return 0;
}
let ret = system('curl -X GET https://qaest.certificates.open-lan.org:8001/.well-known/est/cacerts --cert /etc/ucentral/cert.pem --key /etc/ucentral/key.pem --cacert /etc/ucentral/insta.pem -o /tmp/operational.ca.nohdr.p7');
let ret = system('curl -X GET https://qaest.certificates.open-lan.org:8001/.well-known/est/cacerts --cert /etc/ucentral/operational.pem --key /etc/ucentral/key.pem --cacert /etc/ucentral/insta.pem -o /tmp/operational.ca.nohdr.p7');
if (!ret)
ret = p7_too_pem('/tmp/operational.ca.nohdr.p7', '/etc/ucentral/operational.ca');
if (ret) {

View File

@@ -4,10 +4,10 @@ PKG_NAME:=ucentral-client
PKG_RELEASE:=1
PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-client.git
PKG_MIRROR_HASH:=7dfeaedf141a6377de2dc6bcd646b1640201f204db42af52777d018700bc991c
PKG_MIRROR_HASH:=2e28e0aa61b74851c7daf3634ec34d303a603e881e6c5d1fd76c837dea527582
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2025-06-27
PKG_SOURCE_VERSION:=08a842d9921196821a19d52b9061db6c428aab3f
PKG_SOURCE_DATE:=2025-07-08
PKG_SOURCE_VERSION:=69829f63ea172ce9bd19b7b02073746fe9cf6a52
PKG_LICENSE:=BSD-3-Clause
PKG_MAINTAINER:=John Crispin <john@phrozen.org>

View File

@@ -44,14 +44,15 @@ start_service() {
server=$(cat /etc/ucentral/gateway.json | jsonfilter -e '@["server"]')
port=$(cat /etc/ucentral/gateway.json | jsonfilter -e '@["port"]')
[ -n "$server" -a -n "$port" ] || return 0
boot_cause=$(cat /tmp/pstore | jsonfilter -e '@["pstore"][-1]'.boot_cause)
[ -z $boot_cause ] && boot_cause=coldboot
procd_open_instance
procd_set_param command "$PROG"
[ -n "$serial" ] && procd_append_param command -S $serial
[ -n "$server" ] && procd_append_param command -s $server
[ -n "$port" ] && procd_append_param command -P $port
procd_append_param command -s $server
procd_append_param command -P $port
[ "$debug" -eq 0 ] || procd_append_param command -d
[ "$insecure" -eq 0 ] || procd_append_param command -i
[ -z "$(mount | grep 'tmpfs on / type tmpfs')" ] || procd_append_param command -r

View File

@@ -4,10 +4,10 @@ PKG_NAME:=ucentral-schema
PKG_RELEASE:=1
PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-schema.git
PKG_MIRROR_HASH:=aac8731d564f4ccd85a366417b9a02c1d3de9b6533d1474b58768249c50707f1
PKG_MIRROR_HASH:=3857f9adcb12625350ada5274d177540d205f0b77c51129d298bb5d38fb6dbf6
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2025-06-27
PKG_SOURCE_VERSION:=125a148764c9ef7a02086b6fadccd7b96bfdf591
PKG_SOURCE_DATE:=2025-07-08
PKG_SOURCE_VERSION:=f3d1356a066daa28f7ee1cf3adc27f09ca742708
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
PKG_LICENSE:=BSD-3-Clause

View File

@@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=https://github.com/blogic/udevmand.git
PKG_MIRROR_HASH:=b643cae7315b6bc92262b9b632fe39bd9f766525a5fb69e8a8a5c37f4e26867b
PKG_SOURCE_DATE:=20241219
PKG_SOURCE_VERSION:=be0f45e7bcf6bad8143222c541c3d077bdadbecc
PKG_MIRROR_HASH:=6f6a5536656a64e1f38f03747ef06ab03b28ef797adc72a901eb7dbc6e45e496
PKG_SOURCE_DATE:=20250704
PKG_SOURCE_VERSION:=e56be31d7c341467cc26714dac5c6b450a612808
CMAKE_INSTALL:=1
PKG_LICENSE:=LGPL-2.1

View File

@@ -1,59 +0,0 @@
From 6866492b26cf59d5557d1ea0fdae24834410afff Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Wed, 11 Jun 2025 14:24:48 +0200
Subject: [PATCH] netifd: add gcmp-256 as a cipher suite when SAE is enabled on
HE/EHT
Fixes: WIFI-14594
Signed-off-by: John Crispin <john@phrozen.org>
---
.../config/netifd/patches/200-gcmp-256.patch | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 package/network/config/netifd/patches/200-gcmp-256.patch
diff --git a/package/network/config/netifd/patches/200-gcmp-256.patch b/package/network/config/netifd/patches/200-gcmp-256.patch
new file mode 100644
index 0000000000..defe66a816
--- /dev/null
+++ b/package/network/config/netifd/patches/200-gcmp-256.patch
@@ -0,0 +1,37 @@
+--- a/scripts/netifd-wireless.sh
++++ b/scripts/netifd-wireless.sh
+@@ -39,11 +39,10 @@ prepare_key_wep() {
+ }
+
+ _wdev_prepare_channel() {
+- json_get_vars channel band hwmode
++ json_get_vars channel band hwmode htmode
+
+ auto_channel=0
+ enable_ht=0
+- htmode=
+ hwmode="${hwmode##11}"
+
+ case "$channel" in
+@@ -80,6 +79,11 @@ _wdev_prepare_channel() {
+ esac
+ ;;
+ esac
++
++ case "$htmode" in
++ HE*|EHT*) wpa3_cipher="GCMP-256 ";;
++ *) wpa3_cipher="";;
++ esac
+ }
+
+ _wdev_handler() {
+@@ -216,6 +220,9 @@ wireless_vif_parse_encryption() {
+ wpa_cipher="GCMP"
+ else
+ wpa_cipher="CCMP"
++ case "$encryption" in
++ sae*|wpa3*|psk3*|owe) wpa_cipher="${wpa3_cipher}$wpa_cipher";;
++ esac
+ fi
+
+ case "$encryption" in
--
2.34.1

View File

@@ -0,0 +1,30 @@
From 2630ee161ad4d5981d98ee8cf0b7be3832b32ee8 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Thu, 3 Jul 2025 09:20:03 +0200
Subject: [PATCH] ubus: bump to latest HEAD
Signed-off-by: John Crispin <john@phrozen.org>
---
package/system/ubus/Makefile | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/package/system/ubus/Makefile b/package/system/ubus/Makefile
index 82c4dc601a..ea536930ea 100644
--- a/package/system/ubus/Makefile
+++ b/package/system/ubus/Makefile
@@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubus.git
-PKG_SOURCE_DATE:=2023-06-05
-PKG_SOURCE_VERSION:=f787c97b34894a38b15599886cacbca01271684f
-PKG_MIRROR_HASH:=f4e898eb9207f069652f1767835f6aa9f015df2282d51e50ab57a0c3736f36e3
+PKG_SOURCE_DATE:=2025-07-02
+PKG_SOURCE_VERSION:=5952b48e251c0ea76dfce97f129da6f18d889eda
+PKG_MIRROR_HASH:=3285485a4d9d0e62e4abcfb004d2be0bec7b5ebc564c68030be0c35f0bc223c4
PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE))
CMAKE_INSTALL:=1
--
2.34.1

View File

@@ -15,6 +15,7 @@ packages:
- qca-ssdk-shell
- iperf3
- sysstat
- cig-device-boot
- kmod-cig-wifi-mode-sw
- kmod-input-lsm303agr
- kmod-rtl8221d-phy
@@ -22,3 +23,6 @@ packages:
- kmod-hwmon-tmp103
- kmod-iio-ilps22qs
- kmod-cig-poe-judgment
diffconfig: |
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_STTY=y

View File

@@ -0,0 +1,21 @@
---
profile: emplus_wap380c
target: ipq807x
subtarget: generic
description: Build image for the Emplus WAP380C
image: bin/targets/ipq807x/generic/openwrt-ipq807x-emplus_wap380c-squashfs-sysupgrade.tar
feeds:
- name: ipq807x
path: ../../feeds/ipq807x_v5.4
include:
- ucentral-ap
packages:
- ipq807x
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_TFTP=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_GET=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_PUT=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_BLOCKSIZE=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_PROGRESS_BAR=y

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@@ -0,0 +1,27 @@
---
profile: emplus_wap581
target: ipq50xx
subtarget: generic
description: Build image for Emplus WAP581
image: bin/targets/ipq50xx/generic/openwrt-ipq50xx-emplus_wap581-squashfs-sysupgrade.tar
feeds:
- name: ipq807x
path: ../../feeds/ipq807x_v5.4
include:
- ucentral-ap
packages:
- ipq50xx
- iperf3
- lscpu
- tree
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=512
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_TFTP=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_GET=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_PUT=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_BLOCKSIZE=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_PROGRESS_BAR=y
CONFIG_BUSYBOX_CONFIG_MPSTAT=y
CONFIG_BUSYBOX_CONFIG_PSTREE=y

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@@ -0,0 +1,15 @@
---
profile: sonicfi_rap630e
target: ipq50xx
subtarget: generic
description: Build image for the Sonicfi Wallmount EAP RAP630E
image: bin/targets/ipq50xx/generic/openwrt-ipq50xx-sonicfi_rap630e-squashfs-sysupgrade.tar
feeds:
- name: ipq807x
path: ../../feeds/ipq807x_v5.4
packages:
- ipq50xx
include:
- ucentral-ap
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=512