Merge pull request #758 from Telecominfraproject/main

mediatek: Fix MAC assignment for eth ports on Edgecore EAP112

.github/workflows/build-dev.yml

@@ -21,7 +21,7 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        target: [ 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf196', 'cig_wf189', 'cybertan_eww631-a1', 'cybertan_eww631-b1','sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'sonicfi_rap630w-211g', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_eap112', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'sercomm_ap72tip', 'udaya_a6-id2', 'wallys_dr5018', 'wallys_dr6018', 'wallys_dr6018-v4', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655' ]
+        target: [ 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf196', 'cig_wf189', 'cybertan_eww631-a1', 'cybertan_eww631-b1', 'cybertan_rap63xc-211g','sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'sonicfi_rap630w-211g', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_eap112', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'sercomm_ap72tip', 'udaya_a6-id2', 'udaya_a6-od2', 'wallys_dr5018', 'wallys_dr6018', 'wallys_dr6018-v4', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655' ]
 
     steps:
     - uses: actions/checkout@v3

feeds/ipq807x_v5.4/ath11k-firmware/files/IPQ6018/fw_version.txt

@@ -1 +0,0 @@
-WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1 v1

feeds/ipq807x_v5.4/ath11k-firmware/files/IPQ8074/fw_version.txt

@@ -1 +0,0 @@
-WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1 v2

feeds/ipq807x_v5.4/ath11k-wifi/Makefile

@@ -32,8 +32,7 @@ ALLWIFIBOARDS:= \
 	cybertan-eww622-a1 \
 	cybertan-eww631-a1 \
 	cybertan-eww631-b1 \
-	sonicfi-rap630c-311g \
-	sonicfi-rap630w-311g \
+	cybertan-rap630w-312g \
 	edgecore-eap101 \
 	gl-ax1800 \
 	gl-axt1800 \
@@ -51,12 +50,15 @@ ALLWIFIBOARDS:= \
 	wallys-dr5018 \
 	wallys-dr6018 \
 	wallys-dr6018-v4 \
+	sonicfi-rap630c-311g \
+	sonicfi-rap630w-311g \
 	tplink-ex227 \
 	tplink-ex447 \
 	yuncore-ax840 \
 	yuncore-fap650 \
 	yuncore-fap655 \
 	udaya-a6-id2 \
+	udaya-a6-od2 \
 	meshpp-s618
 
 ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ath11k-wifi-$(BOARD))
@@ -392,8 +394,7 @@ $(eval $(call generate-ath11k-wifi-package,cig-wf194c4,Cigtech WF194c4))
 $(eval $(call generate-ath11k-wifi-package,cybertan-eww622-a1,CyberTan EWW622 A1))
 $(eval $(call generate-ath11k-wifi-package,cybertan-eww631-a1,CyberTan EWW631 A1))
 $(eval $(call generate-ath11k-wifi-package,cybertan-eww631-b1,CyberTan EWW631 B1))
-$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C 311G))
-$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G))
+$(eval $(call generate-ath11k-wifi-package,cybertan-rap630w-312g,CyberTan RAP630W 312G))
 $(eval $(call generate-ath11k-wifi-package,sercomm-wallaby,Sercomm Kiwi))
 $(eval $(call generate-ath11k-wifi-package,wallys-dr6018,Wallys DR6018))
 $(eval $(call generate-ath11k-wifi-package,wallys-dr6018-v4,Wallys DR6018 V4))
@@ -405,6 +406,8 @@ $(eval $(call generate-ath11k-wifi-package,liteon-wpx8324,Liteon WPX8324))
 $(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1))
 $(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1))
 $(eval $(call generate-ath11k-wifi-package,indio-um-510axm-v1,Indio UM-510AXM V1))
+$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C 311G))
+$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G))
 $(eval $(call generate-ath11k-wifi-package,tplink-ex227,TP-Link EX227))
 $(eval $(call generate-ath11k-wifi-package,tplink-ex447,TP-Link EX447))
 $(eval $(call generate-ath11k-wifi-package,yuncore-ax840,YunCore AX840))
@@ -413,6 +416,7 @@ $(eval $(call generate-ath11k-wifi-package,muxi-ap3220l,MUXI AP3220L))
 $(eval $(call generate-ath11k-wifi-package,yuncore-fap650,YunCore FAP650))
 $(eval $(call generate-ath11k-wifi-package,yuncore-fap655,YunCore FAP655))
 $(eval $(call generate-ath11k-wifi-package,udaya-a6-id2,Udaya A6-ID2))
+$(eval $(call generate-ath11k-wifi-package,udaya-a6-od2,Udaya A6-OD2))
 $(eval $(call generate-ath11k-wifi-package,wallys-dr5018,Wallys DR5018))
 
 $(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))

feeds/ipq807x_v5.4/cooling/Makefile

@@ -0,0 +1,51 @@
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+#PKG_BUILD_DIR := $(BUILD_DIR)/$(PKG_NAME)
+
+PKG_NAME:=cooling
+PKG_RELEASE:=1
+
+COOLING_MAKE_OPTS:= \
+        CROSS=$(TARGET_CROSS) \
+        COOLINGDIR=$(PKG_BUILD_DIR) \
+
+include $(INCLUDE_DIR)/package.mk
+
+
+ifeq ($(CONFIG_TARGET_ipq50xx_generic_DEVICE_sonicfi_rap630c_311g),y)
+export TARGET_CFLAGS += -DPLATFORM_RAP630C_311G=1
+endif
+ifeq ($(CONFIG_TARGET_ipq50xx_generic_DEVICE_sonicfi_rap630w_311g),y)
+export TARGET_CFLAGS += -DPLATFORM_RAP630W_311G=1
+endif
+
+define Package/cooling
+  SECTION:=utils
+  CATEGORY:=Utilities
+  MAINTAINER:=Sonicfi
+  DEPENDS:=+libubox +libubus +libuci @TARGET_ipq50xx
+  TITLE:=Wifi Thermal Mitigation daemon for QCA platform
+endef
+
+define Package/cooling/description
+  This package is wifi cooling mitigation daemon.
+endef
+
+define Build/Compile
+	LDFLAGS="$(TARGET_LDFLAGS)" \
+	$(MAKE) -C $(PKG_BUILD_DIR) $(strip $(COOLING_MAKE_OPTS))
+endef
+
+define Package/cooling/install
+	$(INSTALL_DIR) $(1)/usr/sbin
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/cooling $(1)/usr/sbin
+	$(INSTALL_DIR) $(1)/etc/cooling
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/sonicfi-rap630c-311g-cooling.conf $(1)/etc/cooling
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/sonicfi-rap630w-311g-cooling.conf $(1)/etc/cooling
+	$(INSTALL_DIR) $(1)/etc/init.d
+	$(INSTALL_BIN) ./files/cooling.init $(1)/etc/init.d/cooling
+	$(INSTALL_DIR) $(1)/etc/config
+	$(INSTALL_BIN) ./files/cooling.config $(1)/etc/config/cooling
+endef
+
+$(eval $(call BuildPackage,cooling))

feeds/ipq807x_v5.4/cooling/files/cooling.config

@@ -0,0 +1,2 @@
+config cooling config
+    option Enabled '1'

feeds/ipq807x_v5.4/cooling/files/cooling.init

@@ -0,0 +1,31 @@
+#!/bin/sh /etc/rc.common
+
+START=98
+
+SERVICE_WRITE_PID=1
+SERVICE_DAEMONIZE=1
+
+board=$(board_name)
+
+start() {
+	. /lib/functions.sh
+
+	local enabled
+
+	config_load 'cooling'
+	config_get_bool enabled config 'Enabled' '0'
+
+	[ "$enabled" -gt 0 ] || return 1
+
+	case "$board" in
+	sonicfi,rap630c-311g|\
+	sonicfi,rap630w-311g)
+        service_start /usr/sbin/cooling
+		;;
+	esac
+
+}
+
+stop() {
+	service_stop /usr/sbin/cooling
+}

feeds/ipq807x_v5.4/cooling/src/Makefile

@@ -0,0 +1,68 @@
+#****************************************************************************
+#
+#	Copyright (c) 2024 Sonicfi, Inc.
+#	All Rights Reserved.
+#	Sonicfi Confidential and Proprietary.
+#
+#****************************************************************************/
+
+ifneq ($(strip $(TOOLPREFIX)),)
+export  CROSS:=$(TOOLPREFIX)
+endif
+
+COOLING_INSTALL_ROOT := $(COOLINGDIR)/install
+
+ifndef INSTALL_ROOT
+INSTALL_ROOT=$(COOLING_INSTALL_ROOT)
+endif
+
+export CC = $(CROSS)gcc
+export CFLAGS += -O2 -Wall -c
+export STRIP = $(CROSS)strip
+export SOURCES= \
+		cooling.c
+export OBJECTS=$(SOURCES:.c=.o)
+export EXECUTABLE=cooling
+
+LIBS += -lubus -lubox
+CFLAGS += -L$(INSTALL_ROOT)/lib $(TARGET_CFLAGS) \
+		-fstack-protector-all -fpie
+LDFLAGS += $(TARGET_LDFLAGS) -pie
+
+# What we build by default:
+ALL = $(EXECUTABLE)
+
+# RULES ---------------------------------------------------------------
+
+# Making default targets:
+all: local
+	@echo All done in `pwd`
+
+$(EXECUTABLE): $(OBJECTS)
+	$(CC) $(LIB_PATH) $(LIBS) $(LDFLAGS) $(OBJECTS) -o $@
+	@echo Build $@ successufully...
+
+.c.o:
+	$(CC) $(INCLUDE) $(CFLAGS) $(LDFLAGS) $< -o $@
+
+clean:
+	rm -rf *.o *.d $(EXECUTABLE)
+
+local: $(SOURCES) $(EXECUTABLE)
+	@echo Build $@ successufully...
+
+# Doing installation (see comments at top of this file)
+install: local
+	mkdir -p $(INSTALL_ROOT)/usr/sbin/
+	cp -a -f $(ALL) $(INSTALL_ROOT)/usr/sbin/
+	mkdir -p $(INSTALL_ROOT)/etc/cooling
+	cp -a -f sonicfi-rap630*-cooling.conf $(INSTALL_ROOT)/etc/cooling/
+	@echo Installed outputs from `pwd`
+
+# Remove all generated files
+#clean: default_clean # from Makefile.rules
+clean:
+	rm -rf $(INSTALL_ROOT)/usr/sbin/cooling
+	rm -rf ./$(ALL)
+
+# END --------------------------------------------------------------------

feeds/ipq807x_v5.4/cooling/src/cooling.c

@@ -0,0 +1,215 @@
+/*===========================================================================
+
+  cooling.c
+
+  DESCRIPTION 
+  Thermal monitor and mitigation implementation functions.
+
+===========================================================================*/
+#include <stdio.h>		/* Standard input/output definitions */
+#include <stdlib.h>
+#include <string.h>		/* String function definitions */
+#include <unistd.h>		/* UNIX standard function definitions */
+#include <fcntl.h>		/* File control definitions */
+#include <errno.h>		/* Error number definitions */
+#include <getopt.h>
+#include <time.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/resource.h>
+
+#include <libubox/ustream.h>
+#include <libubox/uloop.h>
+#include <libubox/list.h>
+#include <libubox/ulog.h>
+#include <libubus.h>
+
+
+#define CUR_STATE_PATH "/sys/devices/virtual/thermal/cooling_device%i/cur_state"
+#define TEMPER_PATH "/sys/devices/virtual/thermal/thermal_zone%i/temp"
+
+#define PATH_MAX 256
+#define BUF_MAX 8
+#define THERSHOLD_MAX 20
+#define PHY0 0
+#define PHY1 1
+
+typedef unsigned char	u8;
+
+u8 w2g_threshold_level=0;
+u8 w5g_threshold_level=0;
+u8 w2g_cur_temper=0;
+u8 w5g_cur_temper=0;
+
+
+#ifdef PLATFORM_RAP630C_311G
+u8 level_2g_lo[4]={0, 105, 110, 115};
+u8 level_2g_hi[4]={105, 110, 115, 120};
+u8 level_2g_limit[4]={0, 35, 50, 70};
+u8 level_5g_lo[4]={0, 105, 110, 115};
+u8 level_5g_hi[4]={105, 110, 115, 120};
+u8 level_5g_limit[4]={0, 20, 30, 50};
+#endif
+
+#ifdef PLATFORM_RAP630W_311G
+u8 level_2g_lo[4]={0, 105, 110, 115};
+u8 level_2g_hi[4]={105, 110, 115, 120};
+u8 level_2g_limit[4]={0, 20, 50, 70};
+u8 level_5g_lo[4]={0, 105, 110, 115};
+u8 level_5g_hi[4]={105, 110, 115, 120};
+u8 level_5g_limit[4]={0, 20, 50, 70};
+#endif
+
+static char *config_file = NULL;
+char temp[4][BUF_MAX];
+
+#define ULOG_DBG(fmt, ...) ulog(LOG_DEBUG, fmt, ## __VA_ARGS__)
+
+static void write_cur_state (char *filename, int state) {
+	FILE * fp;
+
+	ULOG_DBG("write_cur_state filename=[%s] [%d]\n", filename, state);
+	fp = fopen(filename, "w");
+	if (!fp){
+		ULOG_ERR("some kind of error write cur_state\n");
+	}
+	fprintf(fp, "%d", state);
+	fclose(fp);
+}
+
+static void read_cur_state (char *filename, char *buffer) {
+	FILE * fp;
+
+	fp = fopen(filename, "r");
+	if (!fp){
+		ULOG_ERR("some kind of error write cur_state\n");
+	}
+	if (0 == fread(buffer, sizeof(char), 3, fp)) {
+		ULOG_ERR("some kind of error read value\n");
+	}
+	fclose(fp);
+}
+
+static void wifi_get_temperature() {
+	char filename[PATH_MAX];
+	FILE * fp;
+	int i = 0;
+	char buffer[BUF_MAX];
+
+	/* get current phy cooling state*/
+	for (i=0 ; i <= 1; i++ ) {
+		memset(buffer, 0, BUF_MAX);
+		snprintf(filename, PATH_MAX, CUR_STATE_PATH, i);
+		read_cur_state(filename, buffer);
+		ULOG_DBG("read from Phy%i cur_state is %s\n", i, buffer);
+	}
+
+	for (i=0 ; i <= 3; i++ ) {
+		snprintf(filename, PATH_MAX, TEMPER_PATH, i);
+		fp = fopen(filename, "r");
+		if (!fp) {
+			ULOG_ERR("some kind of error open value\n");
+		}
+		memset(temp[i], 0, BUF_MAX);
+		if (0 == fread(temp[i], sizeof(char), 3, fp)) {
+			ULOG_ERR("some kind of error read value\n");
+		}
+		fclose(fp);
+		ULOG_DBG("thermal_zone%i cur_temp is %s\n", i, temp[i]);
+	}
+
+	w2g_cur_temper=atoi(temp[0]);
+	w5g_cur_temper=atoi(temp[3]);
+}
+
+static void wifi_set_cooling() {
+	char filename[PATH_MAX];
+	int level;
+
+	for (level=0 ; level<=3 ; level++) {
+		if (w2g_cur_temper >= level_2g_lo[level] && w2g_cur_temper < level_2g_hi[level]) {
+			ULOG_DBG("2G at level %d , %d degree\n" ,level, w2g_cur_temper);
+			if (w2g_threshold_level != level) {
+				ULOG_DBG("setting 2G reduce %d percent\n" ,level_2g_limit[level]);
+				snprintf(filename, PATH_MAX, CUR_STATE_PATH, PHY0);
+				write_cur_state(filename, level_2g_limit[level]);
+				w2g_threshold_level = level;
+			}
+		}
+		if (w5g_cur_temper >= level_5g_lo[level] && w5g_cur_temper < level_5g_hi[level]) {
+			ULOG_DBG("5G at level %d , %d degree\n" ,level, w5g_cur_temper);
+			if (w5g_threshold_level != level) {
+				ULOG_DBG("setting 5G reduce %d percent\n" ,level_5g_limit[level]);
+				snprintf(filename, PATH_MAX, CUR_STATE_PATH, PHY1);
+				write_cur_state(filename, level_5g_limit[level]);
+				w5g_threshold_level = level;
+			}
+		}
+	}
+}
+
+static void cooling_init() {
+	char filename[256];
+	int i;
+
+	for (i=0 ; i <= 1; i++) {
+		snprintf(filename, PATH_MAX, CUR_STATE_PATH, i);
+		write_cur_state(filename, 0);
+	}
+}
+
+void print_usage(void)
+{
+	printf("\nWifi-cooling daemon usage\n");
+	printf("Optional arguments:\n");
+	printf("  -c <file>        config file\n");
+	printf("  -d               debug output\n");
+	printf("  -h               this usage screen\n");
+}
+
+static void state_timeout_cb(struct uloop_timeout *t) 
+{
+	wifi_get_temperature();
+	wifi_set_cooling();
+	uloop_timeout_set(t, 30 * 1000);		// interval 30 seconds
+}
+
+int main(int argc, char *argv[]) 
+{
+	int ch;
+	struct uloop_timeout state_timeout = {
+		.cb = state_timeout_cb,
+	};
+
+	setpriority(PRIO_PROCESS, getpid(), -20);
+
+	ulog_open(ULOG_STDIO | ULOG_SYSLOG, LOG_DAEMON, "cooling");
+	ulog_threshold(LOG_INFO);
+
+	while ((ch = getopt(argc, argv, "c:dh")) != -1) {
+		switch (ch) {
+		case 'c':
+			printf("wifi-cooling load configuration file %s\n", optarg);
+			config_file = optarg;
+			break;
+		case 'd':
+			printf("wifi-cooling ulog_threshold set to debug level\n");
+			ulog_threshold(LOG_DEBUG);
+			break;
+		case 'h':
+		default:
+			print_usage();
+			return 0;
+		}
+
+	}
+
+	cooling_init();
+	uloop_init();
+	uloop_timeout_set(&state_timeout, 1000);
+	uloop_run();
+	uloop_done();
+
+	return 0;
+}

feeds/ipq807x_v5.4/cooling/src/sonicfi-rap630c-311g-cooling.conf

@@ -0,0 +1,15 @@
+sampling 5000
+
+[tsens_tz_sensor1]
+sampling 	5000
+thresholds 			105			110			115			119			120
+thresholds_clr 		0			100			105			110			115
+actions 			cooling		cooling	 	cooling		cooling		shutdown
+action_info 		0			35	 		50			70			800000
+
+[tsens_tz_sensor4]
+sampling 	5000
+thresholds 			105			110			115			119			120
+thresholds_clr 		0			100			105			110			115
+actions 			cooling		cooling		cooling		cooling		shutdown
+action_info 		0			20			30	 		50			800000

feeds/ipq807x_v5.4/cooling/src/sonicfi-rap630w-311g-cooling.conf

@@ -0,0 +1,15 @@
+sampling 5000
+
+[tsens_tz_sensor1]
+sampling 	5000
+thresholds 			105			115			119			125
+thresholds_clr 		0			105			110			120
+actions 			cooling		cooling	 	cooling		cooling
+action_info 		0			20	 		50			70
+
+[tsens_tz_sensor4]
+sampling 	5000
+thresholds 			105			115			119			125
+thresholds_clr 		0			105			110			120
+actions 			cooling		cooling		cooling		cooling
+action_info 		0			20			50	 		70

feeds/ipq807x_v5.4/hostapd/files/afcd.init

@@ -25,7 +25,7 @@ _afc_location() {
 	# create afc-location.json
 	procd_open_instance
 	procd_set_param command "$PROG" /usr/share/hostap/afc_location.uc
-	procd_set_param respawn
+	procd_set_param respawn 0 60 5
 	procd_close_instance
 }
 

feeds/ipq807x_v5.4/hostapd/files/mpskd

@@ -225,9 +225,13 @@ function sta_auth_psk(ifname, addr) {
 	if (!ssid)
 		return;
 
-	let cache = sta_cache_entry_get(ssid, addr);
-	if (cache)
-		return [ cache.key ];
+	if (interfaces[ifname]?.band == '6g') {
+		let cache = sta_cache_entry_get(ssid, addr);
+		if (cache)
+			return [ cache.key ];
+	} else if (cache[ssid]) {
+		delete cache[ssid][addr];
+	}
 
 	return ssid_psk(ssid, addr);
 }

feeds/ipq807x_v5.4/ipq50xx/base-files/etc/board.d/01_leds

@@ -24,6 +24,11 @@ cybertan,eww631-a1|\
 cybertan,eww631-b1)
         ucidef_set_led_default "power" "POWER" "sys:blue" "on"
 	;;
+cybertan,rap630w-312g)
+	ucidef_set_led_default "power" "POWER" "red:power" "on"
+	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy0tpt"
+	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy1tpt"
+	;;
 sonicfi,rap630c-311g|\
 sonicfi,rap630w-311g)
         ucidef_set_led_default "power" "POWER" "pwm:blue" "on"

feeds/ipq807x_v5.4/ipq50xx/base-files/etc/board.d/02_network

@@ -27,10 +27,18 @@ qcom_setup_interfaces()
 	cybertan,eww631-b1)
 		ucidef_add_switch "switch1" "5:wan" "2:lan" "3:lan" "4:lan" "6@eth0"
 		;;
+	cybertan,rap630w-312g)
+		ucidef_add_switch "switch1" \
+			"6@eth1" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan"
+		;;
 	udaya,a6-id2)
 		ucidef_set_interface_wan "eth1"
 		ucidef_set_interface_lan "eth0"
 		;;
+	udaya,a6-od2)
+		ucidef_set_interface_wan "eth1"
+		ucidef_set_interface_lan "eth0"
+		;;
 	edgecore,oap101|\
  	edgecore,oap101-6e|\
 	edgecore,oap101e|\

feeds/ipq807x_v5.4/ipq50xx/base-files/etc/hotplug.d/firmware/10-ath11k-caldata

@@ -123,6 +123,7 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
 	sonicfi,rap630w-311g|\
 	cybertan,eww631-a1|\
 	cybertan,eww631-b1|\
+	cybertan,rap630w-312g|\
 	edgecore,eap104|\
 	edgecore,oap101|\
 	edgecore,oap101-6e|\
@@ -135,6 +136,7 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
 	optimcloud,d50|\
 	optimcloud,d50-5g|\
 	udaya,a6-id2|\
+	udaya,a6-od2|\
 	wallys,dr5018|\
 	yuncore,fap655|\
 	glinet,b3000)
@@ -150,11 +152,13 @@ ath11k/qcn6122/hw1.0/caldata_1.bin)
 	sonicfi,rap630w-311g|\
 	cybertan,eww631-a1|\
 	cybertan,eww631-b1|\
+	cybertan,rap630w-312g|\
 	edgecore,oap101|\
 	edgecore,oap101-6e|\
 	edgecore,oap101e|\
 	edgecore,oap101e-6e|\
 	udaya,a6-id2|\
+	udaya,a6-od2|\
 	hfcl,ion4xi_w|\
 	wallys,dr5018|\
 	yuncore,fap655)
@@ -215,6 +219,7 @@ ath11k-macs)
 	optimcloud,d60-5g|\
 	optimcloud,d50|\
 	optimcloud,d50-5g|\
+	cybertan,rap630w-312g|\
 	yuncore,fap655)
 		ath11k_generate_macs
 		;;

feeds/ipq807x_v5.4/ipq50xx/base-files/lib/upgrade/platform.sh

@@ -74,6 +74,7 @@ platform_check_image() {
 	sonicfi,rap630w-311g|\
 	cybertan,eww631-a1|\
 	cybertan,eww631-b1|\
+	cybertan,rap630w-312g|\
 	edgecore,eap104|\
 	wallys,dr5018|\
 	hfcl,ion4x_w|\
@@ -85,6 +86,7 @@ platform_check_image() {
 	yuncore,fap655|\
 	glinet,b3000|\
 	udaya,a6-id2|\
+	udaya,a6-od2|\
 	edgecore,oap101|\
 	edgecore,oap101-6e|\
 	edgecore,oap101e|\
@@ -128,6 +130,7 @@ platform_do_upgrade() {
 	cig,wf186w|\
 	cig,wf186h|\
 	udaya,a6-id2|\
+	udaya,a6-od2|\
 	wallys,dr5018|\
 	optimcloud,d60|\
 	optimcloud,d60-5g|\
@@ -143,16 +146,17 @@ platform_do_upgrade() {
 	sonicfi,rap630c-311g|\
 	sonicfi,rap630w-311g|\
 	cybertan,eww631-a1|\
-	cybertan,eww631-b1)
+	cybertan,eww631-b1|\
+	cybertan,rap630w-312g)
 		boot_part=$(fw_printenv bootfrom | cut  -d = -f2)
-		echo "Current bootfrom is $boot_part"
-		if [[ $boot_part == 1 ]]; then
-			CI_UBIPART="rootfs"
-			CI_FWSETENV="bootfrom 0"
-		else
-			CI_UBIPART="rootfs_1"
-			CI_FWSETENV="bootfrom 1"
-		fi
+			echo "Current bootfrom is $boot_part"
+			if [[ $boot_part == 1 ]]; then
+				CI_UBIPART="rootfs"
+				CI_FWSETENV="bootfrom 0"
+			elif [[ $boot_part == 0 ]]; then
+				CI_UBIPART="rootfs_1"
+				CI_FWSETENV="bootfrom 1"
+			fi
 		nand_upgrade_tar "$1"
 		;;
 	esac

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-rap630w-312g.dts

@@ -0,0 +1,925 @@
+/dts-v1/;
+/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
+ *
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "ipq5018.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "Cybertan RAP630W-312G";
+	compatible = "cybertan,rap630w-312g", "qcom,ipq5018-mp03.3", "qcom,ipq5018";
+	interrupt-parent = <&intc>;
+
+	aliases {
+		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
+		serial0 = &blsp1_uart1;
+		serial1 = &blsp1_uart2;
+		ethernet0 = "/soc/dp1";
+                ethernet1 = "/soc/dp2";
+
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
+		bootargs-append = " swiotlb=1 coherent_pool=2M";
+		stdout-path = "serial0";
+	};
+
+	reserved-memory {
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+	/*		   256 MB Profile
+	 * +==========+==============+=========================+
+	 * |	  |	      |			 |
+	 * |  Region  | Start Offset |	  Size	   |
+	 * |	  |	      |			 |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |	   8MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x40800000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |	   4MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |	   4MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |	      |			 |
+	 * |   code/  |  0x4B000000  |	  20MB	   |
+	 * |   data   |	      |			 |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |	      |			 |
+	 * |   data   |  0x4C400000  |	  13MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |	      |			 |
+	 * |  M3 Dump |  0x4D100000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |	      |			 |
+	 * |   QDSS   |  0x4D200000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|	      |			 |
+	 * |   data   |  0x4D300000  |	  13MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|	      |			 |
+	 * |  M3 Dump |  0x4E000000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|	      |			 |
+	 * |   QDSS   |  0x4E100000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|	      |			 |
+	 * |   data   |  0x4E200000  |	  13MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|	      |			 |
+	 * |  M3 Dump |  0x4EF00000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|	      |			 |
+	 * |   QDSS   |  0x4F000000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |						   |
+	 * |	    Rest of the memory for Linux	   |
+	 * |						   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x4100000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x1400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xD00000>;
+		};
+
+		m3_dump: m3_dump@4D100000 {
+			no-map;
+			reg = <0x0 0x4D100000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0xD00000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 {
+			no-map;
+			reg = <0x0 0x4E000000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 {
+			no-map;
+			reg = <0x0 0x4E100000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E200000 {
+			no-map;
+			reg = <0x0 0x4E200000 0x0 0xD00000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 {
+			no-map;
+			reg = <0x0 0x4EF00000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 {
+			no-map;
+			reg = <0x0 0x4F000000 0x0 0x100000>;
+		};
+	#else
+	/*		 512MB/1GB Profiles
+	 * +==========+==============+=========================+
+	 * |	  |	      |			 |
+	 * |  Region  | Start Offset |	  Size	   |
+	 * |	  |	      |			 |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |	  16MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x41000000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |	   4MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |	   4MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |	      |			 |
+	 * |   code/  |  0x4B000000  |	  20MB	   |
+	 * |   data   |	      |			 |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |	      |			 |
+	 * |   data   |  0x4C400000  |	  13MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |	      |			 |
+	 * |  M3 Dump |  0x4D100000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |	      |			 |
+	 * |   QDSS   |  0x4D200000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |	      |			 |
+	 * |  Caldb   |  0x4D300000  |	   2MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|	      |			 |
+	 * |   data   |  0x4D500000  |	  13MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|	      |			 |
+	 * |  M3 Dump |  0x4E200000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|	      |			 |
+	 * |   QDSS   |  0x4E300000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|	      |			 |
+	 * |  Caldb   |  0x4E400000  |	   5MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|	      |			 |
+	 * |   data   |  0x4E900000  |	  13MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|	      |			 |
+	 * |  M3 Dump |  0x4F600000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|	      |			 |
+	 * |   QDSS   |  0x4F700000  |	   1MB	   |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|	      |			 |
+	 * |  Caldb   |  0x4F800000  |	   5MB	   |
+	 * +----------+--------------+-------------------------+
+	 * |						   |
+	 * |	    Rest of the memory for Linux	   |
+	 * |						   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x4D00000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 01400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xD00000>;
+		};
+
+		m3_dump: m3_dump@4D100000 {
+			no-map;
+			reg = <0x0 0x4D100000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_caldb_region: q6_caldb_region@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0x200000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D500000 {
+			no-map;
+			reg = <0x0 0x4D500000 0x0 0xD00000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
+			no-map;
+			reg = <0x0 0x4E200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
+			no-map;
+			reg = <0x0 0x4E300000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
+			no-map;
+			reg = <0x0 0x4E400000 0x0 0x500000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
+			no-map;
+			reg = <0x0 0x4E900000 0x0 0xD00000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F600000 {
+			no-map;
+			reg = <0x0 0x4F600000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F700000 {
+			no-map;
+			reg = <0x0 0x4F700000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4F800000 {
+			no-map;
+			reg = <0x0 0x4F800000 0x0 0x500000>;
+		};
+
+	#endif
+	};
+
+	soc {
+		serial@78af000 {
+			status = "ok";
+		};
+
+		blsp1_uart2: serial@78b0000 {
+			pinctrl-0 = <&blsp1_uart_pins>;
+			pinctrl-names = "default";
+			status = "disabled";
+		};
+
+		qpic_bam: dma@7984000{
+			status = "ok";
+		};
+
+		nand: qpic-nand@79b0000 {
+			pinctrl-0 = <&qspi_nand_pins>;
+			pinctrl-names = "default";
+			status = "ok";
+		};
+
+		spi_0: spi@78b5000 { /* BLSP1 QUP0 */
+			pinctrl-0 = <&blsp0_spi_pins>;
+			pinctrl-names = "default";
+			cs-select = <0>;
+			status = "ok";
+
+			m25p80@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0>;
+				compatible = "n25q128a11";
+				linux,modalias = "m25p80", "n25q128a11";
+				spi-max-frequency = <50000000>;
+				use-default-sizes;
+			};
+		};
+
+		mdio0: mdio@88000 {
+			status = "ok";
+
+			ethernet-phy@0 {
+				reg = <7>;
+			};
+		};
+
+		mdio1: mdio@90000 {
+			status = "ok";
+			pinctrl-0 = <&mdio1_pins>;
+			pinctrl-names = "default";
+			phy-reset-gpio = <&tlmm 16 0>;
+			ethernet-phy@0 {
+				reg = <0>;
+			};
+
+			ethernet-phy@1 {
+				reg = <1>;
+			};
+
+			ethernet-phy@2 {
+				reg = <2>;
+			};
+
+			ethernet-phy@3 {
+				reg = <3>;
+			};
+			ethernet-phy@4 {
+				reg = <4>;
+			};
+		};
+
+		ess-instance {
+			num_devices = <0x2>;
+			ess-switch@0x39c00000 {
+				compatible = "qcom,ess-switch-ipq50xx";
+				device_id = <0>;
+				switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
+				cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <7>;
+						phy_dac = <0x10 0x10>;
+						mdiobus = <&mdio0>;
+					};
+					port@1 {
+						mdio-bus = <&mdio0>;
+						port_id = <2>;
+						forced-speed = <1000>;
+						forced-duplex = <1>;
+					};
+				};
+				led_source@0 {
+					source = <0>;
+					mode = "normal";
+					speed = "all";
+					blink_en = "enable";
+					active = "high";
+				};
+			};
+			ess-switch1@1 {
+				compatible = "qcom,ess-switch-qca83xx";
+				device_id = <1>;
+				switch_access_mode = "mdio";
+				mdio-bus = <&mdio1>;
+				reset_gpio = <&tlmm 0x10 0>;   /* gpio 16 */
+				switch_cpu_bmp = <0x40>;  /* cpu port bitmap */
+				switch_lan_bmp = <0x3e>; /* lan port bitmap */
+				switch_wan_bmp = <0x0>;  /* wan port bitmap */
+				qca,ar8327-initvals = <
+						0x00004 0x7600000   /* PAD0_MODE */
+						0x00008 0x1000000   /* PAD5_MODE */
+						0x0000c 0x80        /* PAD6_MODE */
+						0x00010 0x2613a0    /* PORT6 FORCE MODE*/
+						0x000e4 0xaa545     /* MAC_POWER_SEL */
+						0x000e0 0xc74164de  /* SGMII_CTRL */
+						0x0007c 0x4e        /* PORT0_STATUS */
+						0x00094 0x4e        /* PORT6_STATUS */
+				>;
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <0>;
+					};
+					port@1 {
+						port_id = <2>;
+						phy_address = <1>;
+					};
+					port@2 {
+						port_id = <3>;
+						phy_address = <2>;
+					};
+					port@3 {
+						port_id = <4>;
+						phy_address = <3>;
+					};
+					port@4 {
+						port_id = <5>;
+						phy_address = <4>;
+					};
+				};
+			};
+		};
+
+		wifi0: wifi@c000000 {
+			status = "ok";
+		};
+
+		dp1 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <1>;
+			reg = <0x39C00000 0x10000>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <7>;
+			mdio-bus = <&mdio0>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		dp2 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <2>;
+			reg = <0x39D00000 0x10000>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			mdio-bus = <&mdio1>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		nss-macsec1 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <0x1c>;
+			mdiobus = <&mdio1>;
+		};
+	};
+
+	qcom,test@0 {
+		status = "ok";
+	};
+
+	thermal-zones {
+		status = "ok";
+	};
+};
+
+&tlmm {
+	pinctrl-0 = <&blsp0_uart_pins>;
+	pinctrl-names = "default";
+
+	blsp0_uart_pins: uart_pins {
+		blsp0_uart_rx_tx {
+			pins = "gpio20", "gpio21";
+			function = "blsp0_uart0";
+			bias-disable;
+		};
+	};
+
+	blsp1_uart_pins: blsp1_uart_pins {
+		blsp1_uart_rx_tx {
+			pins = "gpio23", "gpio25", "gpio24", "gpio26";
+			function = "blsp1_uart2";
+			bias-disable;
+		};
+	};
+
+	blsp0_spi_pins: blsp0_spi_pins {
+		mux {
+			pins = "gpio10", "gpio11", "gpio12", "gpio13";
+			function = "blsp0_spi";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	qspi_nand_pins: qspi_nand_pins {
+		qspi_clock {
+			pins = "gpio9";
+			function = "qspi_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		qspi_cs {
+			pins = "gpio8";
+			function = "qspi_cs";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		qspi_data {
+			pins = "gpio4", "gpio5", "gpio6", "gpio7";
+			function = "qspi_data";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	mdio1_pins: mdio_pinmux {
+		mux_0 {
+			pins = "gpio36";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mux_1 {
+			pins = "gpio37";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+//	phy_led_pins: phy_led_pins {
+//		gephy_led_pin {
+//			pins = "gpio50";
+//			function = "led0";
+//			drive-strength = <8>;
+//			bias-pull-down;
+//		};
+//	};
+
+	button_pins: button_pins {
+		wps_button {
+			pins = "gpio38";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	leds_pins: leds_pins {
+		led_sys {
+			pins = "gpio24";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_5g {
+			pins = "gpio22";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_2g {
+			pins = "gpio23";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+		led_onekey {
+	            pins = "gpio46";
+        	    function = "gpio";
+        	    drive-strength = <8>;
+        	    bias-pull-down;
+        	}; 
+	};
+};
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+		button@1 {
+			label = "restart";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			debounce-interval = <60>;
+		};
+	};
+
+	leds {
+  	      compatible = "gpio-leds";
+		pinctrl-0 = <&leds_pins>;
+		pinctrl-names = "default";
+
+		led_power: led24 {
+			label = "red:power";
+			gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "default-on";
+			default-state = "on";
+		};
+
+		led22 {
+			label = "green:wifi5";
+			gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "default-on";
+			default-state = "off";
+		};
+
+		led23 {
+			label = "green:wifi2";
+			gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "default-on";
+			default-state = "off";
+		};
+		led46 {
+  			label = "led_onekey";
+			gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;  
+			linux,default-trigger = "led_onekey";
+			default-state = "off";
+		};
+	};
+
+
+	 gpio_keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		wps {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			debounce-interval = <60>;
+		};
+	};
+};
+
+&q6v5_wcss {
+	compatible = "qcom,ipq5018-q6-mpd";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	firmware = "IPQ5018/q6_fw.mdt";
+	reg = <0x0cd00000 0x4040>,
+		<0x1938000 0x8>,
+		<0x193d204 0x4>;
+	reg-names = "qdsp6",
+			"tcsr-msip",
+			"tcsr-q6";
+	resets = <&gcc GCC_WCSSAON_RESET>,
+			<&gcc GCC_WCSS_Q6_BCR>;
+
+	reset-names = "wcss_aon_reset",
+			"wcss_q6_reset";
+
+	clocks = <&gcc GCC_Q6_AXIS_CLK>,
+		<&gcc GCC_WCSS_ECAHB_CLK>,
+		<&gcc GCC_Q6_AXIM_CLK>,
+		<&gcc GCC_Q6_AXIM2_CLK>,
+		<&gcc GCC_Q6_AHB_CLK>,
+		<&gcc GCC_Q6_AHB_S_CLK>,
+		<&gcc GCC_WCSS_AXI_S_CLK>;
+	clock-names = "gcc_q6_axis_clk",
+		"gcc_wcss_ecahb_clk",
+		"gcc_q6_axim_clk",
+		"gcc_q6_axim2_clk",
+		"gcc_q6_ahb_clk",
+		"gcc_q6_ahb_s_clk",
+		"gcc_wcss_axi_s_clk";
+
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>;
+	#else
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>,
+				<&q6_caldb_region>;
+	#endif
+
+	qcom,rproc = <&q6v5_wcss>;
+	qcom,bootargs_smem = <507>;
+	boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
+			<0x2 0x4 0x2 0x12 0x0 0x0>;
+	status = "ok";
+	q6_wcss_pd1: remoteproc_pd1@4ab000 {
+		compatible = "qcom,ipq5018-wcss-ahb-mpd";
+		reg = <0x4ab000 0x20>;
+		reg-names = "rmb";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "IPQ5018/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 8 0>,
+					<&wcss_smp2p_in 9 0>,
+					<&wcss_smp2p_in 12 0>,
+					<&wcss_smp2p_in 11 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		resets = <&gcc GCC_WCSSAON_RESET>,
+				<&gcc GCC_WCSS_BCR>,
+				<&gcc GCC_CE_BCR>;
+		reset-names = "wcss_aon_reset",
+				"wcss_reset",
+				"ce_reset";
+
+		clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
+				<&gcc GCC_WCSS_ACMT_CLK>,
+				<&gcc GCC_WCSS_AXI_M_CLK>;
+		clock-names = "gcc_wcss_ahb_s_clk",
+					"gcc_wcss_acmt_clk",
+					"gcc_wcss_axi_m_clk";
+
+		qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
+
+		qcom,smem-states = <&wcss_smp2p_out 8>,
+					<&wcss_smp2p_out 9>,
+					<&wcss_smp2p_out 10>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>;
+	#else
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>, <&q6_caldb_region>;
+	#endif
+
+	};
+
+	q6_wcss_pd2: remoteproc_pd2 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "qcn6122/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 16 0>,
+					<&wcss_smp2p_in 17 0>,
+					<&wcss_smp2p_in 20 0>,
+					<&wcss_smp2p_in 19 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 16>,
+					<&wcss_smp2p_out 17>,
+					<&wcss_smp2p_out 18>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>;
+	#else
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
+	#endif
+
+	};
+
+	q6_wcss_pd3: remoteproc_pd3 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 24 0>,
+					<&wcss_smp2p_in 25 0>,
+					<&wcss_smp2p_in 28 0>,
+					<&wcss_smp2p_in 27 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 24>,
+					<&wcss_smp2p_out 25>,
+					<&wcss_smp2p_out 26>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef	__IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>;
+	#else
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
+	#endif
+	};
+};
+
+&wifi0 {
+	/* IPQ5018 */
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd1>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x23>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4D300000 0x4D300000 0 0 0>;
+	qcom,caldb-size = <0x200000>;
+	mem-region = <&q6_ipq5018_data>;
+#else
+	memory-region = <&q6_ipq5018_data>;
+#endif
+	status = "ok";
+};
+
+&wifi1 {
+	/* QCN6122 5G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
+	qcom,rproc = <&q6_wcss_pd2>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x60>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4D500000 0x4D500000 0x4D300000 0x0 0x0>;
+	qcom,caldb-addr = <0x4E400000 0x4E400000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data1>;
+#else
+	memory-region = <&q6_qcn6122_data1>;
+#endif
+	status = "ok";
+};
+
+&wifi2 {
+	/* QCN6122 6G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
+	qcom,rproc = <&q6_wcss_pd3>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0xb0>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4E900000 0x4E900000 0x4E200000 0x0 0x0>;
+	qcom,caldb-addr = <0x4F800000 0x4F800000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data2>;
+#else
+	memory-region = <&q6_qcn6122_data2>;
+#endif
+	status = "disabled";
+};
+
+&usb3 {
+       status = "ok";
+       /* device-power-gpio = <&tlmm 24 1>; */
+};
+
+&dwc_0 {
+       /delete-property/ #phy-cells;
+       /delete-property/ phys;
+       /delete-property/ phy-names;
+};
+
+&hs_m31phy_0 {
+       status = "ok";
+};
+
+&eud {
+	status = "ok";
+};
+
+&pcie_x1 {
+	perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x2 {
+	perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x1_rp {
+	status = "disabled";
+
+	mhi_0: qcom,mhi@0 {
+		reg = <0 0 0 0 0 >;
+	};
+};
+
+&pcie_x2_rp {
+	status = "disabled";
+
+	mhi_1: qcom,mhi@1 {
+		reg = <0 0 0 0 0 >;
+
+	};
+};

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-udaya-a6-od2.dts

@@ -0,0 +1,900 @@
+/dts-v1/;
+/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
+ *
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "ipq5018.dtsi"
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "Udaya A6-OD2";
+	compatible = "udaya,a6-od2", "qcom,ipq5018";
+	interrupt-parent = <&intc>;
+
+	aliases {
+		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
+		serial0 = &blsp1_uart1;
+		serial1 = &blsp1_uart2;
+		ethernet0 = "/soc/dp1";
+		ethernet1 = "/soc/dp2";
+
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
+		bootargs-append = " swiotlb=1 coherent_pool=2M";
+		stdout-path = "serial0";
+	};
+
+	reserved-memory {
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+	/*                   256 MB Profile
+	 * +==========+==============+=========================+
+	 * |          |              |                         |
+	 * |  Region  | Start Offset |          Size           |
+	 * |          |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |           8MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x40800000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |              |                         |
+	 * |   code/  |  0x4B000000  |          20MB           |
+	 * |   data   |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   data   |  0x4C400000  |          13MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  M3 Dump |  0x4D100000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   QDSS   |  0x4D200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   data   |  0x4D300000  |          13MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  M3 Dump |  0x4E000000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   QDSS   |  0x4E100000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   data   |  0x4E200000  |          13MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  M3 Dump |  0x4EF00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   QDSS   |  0x4F000000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |                                                   |
+	 * |            Rest of the memory for Linux           |
+	 * |                                                   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x4100000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x1400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xD00000>;
+		};
+
+		m3_dump: m3_dump@4D100000 {
+			no-map;
+			reg = <0x0 0x4D100000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0xD00000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 {
+			no-map;
+			reg = <0x0 0x4E000000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 {
+			no-map;
+			reg = <0x0 0x4E100000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E200000 {
+			no-map;
+			reg = <0x0 0x4E200000 0x0 0xD00000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 {
+			no-map;
+			reg = <0x0 0x4EF00000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 {
+			no-map;
+			reg = <0x0 0x4F000000 0x0 0x100000>;
+		};
+	#else
+	/*                 512MB/1GB Profiles
+	 * +==========+==============+=========================+
+	 * |          |              |                         |
+	 * |  Region  | Start Offset |          Size           |
+	 * |          |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x41000000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |              |                         |
+	 * |   code/  |  0x4B000000  |          20MB           |
+	 * |   data   |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   data   |  0x4C400000  |          13MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  M3 Dump |  0x4D100000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   QDSS   |  0x4D200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  Caldb   |  0x4D300000  |           2MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   data   |  0x4D500000  |          13MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  M3 Dump |  0x4E200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   QDSS   |  0x4E300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  Caldb   |  0x4E400000  |           5MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   data   |  0x4E900000  |          13MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  M3 Dump |  0x4F600000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   QDSS   |  0x4F700000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  Caldb   |  0x4F800000  |           5MB           |
+	 * +----------+--------------+-------------------------+
+	 * |                                                   |
+	 * |            Rest of the memory for Linux           |
+	 * |                                                   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x4D00000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 01400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xD00000>;
+		};
+
+		m3_dump: m3_dump@4D100000 {
+			no-map;
+			reg = <0x0 0x4D100000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_caldb_region: q6_caldb_region@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0x200000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D500000 {
+			no-map;
+			reg = <0x0 0x4D500000 0x0 0xD00000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
+			no-map;
+			reg = <0x0 0x4E200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
+			no-map;
+			reg = <0x0 0x4E300000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
+			no-map;
+			reg = <0x0 0x4E400000 0x0 0x500000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
+			no-map;
+			reg = <0x0 0x4E900000 0x0 0xD00000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F600000 {
+			no-map;
+			reg = <0x0 0x4F600000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F700000 {
+			no-map;
+			reg = <0x0 0x4F700000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4F800000 {
+			no-map;
+			reg = <0x0 0x4F800000 0x0 0x500000>;
+		};
+
+	#endif
+	};
+
+	soc {
+		serial@78af000 {
+			status = "ok";
+		};
+
+		blsp1_uart2: serial@78b0000 {
+			pinctrl-0 = <&blsp1_uart_pins>;
+			pinctrl-names = "default";
+		};
+
+		qpic_bam: dma@7984000{
+			status = "ok";
+		};
+
+		nand: qpic-nand@79b0000 {
+			pinctrl-0 = <&qspi_nand_pins>;
+			pinctrl-names = "default";
+			status = "ok";
+		};
+
+		spi_0: spi@78b5000 { /* BLSP1 QUP0 */
+			pinctrl-0 = <&blsp0_spi_pins>;
+			pinctrl-names = "default";
+			cs-select = <0>;
+			status = "ok";
+
+			m25p80@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0>;
+				compatible = "n25q128a11";
+				linux,modalias = "m25p80", "n25q128a11";
+				spi-max-frequency = <50000000>;
+				use-default-sizes;
+			};
+		};
+
+		mdio0: mdio@88000 {
+			status = "ok";
+
+			ethernet-phy@0 {
+				reg = <7>;
+			};
+		};
+
+		mdio1: mdio@90000 {
+			status = "ok";
+			pinctrl-0 = <&mdio1_pins>;
+			pinctrl-names = "default";
+			phy-reset-gpio = <&tlmm 39 0>;
+
+			ethernet-phy@0 {
+				reg = <28>;
+			};
+		};
+
+		ess-instance {
+			num_devices = <0x1>;
+			ess-switch@0x39c00000 {
+				switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
+				cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <7>;
+						mdiobus = <&mdio0>;
+					};
+					port@1 {
+						port_id = <2>;
+						phy_address = <0x1c>;
+						mdiobus = <&mdio1>;
+						port_mac_sel = "QGMAC_PORT";
+					};
+				};
+				led_source@0 {
+					source = <0>;
+					mode = "normal";
+					speed = "all";
+					blink_en = "enable";
+					active = "high";
+				};
+			};
+		};
+
+		dp1 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <1>;
+			reg = <0x39C00000 0x10000>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <7>;
+			mdio-bus = <&mdio0>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+			qcom,rx-page-mode = <0>;
+		};
+
+		dp2 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <2>;
+			reg = <0x39D00000 0x10000>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <28>;
+			mdio-bus = <&mdio1>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+			qcom,rx-page-mode = <0>;
+		};
+
+		nss-macsec1 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <0x1c>;
+			mdiobus = <&mdio1>;
+		};
+
+		pcm: pcm@0xA3C0000{
+			pinctrl-0 = <&audio_pins>;
+			pinctrl-names = "default";
+		};
+
+		gpio_keys {
+			compatible = "gpio-keys";
+			pinctrl-0 = <&button_pins>;
+			pinctrl-names = "default";
+
+			reset {
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+				linux,input-type = <1>;
+				debounce-interval = <60>;
+			};
+		};
+
+		leds {
+			compatible = "gpio-leds";
+			pinctrl-0 = <&leds_pins>;
+			pinctrl-names = "default";
+
+			led_power: led@30 {
+				label = "green:power";
+				gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
+				default-state = "on";
+			};
+		};
+	};
+
+	qcom,test@0 {
+		status = "ok";
+	};
+
+	thermal-zones {
+		status = "ok";
+	};
+};
+
+&tlmm {
+	pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
+	pinctrl-names = "default";
+
+	blsp0_uart_pins: uart_pins {
+		blsp0_uart_rx_tx {
+			pins = "gpio20", "gpio21";
+			function = "blsp0_uart0";
+			bias-disable;
+		};
+	};
+
+	blsp1_uart_pins: blsp1_uart_pins {
+		blsp1_uart_rx_tx {
+			pins = "gpio23", "gpio25", "gpio24", "gpio26";
+			function = "blsp1_uart2";
+			bias-disable;
+		};
+	};
+
+	blsp0_spi_pins: blsp0_spi_pins {
+		mux {
+			pins = "gpio10", "gpio11", "gpio12", "gpio13";
+			function = "blsp0_spi";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	qspi_nand_pins: qspi_nand_pins {
+		qspi_clock {
+			pins = "gpio9";
+			function = "qspi_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		qspi_cs {
+			pins = "gpio8";
+			function = "qspi_cs";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		qspi_data {
+			pins = "gpio4", "gpio5", "gpio6", "gpio7";
+			function = "qspi_data";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	mdio1_pins: mdio_pinmux {
+		mux_0 {
+			pins = "gpio36";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mux_1 {
+			pins = "gpio37";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	phy_led_pins: phy_led_pins {
+		gephy_led_pin {
+			pins = "gpio46";
+			function = "led0";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	i2c_pins: i2c_pins {
+		i2c_scl {
+			pins = "gpio25";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		i2c_sda {
+			pins = "gpio26";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	button_pins: button_pins {
+		reset_button {
+			pins = "gpio38";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	leds_pins: leds_pins {
+		led_status {
+			pins = "gpio30";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	audio_pins: audio_pinmux {
+		mux_1 {
+			pins = "gpio24";
+			function = "audio_rxbclk";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		mux_2 {
+			pins = "gpio25";
+			function = "audio_rxfsync";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		mux_3 {
+			pins = "gpio26";
+			function = "audio_rxd";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		mux_4 {
+			pins = "gpio27";
+			function = "audio_txmclk";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		mux_5 {
+			pins = "gpio28";
+			function = "audio_txbclk";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		mux_6 {
+			pins = "gpio29";
+			function = "audio_txfsync";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		mux_7 {
+			pins = "gpio30";
+			function = "audio_txd";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+};
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			debounce-interval = <60>;
+		};
+	};
+};
+
+&q6v5_wcss {
+	compatible = "qcom,ipq5018-q6-mpd";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	firmware = "IPQ5018/q6_fw.mdt";
+	reg = <0x0cd00000 0x4040>,
+		<0x1938000 0x8>,
+		<0x193d204 0x4>;
+	reg-names = "qdsp6",
+			"tcsr-msip",
+			"tcsr-q6";
+	resets = <&gcc GCC_WCSSAON_RESET>,
+			<&gcc GCC_WCSS_Q6_BCR>;
+
+	reset-names = "wcss_aon_reset",
+			"wcss_q6_reset";
+
+	clocks = <&gcc GCC_Q6_AXIS_CLK>,
+		<&gcc GCC_WCSS_ECAHB_CLK>,
+		<&gcc GCC_Q6_AXIM_CLK>,
+		<&gcc GCC_Q6_AXIM2_CLK>,
+		<&gcc GCC_Q6_AHB_CLK>,
+		<&gcc GCC_Q6_AHB_S_CLK>,
+		<&gcc GCC_WCSS_AXI_S_CLK>;
+	clock-names = "gcc_q6_axis_clk",
+		"gcc_wcss_ecahb_clk",
+		"gcc_q6_axim_clk",
+		"gcc_q6_axim2_clk",
+		"gcc_q6_ahb_clk",
+		"gcc_q6_ahb_s_clk",
+		"gcc_wcss_axi_s_clk";
+
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>;
+	#else
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>,
+				<&q6_caldb_region>;
+	#endif
+
+	qcom,rproc = <&q6v5_wcss>;
+	qcom,bootargs_smem = <507>;
+	boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
+			<0x2 0x4 0x2 0x12 0x0 0x0>;
+	status = "ok";
+	q6_wcss_pd1: remoteproc_pd1@4ab000 {
+		compatible = "qcom,ipq5018-wcss-ahb-mpd";
+		reg = <0x4ab000 0x20>;
+		reg-names = "rmb";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "IPQ5018/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 8 0>,
+					<&wcss_smp2p_in 9 0>,
+					<&wcss_smp2p_in 12 0>,
+					<&wcss_smp2p_in 11 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		resets = <&gcc GCC_WCSSAON_RESET>,
+				<&gcc GCC_WCSS_BCR>,
+				<&gcc GCC_CE_BCR>;
+		reset-names = "wcss_aon_reset",
+				"wcss_reset",
+				"ce_reset";
+
+		clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
+				<&gcc GCC_WCSS_ACMT_CLK>,
+				<&gcc GCC_WCSS_AXI_M_CLK>;
+		clock-names = "gcc_wcss_ahb_s_clk",
+					"gcc_wcss_acmt_clk",
+					"gcc_wcss_axi_m_clk";
+
+		qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
+
+		qcom,smem-states = <&wcss_smp2p_out 8>,
+					<&wcss_smp2p_out 9>,
+					<&wcss_smp2p_out 10>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>;
+	#else
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>, <&q6_caldb_region>;
+	#endif
+
+	};
+
+	q6_wcss_pd2: remoteproc_pd2 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "qcn6122/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 16 0>,
+					<&wcss_smp2p_in 17 0>,
+					<&wcss_smp2p_in 20 0>,
+					<&wcss_smp2p_in 19 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 16>,
+					<&wcss_smp2p_out 17>,
+					<&wcss_smp2p_out 18>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>;
+	#else
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
+	#endif
+
+	};
+
+	q6_wcss_pd3: remoteproc_pd3 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 24 0>,
+					<&wcss_smp2p_in 25 0>,
+					<&wcss_smp2p_in 28 0>,
+					<&wcss_smp2p_in 27 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 24>,
+					<&wcss_smp2p_out 25>,
+					<&wcss_smp2p_out 26>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef	__IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>;
+	#else
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
+	#endif
+	};
+};
+
+&i2c_0 {
+	pinctrl-0 = <&i2c_pins>;
+	pinctrl-names = "default";
+};
+
+&wifi0 {
+	/* IPQ5018 */
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd1>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x23>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4D300000 0x4D300000 0 0 0>;
+	qcom,caldb-size = <0x200000>;
+	mem-region = <&q6_ipq5018_data>;
+#else
+	memory-region = <&q6_ipq5018_data>;
+#endif
+	status = "ok";
+};
+
+&wifi1 {
+	/* QCN6122 5G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
+	qcom,rproc = <&q6_wcss_pd2>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x60>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4D500000 0x4D500000 0x4D300000 0x0 0x0>;
+	qcom,caldb-addr = <0x4E400000 0x4E400000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data1>;
+#else
+	memory-region = <&q6_qcn6122_data1>;
+#endif
+	status = "ok";
+};
+
+&wifi2 {
+	/* QCN6122 6G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
+	qcom,rproc = <&q6_wcss_pd3>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0xb0>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4E900000 0x4E900000 0x4E200000 0x0 0x0>;
+	qcom,caldb-addr = <0x4F800000 0x4F800000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data2>;
+#else
+	memory-region = <&q6_qcn6122_data2>;
+#endif
+	status = "disabled";
+};
+
+&usb3 {
+       status = "ok";
+       device-power-gpio = <&tlmm 24 1>;
+};
+
+&dwc_0 {
+       /delete-property/ #phy-cells;
+       /delete-property/ phys;
+       /delete-property/ phy-names;
+};
+
+&hs_m31phy_0 {
+       status = "ok";
+};
+
+&eud {
+	status = "ok";
+};
+
+&pcie_x1 {
+	perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x2 {
+	perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x1_rp {
+	status = "disabled";
+
+	mhi_0: qcom,mhi@0 {
+		reg = <0 0 0 0 0 >;
+	};
+};
+
+&pcie_x2_rp {
+	status = "disabled";
+
+	mhi_1: qcom,mhi@1 {
+		reg = <0 0 0 0 0 >;
+
+	};
+};

feeds/ipq807x_v5.4/ipq50xx/image/ipq50xx.mk

@@ -40,6 +40,17 @@ define Device/cybertan_eww631_b1
 endef
 TARGET_DEVICES += cybertan_eww631_b1
 
+define Device/cybertan_rap630w_312g
+  DEVICE_TITLE := CyberTan RAP630W-312G
+  DEVICE_DTS := qcom-ipq5018-rap630w-312g
+  SUPPORTED_DEVICES := cybertan,rap630w-312g
+  DEVICE_PACKAGES := ath11k-wifi-cybertan-rap630w-312g ath11k-firmware-ipq50xx-map-spruce \
+                     -kmod-usb-dwc3-of-simple kmod-usb-dwc3-qcom kmod-usb3 \
+                     kmod-usb-uas kmod-fs-msdos kmod-fs-ntfs
+  DEVICE_DTS_CONFIG := config@mp03.3
+endef
+TARGET_DEVICES += cybertan_rap630w_312g
+
 define Device/sonicfi_rap630c_311g
   DEVICE_TITLE := Sonicfi RAP630C-311G
   DEVICE_DTS := qcom-ipq5018-rap630c-311g
@@ -80,6 +91,15 @@ define Device/udaya_a6_id2
 endef
 TARGET_DEVICES += udaya_a6_id2
 
+define Device/udaya_a6_od2
+  DEVICE_TITLE := Udaya A6 - OD2
+  DEVICE_DTS := qcom-ipq5018-udaya-a6-od2
+  SUPPORTED_DEVICES := udaya,a6-od2
+  DEVICE_PACKAGES := ath11k-wifi-udaya-a6-od2 ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
+  DEVICE_DTS_CONFIG := config@mp03.5-c1
+endef
+TARGET_DEVICES += udaya_a6_od2
+
 define Device/wallys_dr5018
   DEVICE_TITLE := Wallys DR5018
   DEVICE_DTS := qcom-ipq5018-wallys-dr5018

feeds/ipq807x_v5.4/ipq50xx/modules.mk

@@ -52,6 +52,183 @@ define KernelPackage/tpm-tis-i2c/description
 endef
 $(eval $(call KernelPackage,tpm-tis-i2c))
 
+define KernelPackage/usb-dwc3-internal
+  TITLE:=DWC3 USB controller driver
+  DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget
+  KCONFIG:= \
+        CONFIG_USB_DWC3 \
+        CONFIG_USB_DWC3_HOST=n \
+        CONFIG_USB_DWC3_GADGET=n \
+        CONFIG_USB_DWC3_DUAL_ROLE=y \
+        CONFIG_EXTCON=y \
+        CONFIG_USB_DWC3_DEBUG=n \
+        CONFIG_USB_DWC3_VERBOSE=n
+  FILES:= $(LINUX_DIR)/drivers/usb/dwc3/dwc3.ko
+  AUTOLOAD:=$(call AutoLoad,84,dwc3)
+  $(call AddPlatformDepends/usb)
+endef
+
+define KernelPackage/usb-dwc3-internal/description
+ This driver provides support for the Dual Role SuperSpeed
+ USB Controller based on the Synopsys DesignWare USB3 IP Core
+endef
+
+$(eval $(call KernelPackage,usb-dwc3-internal))
+
+define KernelPackage/usb-dwc3-qcom-internal
+  TITLE:=DWC3 QTI USB driver
+  DEPENDS:=@!LINUX_4_14 @(TARGET_ipq40xx||TARGET_ipq806x||TARGET_ipq807x||TARGET_ipq60xx||TARGET_ipq95xx||TARGET_ipq50xx||TARGET_ipq53xx) +kmod-usb-dwc3-internal
+  KCONFIG:= CONFIG_USB_DWC3_QCOM
+  FILES:= $(LINUX_DIR)/drivers/usb/dwc3/dwc3-qcom.ko
+  AUTOLOAD:=$(call AutoLoad,83,dwc3-qcom)
+  $(call AddPlatformDepends/usb)
+endef
+
+define KernelPackage/usb-dwc3-qcom-internal/description
+ Some QTI SoCs use DesignWare Core IP for USB2/3 functionality.
+ This driver also handles Qscratch wrapper which is needed for
+ peripheral mode support.
+endef
+
+$(eval $(call KernelPackage,usb-dwc3-qcom-internal))
+
+define KernelPackage/usb-configfs
+ TITLE:= USB functions
+  KCONFIG:=CONFIG_USB_CONFIGFS \
+	CONFIG_USB_CONFIGFS_SERIAL=n \
+	CONFIG_USB_CONFIGFS_ACM=n \
+	CONFIG_USB_CONFIGFS_OBEX=n \
+	CONFIG_USB_CONFIGFS_NCM=n \
+	CONFIG_USB_CONFIGFS_ECM=n \
+	CONFIG_USB_CONFIGFS_ECM_SUBSET=n \
+	CONFIG_USB_CONFIGFS_RNDIS=n \
+	CONFIG_USB_CONFIGFS_EEM=n \
+	CONFIG_USB_CONFIGFS_MASS_STORAGE=n \
+	CONFIG_USB_CONFIGFS_F_LB_SS=n \
+	CONFIG_USB_CONFIGFS_F_FS=n \
+	CONFIG_USB_CONFIGFS_F_UAC1=n \
+	CONFIG_USB_CONFIGFS_F_UAC2=n \
+	CONFIG_USB_CONFIGFS_F_MIDI=n \
+	CONFIG_USB_CONFIGFS_F_HID=n \
+	CONFIG_USB_CONFIGFS_F_PRINTER=n \
+	CONFIG_USB_CONFIGFS_F_QDSS=n
+  $(call AddPlatformDepends/usb)
+endef
+
+define KernelPackage/usb-configfs/description
+ USB functions
+endef
+
+$(eval $(call KernelPackage,usb-configfs))
+
+define KernelPackage/usb-f-diag
+  TITLE:=USB DIAG
+  KCONFIG:=CONFIG_USB_F_DIAG \
+	CONFIG_USB_CONFIGFS_F_DIAG=y \
+	CONFIG_DIAG_OVER_USB=y
+  DEPENDS:=+kmod-usb-lib-composite +kmod-usb-configfs
+  FILES:=$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_diag.ko
+  AUTOLOAD:=$(call AutoLoad,52,usb_f_diag)
+  $(call AddPlatformDepends/usb)
+endef
+
+define KernelPackage/usb-f-diag/description
+ USB DIAG
+endef
+
+$(eval $(call KernelPackage,usb-f-diag))
+
+define KernelPackage/usb-uas
+  TITLE:=USB Attched SCSI support
+  DEPENDS:= +kmod-scsi-core +kmod-usb-storage
+  KCONFIG:=CONFIG_USB_UAS
+  FILES:=$(LINUX_DIR)/drivers/usb/storage/uas.ko
+  AUTOLOAD:=$(call AutoProbe,uas)
+  $(call AddPlatformDepends/usb)
+endef
+
+define KernelPackage/usb-uas/description
+ Kernel support for USB Attached SCSI devices (UAS)
+endef
+
+$(eval $(call KernelPackage,usb-uas))
+
+
+define KernelPackage/diag-char
+  TITLE:=CHAR DIAG
+  KCONFIG:= CONFIG_DIAG_MHI=y@ge5.4 \
+	  CONFIG_DIAG_OVER_PCIE=n@ge5.4 \
+	  CONFIG_DIAGFWD_BRIDGE_CODE=y \
+	  CONFIG_DIAG_CHAR
+  DEPENDS:=+kmod-lib-crc-ccitt +USB_CONFIGFS_F_DIAG:kmod-usb-f-diag +USB_CONFIGFS_F_DIAG:kmod-usb-core
+  FILES:=$(LINUX_DIR)/drivers/char/diag/diagchar.ko
+ifneq (,$(findstring $(CONFIG_KERNEL_IPQ_MEM_PROFILE), 256)$(CONFIG_LOWMEM_FLASH))
+   AUTOLOAD:=
+else
+   AUTOLOAD:=$(call AutoLoad,52,diagchar)
+endif
+endef
+
+define KernelPackage/diag-char/description
+ CHAR DIAG
+endef
+
+$(eval $(call KernelPackage,diag-char))
+
+define KernelPackage/usb-f-qdss
+  TITLE:=USB QDSS
+  KCONFIG:=CONFIG_USB_F_QDSS \
+	CONFIG_USB_CONFIGFS_F_QDSS=y
+  DEPENDS:=@TARGET_ipq807x||TARGET_ipq60xx||TARGET_ipq_ipq807x||TARGET_ipq_ipq807x_64||TARGET_ipq_ipq60xx||TARGET_ipq_ipq60xx_64||TARGET_ipq_ipq50xx||TARGET_ipq_ipq50xx_64 +kmod-usb-lib-composite +kmod-usb-configfs +kmod-lib-crc-ccitt +kmod-usb-dwc3 +TARGET_ipq_ipq60xx:kmod-usb-dwc3-qcom +TARGET_ipq_ipq60xx_64:kmod-usb-dwc3-qcom +TARGET_ipq_ipq50xx:kmod-usb-dwc3-qcom +TARGET_ipq_ipq50xx_64:kmod-usb-dwc3-qcom +TARGET_ipq_ipq807x:kmod-usb-dwc3-of-simple +TARGET_ipq_ipq807x_64:kmod-usb-dwc3-of-simple +TARGET_ipq60xx:kmod-usb-dwc3-qcom +TARGET_ipq60xx:kmod-usb-dwc3-of-simple +TARGET_ipq807x:kmod-usb-dwc3-qcom +TARGET_ipq807x:kmod-usb-dwc3-of-simple
+  FILES:=$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_qdss.ko \
+	$(LINUX_DIR)/drivers/usb/gadget/function/u_qdss.ko
+  AUTOLOAD:=$(call AutoLoad,52,usb_f_qdss)
+  $(call AddPlatformDepends/usb)
+endef
+
+define KernelPackage/usb-f-qdss/description
+ USB QDSS
+endef
+
+$(eval $(call KernelPackage,usb-f-qdss))
+
+define KernelPackage/usb-gdiag
+  TITLE:=USB GDIAG support
+  KCONFIG:=CONFIG_USB_G_DIAG
+  FILES:=\
+       $(LINUX_DIR)/drivers/usb/gadget/legacy/g_diag.ko
+  AUTOLOAD:=$(call AutoLoad,52,g_diag)
+  DEPENDS:=@TARGET_ipq807x||TARGET_ipq60xx||TARGET_ipq95xx||TARGET_ipq_ipq60xx||TARGET_ipq_ipq60xx_64||TARGET_ipq50xx||TARGET_ipq53xx +kmod-usb-gadget +kmod-usb-lib-composite
+  $(call AddPlatformDepends/usb)
+endef
+
+define KernelPackage/usb-gdiag/description
+ Kernel support for USB gdiag mode
+endef
+
+$(eval $(call KernelPackage,usb-gdiag))
+
+define KernelPackage/usb-phy-ipq5018
+  TITLE:=DWC3 USB PHY driver for IPQ5018
+  DEPENDS:=@TARGET_ipq50xx||TARGET_ipq53xx
+  KCONFIG:= \
+	CONFIG_USB_QCA_M31_PHY \
+	CONFIG_PHY_IPQ_UNIPHY_USB
+  FILES:= \
+	$(LINUX_DIR)/drivers/usb/phy/phy-qca-m31.ko \
+	$(LINUX_DIR)/drivers/phy/phy-qca-uniphy.ko@le4.4 \
+	$(LINUX_DIR)/drivers/phy/qualcomm/phy-qca-uniphy.ko@ge5.4
+  AUTOLOAD:=$(call AutoLoad,85,phy-qca-m31 phy-qca-uniphy)
+  $(call AddDepends/usb)
+endef
+
+define KernelPackage/usb-phy-ipq5018/description
+ This driver provides support for the USB PHY drivers
+ within the IPQ5018 SoCs.
+endef
+
+$(eval $(call KernelPackage,usb-phy-ipq5018))
+
 define KernelPackage/bootconfig
   SUBMENU:=Other modules
   TITLE:=Bootconfig partition for failsafe

feeds/ipq807x_v5.4/ipq60xx/files/arch/arm64/boot/dts/qcom/qcom-ipq6018-cig-wf188n.dts

@@ -107,10 +107,10 @@
 
 	button_pins: button_pins {
 		wps_button {
-			pins = "gpio9";
+			pins = "gpio22";
 			function = "gpio";
 			drive-strength = <8>;
-			bias-pull-down;
+			bias-pull-up;
 		};
 	};
 

feeds/ipq807x_v5.4/ipq807x/patches/302-aq-phy.patch

@@ -0,0 +1,66 @@
+Index: linux-5.4.213-qsdk-b2d40c94fad765a48c03f492d669aeecbbb9b617/drivers/net/phy/aquantia_main.c
+===================================================================
+--- linux-5.4.213-qsdk-b2d40c94fad765a48c03f492d669aeecbbb9b617.orig/drivers/net/phy/aquantia_main.c
++++ linux-5.4.213-qsdk-b2d40c94fad765a48c03f492d669aeecbbb9b617/drivers/net/phy/aquantia_main.c
+@@ -31,6 +31,9 @@
+ #define PHY_ID_AQCS109	0x03a1b5c2
+ #define PHY_ID_AQR405	0x03a1b4b0
+ 
++#define PHY_ID_AQR114C       0x31c31c22
++#define PHY_ID_AQR114C_B1    0x31c31c23
++
+ #define MDIO_PHYXS_VEND_IF_STATUS		0xe812
+ #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK	GENMASK(7, 3)
+ #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR	0
+@@ -1101,6 +1104,42 @@ static struct phy_driver aqr_driver[] =
+ 	.ack_interrupt	= aqr_ack_interrupt,
+ 	.read_status	= aqr_read_status,
+ },
++{
++       PHY_ID_MATCH_MODEL(PHY_ID_AQR114C),
++       .name           = "Aquantia AQR114C",
++       .probe          = aqr107_probe,
++       .config_init    = aqr107_config_init,
++       .config_aneg    = aqr_config_aneg,
++       .config_intr    = aqr_config_intr,
++       .ack_interrupt  = aqr_ack_interrupt,
++       .read_status    = aqr107_read_status,
++       .get_tunable    = aqr107_get_tunable,
++       .set_tunable    = aqr107_set_tunable,
++       .suspend        = aqr107_suspend,
++       .resume         = aqr107_resume,
++       .get_sset_count = aqr107_get_sset_count,
++       .get_strings    = aqr107_get_strings,
++       .get_stats      = aqr107_get_stats,
++       .link_change_notify = aqr107_link_change_notify,
++},
++{
++       PHY_ID_MATCH_MODEL(PHY_ID_AQR114C_B1),
++       .name           = "Aquantia AQR114C_B1",
++       .probe          = aqr107_probe,
++       .config_init    = aqr107_config_init,
++       .config_aneg    = aqr_config_aneg,
++       .config_intr    = aqr_config_intr,
++       .ack_interrupt  = aqr_ack_interrupt,
++       .read_status    = aqr107_read_status,
++       .get_tunable    = aqr107_get_tunable,
++       .set_tunable    = aqr107_set_tunable,
++       .suspend        = aqr107_suspend,
++       .resume         = aqr107_resume,
++       .get_sset_count = aqr107_get_sset_count,
++       .get_strings    = aqr107_get_strings,
++       .get_stats      = aqr107_get_stats,
++       .link_change_notify = aqr107_link_change_notify,
++},
+ };
+ 
+ module_phy_driver(aqr_driver);
+@@ -1120,6 +1159,8 @@ static struct mdio_device_id __maybe_unu
+ 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
+ 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) },
+ 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
++        { PHY_ID_MATCH_MODEL(PHY_ID_AQR114C) },
++        { PHY_ID_MATCH_MODEL(PHY_ID_AQR114C_B1) },
+ 	{ }
+ };
+ 

feeds/ipq807x_v5.4/mac80211/files/lib/netifd/wireless/mac80211.sh

@@ -425,8 +425,7 @@ mac80211_hostapd_setup_base() {
 			he_spr_sr_control:3 \
 			he_spr_psr_enabled:0 \
 			he_spr_non_srg_obss_pd_max_offset:0 \
-			he_bss_color:128 \
-			he_bss_color_enabled:1
+			he_bss_color
 
 		he_phy_cap=$(iw phy "$phy" info | sed -n '/HE Iftypes: AP/,$p' | awk -F "[()]" '/HE PHY Capabilities/ { print $2 }' | head -1)
 		he_phy_cap=${he_phy_cap:2}
@@ -446,7 +445,7 @@ mac80211_hostapd_setup_base() {
 			he_spr_psr_enabled:${he_phy_cap:14:2}:0x1:$he_spr_psr_enabled \
 			he_twt_required:${he_mac_cap:0:2}:0x6:$he_twt_required
 
-		if [ "$he_bss_color_enabled" -gt 0 ]; then
+		if [ "$he_bss_color" -ge 0 ]; then
 			append base_cfg "he_bss_color=$he_bss_color" "$N"
 			[ "$he_spr_non_srg_obss_pd_max_offset" -gt 0 ] && { \
 				append base_cfg "he_spr_non_srg_obss_pd_max_offset=$he_spr_non_srg_obss_pd_max_offset" "$N"
@@ -454,8 +453,6 @@ mac80211_hostapd_setup_base() {
 			}
 			[ "$he_spr_psr_enabled" -gt 0 ] || he_spr_sr_control=$((he_spr_sr_control | (1 << 0)))
 			append base_cfg "he_spr_sr_control=$he_spr_sr_control" "$N"
-		else
-			append base_cfg "he_bss_color_disabled=1" "$N"
 		fi
 
 

feeds/ipq807x_v5.4/mac80211/patches/pending/330-add_peer.patch

@@ -1,38 +0,0 @@
---- a/drivers/net/wireless/ath/ath11k/peer.c
-+++ b/drivers/net/wireless/ath/ath11k/peer.c
-@@ -819,8 +819,13 @@ int ath11k_peer_delete(struct ath11k *ar
- 				}
- 			}
- #endif
--		ath11k_peer_rhash_delete(ar->ab, peer);
-+		if (peer->vdev_id == vdev_id)
-+			ath11k_peer_rhash_delete(ar->ab, peer);
- 	}
-+
-+	if (!peer)
-+		peer = ath11k_peer_find(ar->ab, vdev_id, addr);
-+
- 	spin_unlock_bh(&ar->ab->base_lock);
- 	mutex_unlock(&ar->ab->tbl_mtx_lock);
- #ifdef CPTCFG_ATH11K_NSS_SUPPORT
-@@ -870,8 +875,18 @@ int ath11k_peer_create(struct ath11k *ar
- 	spin_lock_bh(&ar->ab->base_lock);
- 	peer = ath11k_peer_find_by_addr(ar->ab, param->peer_addr);
- 	if (peer) {
--		spin_unlock_bh(&ar->ab->base_lock);
--		return -EINVAL;
-+		if (peer->vdev_id == param->vdev_id) {
-+			spin_unlock_bh(&ar->ab->base_lock);
-+			return -EINVAL;
-+		}
-+
-+		/* Assume sta is transitioning to another band.
-+		 * Remove here the peer from rhash.
-+		 */
-+		mutex_lock(&ar->ab->tbl_mtx_lock);
-+		ath11k_peer_rhash_delete(ar->ab, peer);
-+		mutex_unlock(&ar->ab->tbl_mtx_lock);
-+
- 	}
- 	spin_unlock_bh(&ar->ab->base_lock);
- 

feeds/ipq807x_v5.4/mac80211/patches/pending/357-wifi-ath11k-Don-t-drop-tx_status-when-peer-cannot-be-found.patch

@@ -0,0 +1,63 @@
+From d911f48294852be77371a675ab294e7c4f8d3b60 Mon Sep 17 00:00:00 2001
+From: Sven Eckelmann <sven@narfation.org>
+Date: Thu, 5 Sep 2024 16:13:01 +0530
+Subject: [PATCH] wifi: ath11k: Don't drop tx_status when peer cannot be found
+When a station is idle for a long time, hostapd will try to send a QoS
+NULL frame to the station. The skb will be added to ack_status_frame,
+waiting for a completion via ieee80211_report_ack_skb().
+When a peer is removed before the tx_complete arrives, the
+peer will be missing. Using dev_kfree_skb_any() which goes through
+mac80211 will not delete the entry from ack_status_frames. This IDR
+will therefore run full after 8K request were generated for such clients.
+At this point, the access point will then just stall and not allow any new
+clients because idr_alloc() for ack_status_frame will fail.
+ieee80211_free_txskb() on the other hand will call
+ieee80211_report_ack_skb() and make sure to remove the entry from
+ack_status_frame.
+Fixes: ff0d702450e5 (105-ath11k-fix-monitor-crash-if-tx-offload-is-enabled.patch)
+       92450479b82c (039-mac80211-ath11k-add-HE-TX-rate-reporting-to-radiotap.patch)
+Signed-off-by: Sven Eckelmann <sven@narfation.org>
+---
+ drivers/net/wireless/ath/ath11k/dp_tx.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+--- a/drivers/net/wireless/ath/ath11k/dp_tx.c
++++ b/drivers/net/wireless/ath/ath11k/dp_tx.c
+@@ -555,12 +555,12 @@ ath11k_dp_tx_htt_tx_complete_buf(struct
+ 			kfree_skb_list(skb_shinfo(msdu)->frag_list);
+ 			skb_shinfo(msdu)->frag_list = NULL;
+ 		}
+-		dev_kfree_skb(msdu);
++		ieee80211_free_txskb(ar->hw, msdu);
+ 		return;
+ 	}
+ 
+ 	if (unlikely(!skb_cb->vif)) {
+-		dev_kfree_skb_any(msdu);
++		ieee80211_free_txskb(ar->hw, msdu);
+ 		return;
+ 	}
+ 
+@@ -716,12 +716,12 @@ static void ath11k_dp_tx_complete_msdu(s
+ 	rcu_read_lock();
+ 
+ 	if (unlikely(!rcu_dereference(ab->pdevs_active[ar->pdev_idx]))) {
+-		dev_kfree_skb_any(msdu);
++		ieee80211_free_txskb(ar->hw, msdu);
+ 		goto exit;
+ 	}
+ 
+ 	if (unlikely(!skb_cb->vif)) {
+-		dev_kfree_skb_any(msdu);
++		ieee80211_free_txskb(ar->hw, msdu);
+ 		goto exit;
+ 	}
+ 
+@@ -788,7 +788,7 @@ static void ath11k_dp_tx_complete_msdu(s
+ 			   "dp_tx: failed to find the peer with peer_id %d\n",
+ 			    ts.peer_id);
+ 		spin_unlock_bh(&ab->base_lock);
+-		dev_kfree_skb_any(msdu);
++		ieee80211_free_txskb(ar->hw, msdu);
+ 		goto exit;
+ 	}
+ 	arsta = (struct ath11k_sta *)peer->sta->drv_priv;

feeds/ipq807x_v5.4/mac80211/patches/pending/999-remove-kernel-warn-msg-abnormal-he-nss-value.patch

@@ -0,0 +1,16 @@
+--- a/net/wireless/util.c
++++ b/net/wireless/util.c
+@@ -1404,9 +1404,11 @@ static u32 cfg80211_calculate_bitrate_he
+ 	if (WARN_ON_ONCE(rate->he_ru_alloc >
+ 			 NL80211_RATE_INFO_HE_RU_ALLOC_2x996))
+ 		return 0;
+-	if (WARN_ON_ONCE(rate->nss < 1 || rate->nss > 8))
++	if (rate->nss < 1 || rate->nss > 8) {
++		printk_once(1, "invalid rate->nss: %d\n", rate->nss);
+ 		return 0;
+-
++	}
++	
+ 	if (rate->bw == RATE_INFO_BW_160)
+ 		result = rates_160M[rate->he_gi];
+ 	else if (rate->bw == RATE_INFO_BW_80 ||

feeds/ipq95xx/ipq53xx/base-files/etc/board.d/02_network

@@ -18,7 +18,7 @@ ipq53xx_setup_interfaces()
 	edgecore,eap105|\
 	sercomm,ap72tip)
 		ucidef_set_interfaces_lan_wan "eth1" "eth0"
-		;;		
+		;;
 	esac
 }
 
@@ -30,12 +30,14 @@ qcom_setup_macs()
         cig,wf189)
                 mtd=$(find_mtd_chardev "0:APPSBLENV")
                 [ -z "$mtd" ] && return;
-                mac=$(grep BaseMacAddress= $mtd | cut -dx -f2)
-                [ -z "$mac" ] && return;
-                wan_mac=$(macaddr_canonicalize $mac)
+                wan_mac=$(grep eth1addr= $mtd | cut -d= -f2)
+                [ -z "$wan_mac" ] && return;
+		lan_mac=$(macaddr_add "$wan_mac" 1)
+                 ucidef_set_label_macaddr $wan_mac
+                ;;
+        edgecore,eap105)
+                wan_mac=$(cat /sys/class/net/eth0/address)
                 lan_mac=$(macaddr_add "$wan_mac" 1)
-                ucidef_set_network_device_mac eth0 $lan_mac
-                ucidef_set_network_device_mac eth1 $wan_mac
                 ucidef_set_label_macaddr $wan_mac
                 ;;
         *)
@@ -43,9 +45,6 @@ qcom_setup_macs()
                 lan_mac=$(macaddr_add "$wan_mac" 1)
                 ;;
         esac
-        [ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
-        [ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
-        [ -n "$wan_mac" ] && ucidef_set_label_macaddr "$wan_mac"
 }
 
 board_config_update

feeds/ipq95xx/ipq53xx/base-files/etc/init.d/rtk_eth_fix

@@ -0,0 +1,86 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2007 OpenWrt.org
+
+START=94
+USE_PROCD=1
+
+. /lib/functions.sh
+
+eap105_eth_fix() {
+	#ethernet reset
+	echo 481 > /sys/class/gpio/export
+	echo "out" > /sys/class/gpio/gpio481/direction
+	echo 0 > /sys/class/gpio/gpio481/value
+	echo 1 > /sys/class/gpio/gpio481/value
+
+	#eth1 Fix RE Fail
+	sleep 1
+	ssdk_sh debug phy set 0x2 0x1f 0x0A43
+	ssdk_sh debug phy set 0x2 0x19 0x0862
+	ssdk_sh debug phy set 0x2 0x1f 0x0000
+	ssdk_sh debug phy set 0x2 0x0 0x9200
+
+	#eth1 10/100M detect led flash setup
+	ssdk_sh debug phy set 0x2 0x1f 0x0d04
+	ssdk_sh debug phy set 0x2 0x10 0x6E51
+
+	#eth0 5G detect led flash setup
+	ssdk_sh debug phy set 0x1 0xd 0x1f
+	ssdk_sh debug phy set 0x1 0xe 0xd032
+	ssdk_sh debug phy set 0x1 0xd 0x401f
+	ssdk_sh debug phy set 0x1 0xe 0x1e7
+
+	ssdk_sh debug phy set 0x1 0xd 0x1f
+	ssdk_sh debug phy set 0x1 0xe 0xd040
+	ssdk_sh debug phy set 0x1 0xd 0x401f
+	ssdk_sh debug phy set 0x1 0xe 0x393f
+
+	#eth0 Fix USXGMII
+	ssdk_sh debug phy set 0x1 0x601E7588 0x05D8
+	ssdk_sh debug phy set 0x1 0x601E7589 0x2100
+	ssdk_sh debug phy set 0x1 0x601E7587 0x0003
+
+	count=0
+	while [ 1 ]
+	do
+		date
+		if [ $(($(echo $(echo $(ssdk_sh debug phy get 0x1 0x601E7587) | cut -d':' -f2) | cut -d' ' -f1) & 1)) -eq 0 ]; then
+			echo > /tmp/Pre-emphasis-PASS
+			break
+		fi
+		count=$(($count+1))
+		if [ $count -eq 10 ]; then
+			echo > /tmp/Pre-emphasis-FAIL
+			break
+		fi
+		sleep 1
+	done
+
+	ssdk_sh debug phy set 0x1 0x601E7588 0x05D7
+	ssdk_sh debug phy set 0x1 0x601E7589 0x2180
+	ssdk_sh debug phy set 0x1 0x601E7587 0x0003
+
+	count=0
+	while [ 1 ]
+	do
+		date
+		if [ $(($(echo $(echo $(ssdk_sh debug phy get 0x1 0x601E7587) | cut -d':' -f2) | cut -d' ' -f1) & 1)) -eq 0 ]; then
+			echo > /tmp/Amp-PASS
+			break
+		fi
+		count=$(($count+1))
+		if [ $count -eq 10 ]; then
+			echo > /tmp/Amp-FAIL
+			break
+		fi
+		sleep 1
+	done
+}
+
+start_service() {
+	case "$(board_name)" in
+	"edgecore,eap105")
+		eap105_eth_fix
+		;;
+	esac
+}

feeds/ipq95xx/ipq53xx/files/arch/arm64/boot/dts/qcom/ipq5332-edgecore-eap105.dts

@@ -434,7 +434,7 @@
 	memory-region = <&q6_region>;
 	qcom,wsi = <&wsi>;
 #endif
-	qcom,board_id = <0x16>;
+	qcom,board_id = <0x12>;
 	status = "ok";
 };
 

feeds/ipq95xx/ipq53xx/files/drivers/net/phy/rtk/phy_rtl8251b_patch.c

@@ -2019,14 +2019,14 @@ int32 rtl8251b_phy_init(struct phy_device *phydev)
 {
     BOOL status = FAILURE;
     UINT16 i = 0;   /* SW_SDK: use UINT16 instead of UINT8, for MMD_REG array may over 255 entries */
-    UINT16 phydata = 0;
+    UINT16 phydata = 0, rev_num = 0, mod_num = 0;
     const UINT16 patchver = 0x0014, patchaddr = 0x8023;
 
     status = Rtl8251b_wait_for_bit(phydev, MMD_VEND2, 0xA420, 0x3, 1, 100);
     if (status != SUCCESS) {
         goto exit;
     }
-#if 0
+#if 1
     status = MmdPhyRead(phydev, MMD_PMAPMD, 0x03, &phydata);
     if (status != SUCCESS)
         goto exit;
@@ -2038,7 +2038,10 @@ int32 rtl8251b_phy_init(struct phy_device *phydev)
         osal_printf("rtl8251b and go init flow...\n");
     }
     else{
-        osal_printf("Not rtl8251b and skip init flow...id = %x \n",phydata);
+        if (phydata == 0xc868)
+            osal_printf("Realtek chip is RTL8251B-VB-CG\n");
+        else
+            osal_printf("Not rtl8251b and skip init flow...id = %x \n",phydata);
         goto exit;
     }
 #endif

feeds/ipq95xx/wireguard/Makefile

@@ -15,7 +15,7 @@ PKG_VERSION:=1.0.20211208
 PKG_RELEASE:=1
 
 PKG_SOURCE:=wireguard-linux-compat-$(PKG_VERSION).tar.xz
-PKG_SOURCE_URL:=https://git.zx2c4.com/wireguard-linux-compat/snapshot/
+PKG_SOURCE_URL:=https://ucentral.io/
 PKG_HASH:=c0e607138a17daac656f508d8e63ea3737b5221fa5d9288191ddeb099f5a3b92
 
 PKG_LICENSE:=GPL-2.0

feeds/mediatek-sdk/mac80211/files/lib/netifd/wireless/mac80211.sh

@@ -420,8 +420,7 @@ mac80211_hostapd_setup_base() {
 			he_spr_sr_control:3 \
 			he_spr_psr_enabled:0 \
 			he_spr_non_srg_obss_pd_max_offset:0 \
-			he_bss_color:128 \
-			he_bss_color_enabled:1
+			he_bss_color
 
 		he_phy_cap=$(iw phy "$phy" info | sed -n '/HE Iftypes: AP/,$p' | awk -F "[()]" '/HE PHY Capabilities/ { print $2 }' | head -1)
 		he_phy_cap=${he_phy_cap:2}
@@ -441,7 +440,7 @@ mac80211_hostapd_setup_base() {
 			he_spr_psr_enabled:${he_phy_cap:14:2}:0x1:$he_spr_psr_enabled \
 			he_twt_required:${he_mac_cap:0:2}:0x6:$he_twt_required
 
-		if [ "$he_bss_color_enabled" -gt 0 ]; then
+		if [ "$he_bss_color" -ge 0 ]; then
 			append base_cfg "he_bss_color=$he_bss_color" "$N"
 			[ "$he_spr_non_srg_obss_pd_max_offset" -gt 0 ] && { \
 				append base_cfg "he_spr_non_srg_obss_pd_max_offset=$he_spr_non_srg_obss_pd_max_offset" "$N"
@@ -449,8 +448,6 @@ mac80211_hostapd_setup_base() {
 			}
 			[ "$he_spr_psr_enabled" -gt 0 ] || he_spr_sr_control=$((he_spr_sr_control | (1 << 0)))
 			append base_cfg "he_spr_sr_control=$he_spr_sr_control" "$N"
-		else
-			append base_cfg "he_bss_color_disabled=1" "$N"
 		fi
 
 

feeds/mediatek-sdk/mac80211/patches/subsys/mtk-0032-mac80211-mtk-fix-inconsistent-QoS-mapping-between-AP.patch

@@ -0,0 +1,56 @@
+From de4d3e25a555dedd70793d0362b1e501ed1a77f1 Mon Sep 17 00:00:00 2001
+From: Benjamin Lin <benjamin-jw.lin@mediatek.com>
+Date: Tue, 30 Apr 2024 10:28:29 +0800
+Subject: [PATCH] mac80211: mtk: fix inconsistent QoS mapping between AP and
+ AP_VLAN VIFs
+
+Fix inconsistent QoS mapping between AP and AP_VLAN IFs.
+Specifically, when WDS AP IF is connected by a WDS STA, the QoS map of the AP_VLAN VIF is NULL.
+So the QoS types of packets to the WDS STA will be determined using the default mapping rule.
+However, SoftMAC driver uses the QoS map of the AP VIF, which may already be set.
+Therefore, it is possible that the QoS mappings of SW and HW are inconsistent.
+Thus, sync QoS map of AP VIF to that of AP_VLAN VIF.
+
+Signed-off-by: Benjamin Lin <benjamin-jw.lin@mediatek.com>
+---
+ net/mac80211/iface.c | 23 ++++++++++++++++++++++-
+ 1 file changed, 22 insertions(+), 1 deletion(-)
+
+diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c
+index ef32d53..138ad79 100644
+--- a/net/mac80211/iface.c
++++ b/net/mac80211/iface.c
+@@ -297,8 +297,29 @@ static int ieee80211_check_concurrent_iface(struct ieee80211_sub_if_data *sdata,
+ 			 * can only add VLANs to enabled APs
+ 			 */
+ 			if (iftype == NL80211_IFTYPE_AP_VLAN &&
+-			    nsdata->vif.type == NL80211_IFTYPE_AP)
++			    nsdata->vif.type == NL80211_IFTYPE_AP) {
++				struct mac80211_qos_map *old_qos_map, *new_qos_map = NULL;
++
+ 				sdata->bss = &nsdata->u.ap;
++
++				rcu_read_lock();
++				old_qos_map = rcu_dereference(nsdata->qos_map);
++				if (old_qos_map) {
++					new_qos_map = kzalloc(sizeof(*new_qos_map), GFP_KERNEL);
++					if (!new_qos_map) {
++						rcu_read_unlock();
++						return -ENOMEM;
++					}
++					memcpy(&new_qos_map->qos_map, &old_qos_map->qos_map,
++					       sizeof(new_qos_map->qos_map));
++				}
++				rcu_read_unlock();
++
++				old_qos_map = sdata_dereference(sdata->qos_map, sdata);
++				rcu_assign_pointer(sdata->qos_map, new_qos_map);
++				if (old_qos_map)
++					kfree_rcu(old_qos_map, rcu_head);
++			}
+ 		}
+ 	}
+ 
+-- 
+2.18.0
+

feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/bl2_private_key.pem

@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEpQIBAAKCAQEAylkhSz5UGwJnJjIchwS8KeJEmf2apWM40/z3ukTZHvnzR6cH
+Wvx0uahlMaHdnXlt1+a1ZjEr9VIehFsnad1MmF0p3evHSdW95q4KXn7QXD0kfTrs
+yiBbUbrzG+VSokpTY0xoUaqxSJWZyf0cytnnB+HYHVdjj5zshNHzJRCH494hB50m
+wzw3jyB15DAQzCrd3nhRpb/SwdaMV80M9AzhxfvL6vMpWn+GcA9SPMEZupbFYPZv
+7H/tDr6f+ZFQH8LCOuzA3wELbm6ML2pzRhR6iL8d8yft6k02uQ3C5mGXgz1LD7io
+alEu3LrvkcUdcBmaaBlO3cdvvSygArZZXFsIFwIDAQABAoIBAQCBbgGd34Bsxly0
+Udltg9nX8KNw3IbOw2jWMDlFLES1S6wRaQWLbXA8UTppROA8mi9oqmndtBYqFRzw
+DF5pmOQlkXH2QZp34ABYTXrUdslQNsvgTpCnuYqv/KUEcusoY+Jy4azYkBZWF1sH
+mJ+SIU9l+1ABdKR6eCXRz3l3e9twJMCoNbC6Sjohw32+YnFhChBKYH4v2tIbKGed
+L/xBli4a9JqGHDI3+wY/3bDy2pr88RL631ru3KWN0QfokKv1dMDFFxnes7bhIeTD
+oOJeCMPKOx6QU1zsNOb2N2OYfsrOplSRRVCL8TVgtu5dI2TnVyDrcD0NpeB0MSRt
+ZLTwbAwBAoGBAP09NKF2RcsbJ6yhnXcGIBqL9SJP4SYPf0AAy0w4PQdtDE5B1QFF
+xoIiGKZ+JOGnYiuaRpk4+EJyQvCQyMxS+4H69D6PwaerzJtvAzYDnOOyMAgxAcoU
+pQEgjuChwKkWy1qiIBUrl20fNbrNHxVrZhHvNSWtLicC1MK7gPn9iPhvAoGBAMyN
+4xeSkBgnYbrJm0xdtzZ+xS88UAGR71Fi+o/3f3CFR355ffWKFtRDMP+sj6CtH2Xq
+ukIYawKuhO7DsuSw1DVYDpkKYHqxSMsAd2wqwNxKpR0dTPKXZ5qPUiumIOlCt0sn
+ekYk62KoJPessuqjzBsFfR9uh2ouUK3M0eO8a67ZAoGBAJcM0f7ZIEpE2UZkZBth
+wPZ0svQTd3WPWtSfZKQDC4wJZIStSdNnfj+S/OcaaP9cKvddH203iQWBSCJcChmu
+Caz/Nn62mslbdUDlV6H5R7SdTX8lVC7oX3+rnu2oLdXt7cAS4lYeWUVSj2bsAPVy
+yUA7UZU2lkfYrXW2B/mVXATrAoGBAMr/LBSioFk4C+agWHvqrP1pxSnhQsysFMHB
+5kKlLVVvDspWq0fXKFyx6ZhxmX+tDvHHhdw9+0SICOgiUhBd49qkbqg2AhUAhure
+paU0sHxtn3pLL6e31VsvTC6BCTwzt07f+JpP3UDk+PrJ6iytLMrMIaXlvIEFQY+Z
+KdpFjN/RAoGAZc16tSE3zAON5/cYrCMRGrU1uNG2r7sWvUWSRKUB74Cgqhic9PS3
+JQYHmfp7PN3EjLZvzSV08G9+qKatKUmuAErPviU+dEdUt1Yu3gws42I3fNYon02z
+m7elGc61q6FXewd7KC4C4o7ZtkiZZK0E6JkLZLvwuSS6kNl2cg0Ak3s=
+-----END RSA PRIVATE KEY-----

feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fip_private_key.pem

@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEogIBAAKCAQEAtxDPiHAgUZ/gQ4Go50eDuJ4URkhBZfIwIfwhZgGduW8x8fCY
+kQjLthFY4rRX0kDTy+jg6Ov5jfXu3Gw4tjnNNQEzKhLv4eZfAgF9RCkXAyJnfDOJ
+qKBLkvquiCiwPQrray5ZmUGecO6/L1LmTd1ktwJfgkbV3Pos6oFDEpJDvf5HKa6C
+q2vqAs8GEP9RhqF4MTvqZkcxCwTp+f3neLVu1srK767Li7oEIpp0uhVAXLcBKo4N
+j7SkZPLDsLN03IikpsTeqWF8b5RZKYy1vGXH/f72GTpVWg6J5qpluv6wR6nqM2P4
+cWcT9LPRTVKAcBoEwuDJUhAOaTAAObQw7LAzUQIDAQABAoIBAB6mrOjeRTsFdso2
+wm3+9loJ9cESxghotZBrI7htmtf6ezVUIGdgPqN8YhKLOY0Vl6CznDzDjeQsAlNb
+t18jbG1shwGLbCi5pryyPSQVcSnwL72G74yRUjYIzQI1NdTyqBopB412hC3Ke65T
+xgXRhNRzjERG0fYO2UhmXjGU1czQpuD2B9z9owAo4bN8MJ0rS/4ADFtnpblUF6aP
+tknVHAV3UQY6JNkqlUHIYtkWLutUmsOzExN0/pX8wXaVN31qdSvh5REAszPAQuCA
+cxCdYF6aFi/xs0ICG8xmfYmcTMMNHPXxhRK849wGWVTGSE/fh5MHFzMt6ZuVCl3M
+26nrlmUCgYEA2cen+S2TNs54xsOaC6TxV8Lf4UtAlnD8O6MrkNt458D0Iy3Tpsl0
+4kwX2bKFPBQAkIoDZJtZ3l5y4pSBwq5Ive4je/vJ2M33Mqfqp9VD0Uodkwrj5wGU
+T9VBIqF3utZHXLV0NQuYlssN8K83ZmU4IWjrtc/Qncix6L4fTJMExYsCgYEA1zGG
+S9R1hkCWgFZ5N8Ix0HjnWpwoPiU/jbtdjUl49K0aLybe98tztlkeqyO4nFw6Rohg
+InfRQ/wEMlBeEWYgTHqMOfJCCWLeY8bGh3lU2MVSE2IkPlbb7/XIH5DXLpHi9fBh
+3rARGv34J2vWuDFhbDcoI+dJkfQ1cX5aRrb13hMCgYBHGw9XJnBIlsWMcFUdtC8w
+rmoWz1E5TY6tkispUt95G+Eak13luSU2tg2bgNRLt2QvzUAqWybOmhv8quxrOih6
+CwT++EkBRs6NdZICVnmcHgzl88pRpIxePIzV186V7FzEgmJ851pc8dONYEhAYJAh
+KHa9mCrPObYM/faOM/p83QKBgBE5t6ROR3INrX5sbZuXAeHMK8jHAzmmRaYUv3JV
+1UbQrG3l0KdJM+P+0kOkwlxRzaBjvj5EFQ46GCPm5wDBighVLvBcggi6T07xVGb3
+wWDwupcunfQXg9d7dx9/upnRt7c0HMF0monslnahXTi1SzUcXSwykWMLh1OkZ5mN
+f7TdAoGABh4DU0SB7bY8LnQ21jNlzi3qdj4EKMkfQyTVDiT84hXi42OhGN23jKuI
+2tl6KMqdsN/GLNCPGy5VMfbQCFyyn3g2gHc2Cl90LRf/PsQ4v4HD/c+bjEPJUrYe
+W2sPfHJqK3UsUL68JVaVsHZZ49oM1wJr0bn82Pl/+kNe02Njs2U=
+-----END RSA PRIVATE KEY-----

feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fit_key.crt

@@ -0,0 +1,21 @@
+-----BEGIN CERTIFICATE-----
+MIIDazCCAlOgAwIBAgIUDRQDKYZevoXzVn+I8sJA7oo0TWowDQYJKoZIhvcNAQEL
+BQAwRTELMAkGA1UEBhMCQVUxEzARBgNVBAgMClNvbWUtU3RhdGUxITAfBgNVBAoM
+GEludGVybmV0IFdpZGdpdHMgUHR5IEx0ZDAeFw0yNDA0MDIwNTIwMDhaFw0yNDA1
+MDIwNTIwMDhaMEUxCzAJBgNVBAYTAkFVMRMwEQYDVQQIDApTb21lLVN0YXRlMSEw
+HwYDVQQKDBhJbnRlcm5ldCBXaWRnaXRzIFB0eSBMdGQwggEiMA0GCSqGSIb3DQEB
+AQUAA4IBDwAwggEKAoIBAQDDjDRntDuzUIXdSe3E21pEcuxOahgVU+BJnNuNR0xi
+hAhgaFmRHHQKOgVkzld288+ofsxo2O+N22lDv/Vkk1FnRXrY6j1xeaRcoEEDkCvD
+YxZsn7qrVWuzR7zowGjep8jYGvRY6zkWhz1c1FqHdW7TOqijK66+h8tnXM88C8Jb
+OFAxRWxDreNNK+lvqRutLk1iEqChk1bRp0Dy8du3cbPTaCnMF8J0FPXuDmwJnPO0
+6Hh6lBuNoN8arCKrZHlX4WUo+u+ghVPw3VygjTAYDHItjF+rCNTAQUnUAG14asIC
+s4Px+/spq6XnSj1Cl/+LxF9azXoILLkHze7Hdm0Tw8ObAgMBAAGjUzBRMB0GA1Ud
+DgQWBBSklcF1xTKDDwQDJ2y7O776Cqr7czAfBgNVHSMEGDAWgBSklcF1xTKDDwQD
+J2y7O776Cqr7czAPBgNVHRMBAf8EBTADAQH/MA0GCSqGSIb3DQEBCwUAA4IBAQAZ
+XRrrtzpdZ+Rm9q8jUdUYguI+5t9Rw8RZbo1Uv9C4XAU6UqATGkD/wt073sEZCd/1
+/BX83pyBaFROJzXSILH9lkyNyTy2Q45i8RG8Y8xk4iCUIMkrTZl3q42ZGgVKgHDz
+q5m8Gn+VrkeVtPPfM77FFlPVqTbfFpwccanki8Qbd6w95ttx2/OCNkTJJokNA1E8
+5FHF9eFiB/T9LqHKuT1W6/sPfETF+IIhIhTSpBP31tPfMgZYqqDmaY1cJotinI5t
+7WopbjdXKZUfF+wUwChR7Hsuo0zQ8W6Jc+X4hzDTE7bmE/5YZ6Do0q0L1I84vEof
+MBzUGXqXXFL7fFvjMQ6j
+-----END CERTIFICATE-----

feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fit_key.key

@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEpAIBAAKCAQEAw4w0Z7Q7s1CF3UntxNtaRHLsTmoYFVPgSZzbjUdMYoQIYGhZ
+kRx0CjoFZM5XdvPPqH7MaNjvjdtpQ7/1ZJNRZ0V62Oo9cXmkXKBBA5Arw2MWbJ+6
+q1Vrs0e86MBo3qfI2Br0WOs5Foc9XNRah3Vu0zqooyuuvofLZ1zPPAvCWzhQMUVs
+Q63jTSvpb6kbrS5NYhKgoZNW0adA8vHbt3Gz02gpzBfCdBT17g5sCZzztOh4epQb
+jaDfGqwiq2R5V+FlKPrvoIVT8N1coI0wGAxyLYxfqwjUwEFJ1ABteGrCArOD8fv7
+Kaul50o9Qpf/i8RfWs16CCy5B83ux3ZtE8PDmwIDAQABAoIBAAwDPuzn+4rmdXLE
+qeCgAQmXbcDbb6NPxcV/51TkfmLG7aTOhEIP12kRa2dn7aOXEritIW2Hdh/mzK6m
+yjJlgmivsf5FVYT1Dg3KonPPlYCpQ6VkopkH5FfdHlPGDisvb30nGr+jo5worrJX
+MUCFDEvZnKZ5doCp4ur0np53snbcAQrTAJX8BqiHKiFhxszjgClelz2cuh1EqBG9
+UylxK8q26uAOG1+fzbLqLEqpHxwjunU98/P8H+kTOCRg3eSlDK5gJP7psG6siPdd
+d/vDKfxglUzf7FozBY1MkTnPE6dQqUuofd1kMYaLqC61IZf+c7Rpqu7dTanIt+T7
+xhI68sECgYEA/hOGDIyGrVFOpN4rmplGtWzgBkXOf5Dj7l4CaKSvxEcUTfTLWvY4
+OsIehari2w3eUl+dfmYXBZ+Q0QtEuWjdxv0biE3PFgBmHJbvJEoZNs5b57gnP4hm
+C/vwwn3gV+mVnhwpkv0AUXLZLkwpA2RdybRC4xfiylOfqPrPmCw+TbECgYEAxQc8
+KyFN1Kk2gG6mkdKEto0fO9sSToq6lvnShhm7HflFIfqXF2O3gytvwnRBrX4JWQpH
+CeRCQfDssiz3zM8pLUcple2xUuZbjJovkulYu3bvP8XItL/YNIo5OF8dlpV46kQY
+QWTgTYpeEDYQWUzp+UyrcSJhTH0XJcVL9npXfQsCgYEAvS2SSPO1L4VztiRKeTEZ
+SerIH0OIzsj2Pby3tGyzBsUZ5DWZ2J+uHGn/Se2EPjBkUhcpcDzZdXFq5YurXxYq
+04gQIPw2bh5b6XukkfOuNHWQTsd6Sb7opJGxoU8SZMLiiThU6EIDI6IM/YDtpL3t
+a0sR5n8ZeSasoagmPBrtRPECgYEAiui/7fSMB/vI9iGNBFA0yvOR6sRYEtHSHXFC
+kNMBTm+Y4wzmi1H9Ztgv8hu+1k9+zazmSr4ITK9MYY48osQHVunOEutC0pygPO/T
+zLMBoSGIKiEKkQyUpO4yy2Cb3rfBSQD7TNePIHwGN022lw8YAnCgiqHfkWq78CA6
+nyrAFeMCgYBDciC+Haz5Z38qzUrHYeTpFnUzKn6JW9RezCD61+LGHnhSaIm+9SsR
+gtyzSr8K1btoMxKjZeGc0zbYvgtbZFviUtb1ixevqI2K58IT/vPELxlE4AYq5pZQ
+/1/lITNjBLuAfZG7TCQK2JCPVGkTKpk9ewRXnfncfP2sFxVdYOFALQ==
+-----END RSA PRIVATE KEY-----

feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-senao-jeap6500.dts

@@ -0,0 +1,378 @@
+/dts-v1/;
+#include "mt7981.dtsi"
+/ {
+	model = "SENAO JEAP6500";
+	compatible = "senao,jeap6500";
+	chosen {
+		bootargs = "console=ttyS0,115200n1 loglevel=8  \
+				earlycon=uart8250,mmio32,0x11002000";
+	};
+
+	memory {
+		reg = <0 0x40000000 0 0x10000000>;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	nmbm_spim_nand {
+		compatible = "generic,nmbm";
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		lower-mtd-device = <&spi_nand>;
+		forced-create;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "BL2";
+				reg = <0x00000 0x0100000>;
+				read-only;
+			};
+
+			partition@100000 {
+				label = "u-boot-env";
+				reg = <0x0100000 0x0080000>;
+			};
+
+			factory: partition@180000 {
+				label = "Factory";
+				reg = <0x180000 0x0200000>;
+			};
+
+			partition@380000 {
+				label = "FIP";
+				reg = <0x380000 0x0200000>;
+			};
+
+			partition@580000 {
+				label = "ubi";
+				reg = <0x580000 0x6E00000>;
+			};
+
+			partition@7380000 {
+				label = "ubi_1";
+				reg = <0x7380000 0x6E00000>;
+			};
+
+			partition@E180000 {
+				label = "cert";
+				reg = <0xE180000 0x0060000>;
+			};
+
+			partition@E1E0000 {
+				label = "userconfig";
+				reg = <0xE1E0000 0x00a0000>;
+			};
+
+			partition@E280000 {
+				label = "crashdump";
+				reg = <0xE280000 0x0060000>;
+			};
+		};
+	};
+
+	sound_wm8960 {
+		compatible = "mediatek,mt79xx-wm8960-machine";
+		mediatek,platform = <&afe>;
+		audio-routing = "Headphone", "HP_L",
+				"Headphone", "HP_R",
+				"LINPUT1", "AMIC",
+				"RINPUT1", "AMIC";
+		mediatek,audio-codec = <&wm8960>;
+		status = "disabled";
+	};
+
+	sound_si3218x {
+		compatible = "mediatek,mt79xx-si3218x-machine";
+		mediatek,platform = <&afe>;
+		mediatek,ext-codec = <&proslic_spi>;
+		status = "disabled";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		power {
+			label = "power";
+			gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+			drive-strength = <MTK_DRIVE_16mA>;
+			default-state = "on";
+		};
+	};
+};
+
+&afe {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcm_pins>;
+	status = "disabled";
+};
+
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c_pins>;
+	status = "disabled";
+
+	wm8960: wm8960@1a {
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2_pins>;
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&eth {
+        status = "okay";
+
+        gmac0: mac@0 {
+                compatible = "mediatek,eth-mac";
+                reg = <0>;
+                phy-mode = "sgmii";
+                phy-handle = <&phy5>;
+        };
+
+	gmac1: mac@1 {
+		compatible = "mediatek,eth-mac";
+		reg = <1>;
+		phy-mode = "gmii";
+		phy-handle = <&phy0>;
+	};
+
+        mdio: mdio-bus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+		reset-gpios = <&pio 39 1>;
+
+		phy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-id03a2.9461";
+			reg = <0>;
+			phy-mode = "gmii";
+			nvmem-cells = <&phy_calibration>;
+			nvmem-cell-names = "phy-cal-data";
+		};
+
+		phy5: phy@5 {
+			compatible = "ethernet-phy-idc0ff.0421";
+			reg = <26>;
+			phy-mode = "sgmii";
+			full-duplex;
+			pause;
+			airoha,polarity = <2>;
+		};
+        };
+};
+
+&hnat {
+	mtketh-wan = "eth0";
+	mtketh-lan = "eth1";
+	mtketh-max-gmac = <2>;
+	status = "okay";
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_flash_pins>;
+	status = "okay";
+	spi_nand: spi_nand@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <52000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+	};
+};
+
+&spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spic_pins>;
+	status = "disabled";
+
+	proslic_spi: proslic_spi@0 {
+		compatible = "silabs,proslic_spi";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+		spi-cpha = <1>;
+		spi-cpol = <1>;
+		channel_count = <1>;
+		debug_level = <4>;       /* 1 = TRC, 2 = DBG, 4 = ERR */
+		reset_gpio = <&pio 15 0>;
+		ig,enable-spi = <1>;     /* 1: Enable, 0: Disable */
+	};
+};
+
+&wbsys {
+	mediatek,mtd-eeprom = <&factory 0x0000>;
+	status = "okay";
+	pinctrl-names = "dbdc";
+	pinctrl-0 = <&wf_dbdc_pins>;
+};
+
+&spi2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi2_pins>;
+	status = "okay";
+
+	tpm_spi_tis@0 {
+		compatible = "tcg,tpm_tis-spi";
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		spi-max-frequency = <1000000>;
+		spi-tx-buswidth = <4>;
+		spi-rx-buswidth = <4>;
+		reset-gpios = <&pio 31 1>;
+	};
+};
+
+&pio {
+
+	i2c_pins: i2c-pins-g0 {
+                mux {
+                        function = "i2c";
+                        groups = "i2c0_0";
+                };
+        };
+
+        pcm_pins: pcm-pins-g0 {
+                mux {
+                        function = "pcm";
+                        groups = "pcm";
+                };
+        };
+
+        pwm0_pin: pwm0-pin-g0 {
+                mux {
+                        function = "pwm";
+                        groups = "pwm0_0";
+                };
+        };
+
+        pwm1_pin: pwm1-pin-g0 {
+                mux {
+                        function = "pwm";
+                        groups = "pwm1_0";
+                };
+        };
+
+        pwm2_pin: pwm2-pin {
+                mux {
+                        function = "pwm";
+                        groups = "pwm2";
+                };
+        };
+
+	spi0_flash_pins: spi0-pins {
+		mux {
+			function = "spi";
+			groups = "spi0", "spi0_wp_hold";
+		};
+
+		conf-pu {
+			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+		};
+
+		conf-pd {
+			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+		};
+	};
+
+	spic_pins: spi1-pins {
+		mux {
+			function = "spi";
+			groups = "spi1_1";
+		};
+	};
+
+	spi2_pins: spi2-pins {
+		mux {
+			function = "spi";
+			groups = "spi2";
+		};
+	};
+
+	uart1_pins: uart1-pins-g1 {
+                mux {
+                        function = "uart";
+                        groups = "uart1_1";
+                };
+        };
+
+	uart2_pins: uart2-pins-g1 {
+		mux {
+                        function = "uart";
+                        groups = "uart2_1";
+                };
+		ble_loader {
+			pins = "SPI1_MISO";
+			function = "gpio";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+			output-high;
+		};
+		ble_reset {
+			pins = "SPI1_CS";
+			function = "gpio";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+			output-high;
+		};
+        };
+
+	wf_dbdc_pins: wf_dbdc-pins {
+		mux {
+			function = "eth";
+			groups = "wf0_mode1";
+		};
+		conf {
+			pins = "WF_HB1", "WF_HB2", "WF_HB3", "WF_HB4",
+			       "WF_HB0", "WF_HB0_B", "WF_HB5", "WF_HB6",
+			       "WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10",
+			       "WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ",
+			       "WF_CBA_RESETB", "WF_DIG_RESETB";
+			drive-strength = <MTK_DRIVE_4mA>;
+		};
+	};
+
+	pta_pins: pta-pins {
+		mux {
+			function = "pta";
+			groups = "pta_ext_0";
+		};
+	};
+};
+
+&xhci {
+	mediatek,u3p-dis-msk = <0x0>;
+	phys = <&u2port0 PHY_TYPE_USB2>,
+	       <&u3port0 PHY_TYPE_USB3>;
+	status = "okay";
+};

feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.c

@@ -456,6 +456,190 @@ static ssize_t pppq_toggle_write(struct file *file, const char __user *ptr,
 	return len;
 }
 
+int pse_info_usage(struct seq_file *m, void *private)
+{
+	pr_info("====================Advanced Settings====================\n");
+	pr_info("Usage: echo [port] [option] > /sys/kernel/debug/mtketh/pse_info\n");
+	pr_info("             0~15     0~2      Show PSE info\n");
+	pr_info("                       3       Show PSE legacy info\n");
+
+	return 0;
+}
+
+static int pse_info_open(struct inode *inode, struct file *file)
+{
+	return single_open(file, pse_info_usage, inode->i_private);
+}
+
+void pse_lgc_info_get_v2(struct mtk_eth *eth, int port, u32 dbg1, u32 dbg2)
+{
+	struct mtk_pse_fs_lgc_info_v2 *info;
+	u64 val;
+
+	info = (struct mtk_pse_fs_lgc_info_v2 *)&val;
+
+	val = mtk_r32(eth, dbg1);
+	val |= ((u64)mtk_r32(eth, dbg2) << 32);
+
+	pr_info("PSE port%d legacy FS info (v2)\n", port);
+	pr_info("=========================================\n");
+	pr_info("sport=%d, fport=%d, dr_idx=%d, ppe_crsn=%d\n",
+		info->sport, info->fport, info->dr_idx, info->ppe_crsn);
+	pr_info("l2_len=%d, l3_len=%d, l3_pidx=%d\n",
+		info->l2_len, info->l3_len, info->l3_pidx);
+	pr_info("is_l4f=%d, is_l4vld=%d, is_tack=%d\n",
+		info->is_l4f, info->is_l4vld, info->is_tack);
+	pr_info("is_ip4f=%d, is_ip4=%d, is_ip6=%d\n",
+		info->is_ip4f, info->is_ip4, info->is_ip6);
+	pr_info("=========================================\n");
+}
+
+void pse_lgc_info_get_v3(struct mtk_eth *eth, int port, u32 dbg1, u32 dbg2)
+{
+	struct mtk_pse_fs_lgc_info_v3 *info;
+	u64 val;
+
+	info = (struct mtk_pse_fs_lgc_info_v3 *)&val;
+
+	val = mtk_r32(eth, dbg1);
+	val |= ((u64)mtk_r32(eth, dbg2) << 32);
+
+	pr_info("PSE port%d legacy FS info (v3)\n", port);
+	pr_info("=========================================\n");
+	pr_info("sport=%d, fport=%d, ppe_crsn=%d\n",
+		info->sport, info->fport, info->ppe_crsn);
+	pr_info("l2_len=%d, l3_len=%d, l3_pidx=%d\n",
+		info->l2_len, info->l3_len, info->l3_pidx);
+	pr_info("is_l4f=%d, is_l4vld=%d, is_tack=%d\n",
+		info->is_l4f, info->is_l4vld, info->is_tack);
+	pr_info("is_ip4f=%d, is_ip4=%d, is_ip6=%d\n",
+		info->is_ip4f, info->is_ip4, info->is_ip6);
+	pr_info("is_snap=%d, vofst=%d, pl_end=%d\n",
+		info->is_snap, info->vofst, info->pl_end);
+	pr_info("is_err_pkt=%d, err_pkt_action=%d\n",
+		info->is_err_pkt, info->err_pkt_action);
+	pr_info("=========================================\n");
+}
+
+void pse_info_get_gdm(struct mtk_eth *eth, int port, int index, int options)
+{
+	u32 dbg1[2] = {MTK_FE_GDM1_DBG1, MTK_FE_GDM2_DBG1};
+	u32 dbg2[2] = {MTK_FE_GDM1_DBG2, MTK_FE_GDM2_DBG2};
+
+	if (index < 0 || index > 1)
+		return;
+
+	if (options == 3)
+		pse_lgc_info_get_v2(eth, port, dbg1[index], dbg2[index]);
+	else
+		pr_info("Not supported\n");
+}
+
+void pse_info_get_cdm(struct mtk_eth *eth, int port, int index, int options)
+{
+	u32 dbg1[7] = {MTK_FE_CDM1_DBG1, MTK_FE_CDM2_DBG1, MTK_FE_CDM3_DBG1,
+		       MTK_FE_CDM4_DBG1, MTK_FE_CDM5_DBG1, MTK_FE_CDM6_DBG1,
+		       MTK_FE_CDM7_DBG1};
+	u32 dbg2[7] = {MTK_FE_CDM1_DBG2, MTK_FE_CDM2_DBG2, MTK_FE_CDM3_DBG2,
+		       MTK_FE_CDM4_DBG2, MTK_FE_CDM5_DBG2, MTK_FE_CDM6_DBG2,
+		       MTK_FE_CDM7_DBG2};
+
+	if (index < 0 || index > 6)
+		return;
+
+	if (options == 3) {
+#if defined(CONFIG_MEDIATEK_NETSYS_V3)
+		if (index > 1 && index < 7)
+			return pse_lgc_info_get_v3(eth, port, dbg1[index], dbg2[index]);
+#endif
+		pse_lgc_info_get_v2(eth, port, dbg1[index], dbg2[index]);
+	} else
+		pr_info("Not supported\n");
+}
+
+int pse_info_get(struct mtk_eth *eth, int port, int options)
+{
+	switch (port) {
+	case PSE_GDM1_PORT:
+		pse_info_get_gdm(eth, port, 0, options);
+		break;
+	case PSE_GDM2_PORT:
+		pse_info_get_gdm(eth, port, 1, options);
+		break;
+	case PSE_ADMA_PORT:
+		pse_info_get_cdm(eth, port, 0, options);
+		break;
+	case PSE_QDMA_TX_PORT:
+	case PSE_QDMA_RX_PORT:
+		pse_info_get_cdm(eth, port, 1, options);
+		break;
+	case PSE_WDMA0_PORT:
+		pse_info_get_cdm(eth, port, 2, options);
+		break;
+	case PSE_WDMA1_PORT:
+		pse_info_get_cdm(eth, port, 3, options);
+		break;
+	case PSE_WDMA2_PORT:
+		pse_info_get_cdm(eth, port, 4, options);
+		break;
+	case PSE_TDMA_PORT:
+		pse_info_get_cdm(eth, port, 5, options);
+		break;
+	case PSE_EIP197_PORT:
+		pse_info_get_cdm(eth, port, 6, options);
+		break;
+		break;
+	default:
+		pr_info("Not supported\n");
+		break;
+	}
+
+	return 0;
+}
+
+static ssize_t pse_info_write(struct file *file, const char __user *buffer,
+			      size_t count, loff_t *off)
+{
+	struct seq_file *m = file->private_data;
+	struct mtk_eth *eth = m->private;
+	long arg0 = 0, arg1 = 0;
+	char buf[32];
+	char *p_buf;
+	char *p_token = NULL;
+	char *p_delimiter = " \t";
+	u32 len = count;
+	int ret;
+
+	if (len >= sizeof(buf)) {
+		pr_info("input handling fail!\n");
+		return -1;
+	}
+
+	if (copy_from_user(buf, buffer, len))
+		return -EFAULT;
+
+	buf[len] = '\0';
+
+	p_buf = buf;
+	p_token = strsep(&p_buf, p_delimiter);
+	if (!p_token)
+		arg0 = 0;
+	else
+		ret = kstrtol(p_token, 10, &arg0);
+
+	if (arg0 >= 0 && arg0 <= 15) {
+		p_token = strsep(&p_buf, p_delimiter);
+		if (!p_token)
+			arg1 = 0;
+		else
+			ret = kstrtol(p_token, 10, &arg1);
+	}
+
+	pse_info_get(eth, arg0, arg1);
+
+	return len;
+}
+
 static const struct file_operations fops_reg_w = {
 	.owner = THIS_MODULE,
 	.open = simple_open,
@@ -479,6 +663,15 @@ static const struct file_operations fops_pppq_toggle = {
 	.release = single_release,
 };
 
+static const struct file_operations fops_pse_info = {
+	.owner = THIS_MODULE,
+	.open = pse_info_open,
+	.read = seq_read,
+	.llseek = seq_lseek,
+	.write = pse_info_write,
+	.release = single_release,
+};
+
 static const struct file_operations fops_mt7530sw_reg_w = {
 	.owner = THIS_MODULE,
 	.open = simple_open,
@@ -501,6 +694,8 @@ int mtketh_debugfs_init(struct mtk_eth *eth)
 		ret = -ENOMEM;
 	}
 
+	debugfs_create_file("pse_info", 0444,
+			    eth_debug.root, eth, &fops_pse_info);
 	debugfs_create_file("pppq_toggle", 0444,
 			    eth_debug.root, eth, &fops_pppq_toggle);
 	debugfs_create_file("phy_regs", S_IRUGO,

feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.h

@@ -30,6 +30,24 @@
 #define MTK_FE_GDM1_FSM			0x228
 #define MTK_FE_GDM2_FSM			0x22C
 #define MTK_FE_GDM3_FSM			0x23C
+#define MTK_FE_CDM1_DBG1		0x200
+#define MTK_FE_CDM1_DBG2		0x204
+#define MTK_FE_CDM2_DBG1		0x208
+#define MTK_FE_CDM2_DBG2		0x20C
+#define MTK_FE_CDM3_DBG1		0x230
+#define MTK_FE_CDM3_DBG2		0x234
+#define MTK_FE_CDM4_DBG1		0x290
+#define MTK_FE_CDM4_DBG2		0x294
+#define MTK_FE_CDM5_DBG1		0x310
+#define MTK_FE_CDM5_DBG2		0x314
+#define MTK_FE_CDM6_DBG1		0x320
+#define MTK_FE_CDM6_DBG2		0x324
+#define MTK_FE_CDM7_DBG1		0x330
+#define MTK_FE_CDM7_DBG2		0x334
+#define MTK_FE_GDM1_DBG1		0x210
+#define MTK_FE_GDM1_DBG2		0x214
+#define MTK_FE_GDM2_DBG1		0x218
+#define MTK_FE_GDM2_DBG2		0x21C
 #define MTK_FE_PSE_FREE			0x240
 #define MTK_FE_DROP_FQ			0x244
 #define MTK_FE_DROP_FC			0x248
@@ -175,6 +193,46 @@
 	mtk_w32(eth, reg_val, MTK_LRO_CTRL_DW2_CFG(x));			\
 }
 
+struct mtk_pse_fs_lgc_info_v2 {
+	u32 rev3 : 14;
+	u32 ppe_crsn: 5;
+	u32 sport : 4;
+	u32 is_l4f: 1;
+	u32 is_l4vld: 1;
+	u32 is_tack : 1;
+	u32 is_ip4f : 1;
+	u32 is_ip4 : 1;
+	u32 is_ip6 : 1;
+	u32 dr_idx : 2;
+	u32 rev2 : 4;
+	u32 l3_pidx : 2;
+	u32 rev : 2;
+	u32 fport : 4;
+	u32 l2_len : 7;
+	u32 l3_len : 14;
+} __packed;
+
+struct mtk_pse_fs_lgc_info_v3 {
+	u32 is_snap : 1;
+	u32 vofst : 3;
+	u32 l3_pidx : 2;
+	u32 pse_sport : 4;
+	u32 fport : 4;
+	u32 ppe_crsn: 5;
+	u32 sport : 4;
+	u32 is_l4f: 1;
+	u32 is_l4vld: 1;
+	u32 is_tack : 1;
+	u32 is_ip4f : 1;
+	u32 is_ip4 : 1;
+	u32 is_ip6 : 1;
+	u32 is_err_pkt : 1;
+	u32 err_pkt_action : 2;
+	u32 pl_end : 11;
+	u32 l2_len : 7;
+	u32 l3_len : 14;
+} __packed;
+
 struct mtk_lro_alt_v1_info0 {
 	u32 dtp : 16;
 	u32 stp : 16;

feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c

@@ -1158,10 +1158,9 @@ static void mtk_mac_link_up(struct phylink_config *config, unsigned int mode,
 		}
 
 		/* Configure duplex */
-		if (duplex == DUPLEX_FULL ||
-		    interface == PHY_INTERFACE_MODE_SGMII)
-			mcr |= MAC_MCR_FORCE_DPX;
-		else if (interface == PHY_INTERFACE_MODE_GMII)
+		mcr |= MAC_MCR_FORCE_DPX;
+		if (duplex == DUPLEX_HALF &&
+		    interface == PHY_INTERFACE_MODE_GMII)
 			mcr |= MAC_MCR_PRMBL_LMT_EN;
 
 		/* Configure pause modes -
@@ -3868,17 +3867,9 @@ static int mtk_start_dma(struct mtk_eth *eth)
 
 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
 		val = mtk_r32(eth, reg_map->qdma.glo_cfg);
-		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) {
+		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) ||
+		    MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) {
 			val &= ~(MTK_RESV_BUF_MASK | MTK_DMA_SIZE_MASK);
-			mtk_w32(eth,
-				val | MTK_TX_DMA_EN | MTK_RX_DMA_EN |
-				MTK_DMA_SIZE_16DWORDS | MTK_TX_WB_DDONE |
-				MTK_NDP_CO_PRO | MTK_MUTLI_CNT |
-				MTK_RESV_BUF | MTK_WCOMP_EN |
-				MTK_DMAD_WR_WDONE | MTK_CHK_DDONE_EN |
-				MTK_RX_2B_OFFSET, reg_map->qdma.glo_cfg);
-		} else if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
-			val &= ~MTK_RESV_BUF_MASK;
 			mtk_w32(eth,
 				val | MTK_TX_DMA_EN | MTK_RX_DMA_EN |
 				MTK_DMA_SIZE_32DWORDS | MTK_TX_WB_DDONE |
@@ -4418,7 +4409,7 @@ static int mtk_hw_init(struct mtk_eth *eth, u32 type)
 
 		/* GDM and CDM Threshold */
 		mtk_w32(eth, 0x00000004, MTK_CDM2_THRES);
-		mtk_w32(eth, 0x00000707, MTK_CDMW0_THRES);
+		mtk_w32(eth, 0x08000707, MTK_CDMW0_THRES);
 		mtk_w32(eth, 0x00000077, MTK_CDMW1_THRES);
 
 		/* Disable GDM1 RX CRC stripping */

feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.c

@@ -119,7 +119,7 @@ void cr_set_field(void __iomem *reg, u32 field, u32 val)
 }
 
 /*boundary entry can't be used to accelerate data flow*/
-static void exclude_boundary_entry(struct foe_entry *foe_table_cpu)
+void exclude_boundary_entry(struct foe_entry *foe_table_cpu)
 {
 	int entry_base = 0;
 	int bad_entry, i, j;

feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.h

@@ -145,6 +145,7 @@
 #define HASH_MODE (0x3 << 14) /* RW */
 #define SCAN_MODE (0x3 << 16) /* RW */
 #define XMODE (0x3 << 18) /* RW */
+#define HASH_DBG (0x3 << 21) /* RW */
 #define TICK_SEL (0x1 << 24) /* RW */
 #define DSCP_TRFC_ECN_EN (0x1 << 25) /* RW */
 
@@ -1146,6 +1147,7 @@ enum FoeIpAct {
 #define NR_WDMA1_PORT 9
 #define NR_WDMA2_PORT 13
 #define NR_GMAC3_PORT 15
+#define NR_QDMA_TPORT 1
 #define LAN_DEV_NAME hnat_priv->lan
 #define LAN2_DEV_NAME hnat_priv->lan2
 #define IS_WAN(dev)                                                            \
@@ -1310,6 +1312,7 @@ int hnat_enable_hook(void);
 int hnat_disable_hook(void);
 void hnat_cache_ebl(int enable);
 void hnat_qos_shaper_ebl(u32 id, u32 enable);
+void exclude_boundary_entry(struct foe_entry *foe_table_cpu);
 void set_gmac_ppe_fwd(int gmac_no, int enable);
 int entry_detail(u32 ppe_id, int index);
 int entry_delete_by_mac(u8 *mac);

feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_debugfs.c

@@ -755,6 +755,7 @@ int cr_set_usage(int level)
 	pr_info("              5     0~255      Set TCP keep alive interval\n");
 	pr_info("              6     0~255      Set UDP keep alive interval\n");
 	pr_info("              7     0~1        Set hnat counter update to nf_conntrack\n");
+	pr_info("              8     0~6        Set PPE hash debug mode\n");
 
 	return 0;
 }
@@ -866,6 +867,56 @@ int set_nf_update_toggle(int toggle)
 	return 0;
 }
 
+
+int set_hash_dbg_mode(int dbg_mode)
+{
+	static const char * const hash_dbg_mode[] = {
+		"Normal", "Source port[15:0]",
+		"IPv4 source IP[15:0]", "IPv6 source IP[15:0]", "Destination port[15:0]",
+		"IPv4 destination IP[15:0]", "IPv6 destination IP[15:0]" };
+	unsigned int foe_table_sz, foe_acct_tb_sz, ppe_id, i;
+
+	if (dbg_mode < 0 || dbg_mode > 6) {
+		pr_info("Invalid hash debug mode %d\n", dbg_mode);
+		pr_info("[debug mode]\n");
+		for (i = 0; i <= 6; i++)
+			pr_info("		%d	%s\n", i, hash_dbg_mode[i]);
+		return -EINVAL;
+	}
+
+	foe_table_sz = hnat_priv->foe_etry_num * sizeof(struct foe_entry);
+	foe_acct_tb_sz = hnat_priv->foe_etry_num * sizeof(struct hnat_accounting);
+
+	/* send all traffic back to the DMA engine */
+	set_gmac_ppe_fwd(NR_GMAC1_PORT, 0);
+	set_gmac_ppe_fwd(NR_GMAC2_PORT, 0);
+	set_gmac_ppe_fwd(NR_GMAC3_PORT, 0);
+
+	for (ppe_id = 0; ppe_id < CFG_PPE_NUM; ppe_id++) {
+		cr_set_field(hnat_priv->ppe_base[ppe_id] + PPE_TB_CFG,
+			     HASH_DBG, dbg_mode);
+
+		memset(hnat_priv->foe_table_cpu[ppe_id], 0, foe_table_sz);
+
+		if (hnat_priv->data->version == MTK_HNAT_V1_1)
+			exclude_boundary_entry(hnat_priv->foe_table_cpu[ppe_id]);
+
+		if (hnat_priv->data->per_flow_accounting)
+			memset(hnat_priv->acct[ppe_id], 0, foe_acct_tb_sz);
+	}
+
+	/* clear HWNAT cache */
+	hnat_cache_ebl(1);
+
+	set_gmac_ppe_fwd(NR_GMAC1_PORT, 1);
+	set_gmac_ppe_fwd(NR_GMAC2_PORT, 1);
+	set_gmac_ppe_fwd(NR_GMAC3_PORT, 1);
+
+	pr_info("Hash debug mode enabled, set to %s mode\n", hash_dbg_mode[dbg_mode]);
+
+	return 0;
+}
+
 static const debugfs_write_func hnat_set_func[] = {
 	[0] = hnat_set_usage,
 	[1] = hnat_cpu_reason,
@@ -887,6 +938,7 @@ static const debugfs_write_func cr_set_func[] = {
 	[2] = tcp_bind_lifetime, [3] = fin_bind_lifetime,
 	[4] = udp_bind_lifetime, [5] = tcp_keep_alive,
 	[6] = udp_keep_alive,    [7] = set_nf_update_toggle,
+	[8] = set_hash_dbg_mode,
 };
 
 int read_mib(struct mtk_hnat *h, u32 ppe_id,
@@ -1897,6 +1949,7 @@ ssize_t hnat_setting_write(struct file *file, const char __user *buffer,
 	case 5:
 	case 6:
 	case 7:
+	case 8:
 		p_token = strsep(&p_buf, p_delimiter);
 		if (!p_token)
 			arg1 = 0;

feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c

@@ -1614,7 +1614,7 @@ static unsigned int skb_to_hnat_info(struct sk_buff *skb,
 					     IS_LAN_GRP(dev)) ||
 					    (IS_PPPQ_MODE &&
 					     IS_PPPQ_PATH(dev, skb)))
-						entry.ipv4_hnapt.tport_id = 1;
+						entry.ipv4_hnapt.tport_id = NR_QDMA_TPORT;
 					else
 						entry.ipv4_hnapt.tport_id = 0;
 #else
@@ -1813,7 +1813,8 @@ static unsigned int skb_to_hnat_info(struct sk_buff *skb,
 				entry.ipv4_hnapt.iblk2.fqos = 0;
 			else
 #if defined(CONFIG_MEDIATEK_NETSYS_V3)
-				entry.ipv4_hnapt.tport_id = HQOS_FLAG(dev, skb, qid) ? 1 : 0;
+				entry.ipv4_hnapt.tport_id = HQOS_FLAG(dev, skb, qid) ?
+							    NR_QDMA_TPORT : 0;
 #else
 				entry.ipv4_hnapt.iblk2.fqos = HQOS_FLAG(dev, skb, qid) ? 1 : 0;
 #endif
@@ -1853,16 +1854,16 @@ static unsigned int skb_to_hnat_info(struct sk_buff *skb,
 				case IPV4_MAP_E:
 				case IPV4_MAP_T:
 					entry.ipv4_mape.tport_id =
-						HQOS_FLAG(dev, skb, qid) ? 1 : 0;
+						HQOS_FLAG(dev, skb, qid) ? NR_QDMA_TPORT : 0;
 					break;
 				case IPV6_HNAPT:
 				case IPV6_HNAT:
 					entry.ipv6_hnapt.tport_id =
-						HQOS_FLAG(dev, skb, qid) ? 1 : 0;
+						HQOS_FLAG(dev, skb, qid) ? NR_QDMA_TPORT : 0;
 					break;
 				default:
 					entry.ipv6_5t_route.tport_id =
-						HQOS_FLAG(dev, skb, qid) ? 1 : 0;
+						HQOS_FLAG(dev, skb, qid) ? NR_QDMA_TPORT : 0;
 					break;
 				}
 #else
@@ -2001,7 +2002,7 @@ int mtk_sw_nat_hook_tx(struct sk_buff *skb, int gmac_no)
 			entry.ipv4_hnapt.winfo.bssid = skb_hnat_bss_id(skb);
 			entry.ipv4_hnapt.winfo.wcid = skb_hnat_wc_id(skb);
 #if defined(CONFIG_MEDIATEK_NETSYS_V3)
-			entry.ipv4_hnapt.tport_id = IS_HQOS_DL_MODE ? 1 : 0;
+			entry.ipv4_hnapt.tport_id = IS_HQOS_DL_MODE ? NR_QDMA_TPORT : 0;
 			entry.ipv4_hnapt.iblk2.rxid = skb_hnat_rx_id(skb);
 			entry.ipv4_hnapt.iblk2.winfoi = 1;
 			entry.ipv4_hnapt.winfo_pao.usr_info =
@@ -2059,7 +2060,7 @@ int mtk_sw_nat_hook_tx(struct sk_buff *skb, int gmac_no)
 		entry.ipv6_hnapt.winfo_pao.is_sp = skb_hnat_is_sp(skb);
 		entry.ipv6_hnapt.winfo_pao.hf = skb_hnat_hf(skb);
 		entry.ipv6_hnapt.winfo_pao.amsdu = skb_hnat_amsdu(skb);
-		entry.ipv6_hnapt.tport_id = IS_HQOS_DL_MODE ? 1 : 0;
+		entry.ipv6_hnapt.tport_id = IS_HQOS_DL_MODE ? NR_QDMA_TPORT : 0;
 #endif
 	} else {
 		entry.ipv6_5t_route.iblk2.fqos = 0;
@@ -2075,7 +2076,7 @@ int mtk_sw_nat_hook_tx(struct sk_buff *skb, int gmac_no)
 			case IPV4_MAP_T:
 				entry.ipv4_mape.winfo.bssid = skb_hnat_bss_id(skb);
 				entry.ipv4_mape.winfo.wcid = skb_hnat_wc_id(skb);
-				entry.ipv4_mape.tport_id = IS_HQOS_DL_MODE ? 1 : 0;
+				entry.ipv4_mape.tport_id = IS_HQOS_DL_MODE ? NR_QDMA_TPORT : 0;
 				entry.ipv4_mape.iblk2.rxid = skb_hnat_rx_id(skb);
 				entry.ipv4_mape.iblk2.winfoi = 1;
 				entry.ipv4_mape.winfo_pao.usr_info =
@@ -2096,7 +2097,7 @@ int mtk_sw_nat_hook_tx(struct sk_buff *skb, int gmac_no)
 			default:
 				entry.ipv6_5t_route.winfo.bssid = skb_hnat_bss_id(skb);
 				entry.ipv6_5t_route.winfo.wcid = skb_hnat_wc_id(skb);
-				entry.ipv6_5t_route.tport_id = IS_HQOS_DL_MODE ? 1 : 0;
+				entry.ipv6_5t_route.tport_id = IS_HQOS_DL_MODE ? NR_QDMA_TPORT : 0;
 				entry.ipv6_5t_route.iblk2.rxid = skb_hnat_rx_id(skb);
 				entry.ipv6_5t_route.iblk2.winfoi = 1;
 				entry.ipv6_5t_route.winfo_pao.usr_info =

feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/phy/mediatek-2p5ge.c

@@ -25,8 +25,8 @@
 #define   PHY_AUX_SPEED_MASK		GENMASK(4, 2)
 
 /* Registers on MDIO_MMD_VEND1 */
-#define MTK_PHY_LINK_STATUS_MISC               (0xa2)
-#define   MTK_PHY_FDX_ENABLE                   BIT(5)
+#define MTK_PHY_LINK_STATUS_MISC	(0xa2)
+#define   MTK_PHY_FDX_ENABLE		BIT(5)
 
 #define MTK_PHY_LPI_PCS_DSP_CTRL		(0x121)
 #define   MTK_PHY_LPI_SIG_EN_LO_THRESH100_MASK	GENMASK(12, 8)
@@ -46,10 +46,20 @@
 
 #define MTK_EXT_PAGE_ACCESS			0x1f
 #define MTK_PHY_PAGE_STANDARD			0x0000
+#define MTK_PHY_PAGE_EXTENDED_1			0x1
+#define MTK_PHY_AUX_CTRL_AND_STATUS		(0x14)
+#define   MTK_PHY_ENABLE_DOWNSHIFT		BIT(4)
+
+/* Registers on Token Ring debug nodes */
 #define MTK_PHY_PAGE_EXTENDED_52B5		0x52b5
 
+/* ch_addr = 0x0, node_addr = 0xf, data_addr = 0x3c */
+#define AUTO_NP_10XEN				BIT(6)
+
 struct mtk_i2p5ge_phy_priv {
 	bool fw_loaded;
+	u16 tr_low;
+	u16 tr_high;
 };
 
 enum {
@@ -59,6 +69,67 @@ enum {
 	PHY_AUX_SPD_2500,
 };
 
+static void tr_access(struct phy_device *phydev, bool read, u8 ch_addr, u8 node_addr, u8 data_addr)
+{
+	u16 tr_cmd = BIT(15); /* bit 14 & 0 are reserved */
+
+	if (read)
+		tr_cmd |= BIT(13);
+
+	tr_cmd |= (((ch_addr & 0x3) << 11) |
+		   ((node_addr & 0xf) << 7) |
+		   ((data_addr & 0x3f) << 1));
+	dev_dbg(&phydev->mdio.dev, "tr_cmd: 0x%x\n", tr_cmd);
+	__phy_write(phydev, 0x10, tr_cmd);
+}
+
+static void __tr_read(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr)
+{
+	struct mtk_i2p5ge_phy_priv *priv = phydev->priv;
+
+	tr_access(phydev, true, ch_addr, node_addr, data_addr);
+	priv->tr_low = __phy_read(phydev, 0x11);
+	priv->tr_high = __phy_read(phydev, 0x12);
+	dev_dbg(&phydev->mdio.dev, "tr_high read: 0x%x, tr_low read: 0x%x\n",
+		priv->tr_high, priv->tr_low);
+}
+
+static void tr_read(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr)
+{
+	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
+	__tr_read(phydev, ch_addr, node_addr, data_addr);
+	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
+}
+
+static void __tr_write(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr,
+		       u32 tr_data)
+{
+	__phy_write(phydev, 0x11, tr_data & 0xffff);
+	__phy_write(phydev, 0x12, tr_data >> 16);
+	tr_access(phydev, false, ch_addr, node_addr, data_addr);
+}
+
+static void tr_write(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr, u32 tr_data)
+{
+	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
+	__tr_write(phydev, ch_addr, node_addr, data_addr, tr_data);
+	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
+}
+
+static void tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr, u8 data_addr,
+		     u32 mask, u32 set)
+{
+	u32 tr_data;
+	struct mtk_i2p5ge_phy_priv *priv = phydev->priv;
+
+	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
+	__tr_read(phydev, ch_addr, node_addr, data_addr);
+	tr_data = (priv->tr_high << 16) | priv->tr_low;
+	tr_data = (tr_data & ~mask) | set;
+	__tr_write(phydev, ch_addr, node_addr, data_addr, tr_data);
+	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
+}
+
 static int mtk_2p5ge_phy_read_page(struct phy_device *phydev)
 {
 	return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);
@@ -71,14 +142,14 @@ static int mtk_2p5ge_phy_write_page(struct phy_device *phydev, int page)
 
 static int mt7988_2p5ge_phy_probe(struct phy_device *phydev)
 {
-	struct mtk_i2p5ge_phy_priv *phy_priv;
+	struct mtk_i2p5ge_phy_priv *priv;
 
-	phy_priv = devm_kzalloc(&phydev->mdio.dev,
+	priv = devm_kzalloc(&phydev->mdio.dev,
 				sizeof(struct mtk_i2p5ge_phy_priv), GFP_KERNEL);
-	if (!phy_priv)
+	if (!priv)
 		return -ENOMEM;
 
-	phydev->priv = phy_priv;
+	phydev->priv = priv;
 
 	return 0;
 }
@@ -91,11 +162,11 @@ static int mt7988_2p5ge_phy_config_init(struct phy_device *phydev)
 	struct device_node *np;
 	void __iomem *pmb_addr;
 	void __iomem *md32_en_cfg_base;
-	struct mtk_i2p5ge_phy_priv *phy_priv = phydev->priv;
+	struct mtk_i2p5ge_phy_priv *priv = phydev->priv;
 	u16 reg;
 	struct pinctrl *pinctrl;
 
-	if (!phy_priv->fw_loaded) {
+	if (!priv->fw_loaded) {
 		np = of_find_compatible_node(NULL, NULL, "mediatek,2p5gphy-fw");
 		if (!np)
 			return -ENOENT;
@@ -131,9 +202,11 @@ static int mt7988_2p5ge_phy_config_init(struct phy_device *phydev)
 		writew(reg & ~MD32_EN, md32_en_cfg_base);
 		writew(reg | MD32_EN, md32_en_cfg_base);
 		phy_set_bits(phydev, 0, BIT(15));
+		/* We need a delay here to stabilize initialization of MCU */
+		usleep_range(7000, 8000);
 		dev_info(dev, "Firmware loading/trigger ok.\n");
 
-		phy_priv->fw_loaded = true;
+		priv->fw_loaded = true;
 	}
 
 	/* Setup LED */
@@ -154,10 +227,12 @@ static int mt7988_2p5ge_phy_config_init(struct phy_device *phydev)
 		       MTK_PHY_LPI_SIG_EN_LO_THRESH100_MASK, 0);
 
 	/* Enable 16-bit next page exchange bit if 1000-BT isn't advertizing */
-	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
-	__phy_write(phydev, 0x11, 0xfbfa);
-	__phy_write(phydev, 0x12, 0xc3);
-	__phy_write(phydev, 0x10, 0x87f8);
+	tr_modify(phydev, 0x0, 0xf, 0x3c, AUTO_NP_10XEN,
+		  FIELD_PREP(AUTO_NP_10XEN, 0x1));
+
+	/* Enable downshift */
+	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_1);
+	__phy_set_bits(phydev, MTK_PHY_AUX_CTRL_AND_STATUS, MTK_PHY_ENABLE_DOWNSHIFT);
 	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
 
 	return 0;
@@ -223,6 +298,7 @@ static int mt7988_2p5ge_phy_get_features(struct phy_device *phydev)
 static int mt7988_2p5ge_phy_read_status(struct phy_device *phydev)
 {
 	int ret;
+	u16 status;
 
 	ret = genphy_update_link(phydev);
 	if (ret)
@@ -247,32 +323,35 @@ static int mt7988_2p5ge_phy_read_status(struct phy_device *phydev)
 		linkmode_zero(phydev->lp_advertising);
 	}
 
-	ret = phy_read(phydev, PHY_AUX_CTRL_STATUS);
-	if (ret < 0)
-		return ret;
+	status = phy_read(phydev, MII_BMSR);
+	if (status & BMSR_LSTATUS) {
+		ret = phy_read(phydev, PHY_AUX_CTRL_STATUS);
+		if (ret < 0)
+			return ret;
 
-	switch (FIELD_GET(PHY_AUX_SPEED_MASK, ret)) {
-	case PHY_AUX_SPD_10:
-		phydev->speed = SPEED_10;
-		break;
-	case PHY_AUX_SPD_100:
-		phydev->speed = SPEED_100;
-		break;
-	case PHY_AUX_SPD_1000:
-		phydev->speed = SPEED_1000;
-		break;
-	case PHY_AUX_SPD_2500:
-		phydev->speed = SPEED_2500;
-		break;
+		switch (FIELD_GET(PHY_AUX_SPEED_MASK, ret)) {
+		case PHY_AUX_SPD_10:
+			phydev->speed = SPEED_10;
+			break;
+		case PHY_AUX_SPD_100:
+			phydev->speed = SPEED_100;
+			break;
+		case PHY_AUX_SPD_1000:
+			phydev->speed = SPEED_1000;
+			break;
+		case PHY_AUX_SPD_2500:
+			phydev->speed = SPEED_2500;
+			break;
+		}
+
+		ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LINK_STATUS_MISC);
+		if (ret < 0)
+			return ret;
+		phydev->duplex = (ret & MTK_PHY_FDX_ENABLE) ? DUPLEX_FULL : DUPLEX_HALF;
+		/* FIXME: The current firmware always enables rate adaptation mode. */
+		phydev->rate_matching = RATE_MATCH_PAUSE;
 	}
 
-	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LINK_STATUS_MISC);
-	if (ret < 0)
-		return ret;
-	phydev->duplex = (ret & MTK_PHY_FDX_ENABLE) ? DUPLEX_FULL : DUPLEX_HALF;
-	/* FIXME: The current firmware always enables rate adaptation mode. */
-	phydev->rate_matching = RATE_MATCH_PAUSE;
-
 	return 0;
 }
 

feeds/mediatek-sdk/mediatek/files-5.4/include/dt-bindings/clock/mt7986-clk.h

@@ -109,7 +109,6 @@
 #define CK_TOP_F26M			48
 #define CK_TOP_AUD_L			49
 #define CK_TOP_A_TUNER			50
-#define CLK_TOP_CONN_MCUSYS_SEL		50
 #define CK_TOP_U2U3_REF			51
 #define CK_TOP_U2U3_SYS			52
 #define CK_TOP_U2U3_XHCI		53
@@ -122,7 +121,6 @@
 #define CK_TOP_PWM_SEL			60
 #define CK_TOP_I2C_SEL			61
 #define CK_TOP_PEXTP_TL_SEL		62
-#define CLK_TOP_AP2CNN_HOST_SEL		62
 #define CK_TOP_EMMC_250M_SEL		63
 #define CK_TOP_EMMC_416M_SEL		64
 #define CK_TOP_F_26M_ADC_SEL		65

feeds/mediatek-sdk/mediatek/image/mt7981.mk

@@ -1,5 +1,27 @@
 KERNEL_LOADADDR := 0x48080000
 
+define Build/fit-sign
+	$(TOPDIR)/scripts/mkits-secure_boot.sh \
+		-D $(DEVICE_NAME) \
+		-o $@.its \
+		-k $@ \
+		$(if $(word 2,$(1)),-d $(word 2,$(1))) -C $(word 1,$(1)) \
+		-a $(KERNEL_LOADADDR) \
+		-e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
+		-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config-1") \
+		-A $(LINUX_KARCH) \
+		-v $(LINUX_VERSION) \
+		$(if $(FIT_KEY_NAME),-S $(FIT_KEY_NAME)) \
+		$(if $(FW_AR_VER),-r $(FW_AR_VER)) \
+		$(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),-R $(ROOTFS/squashfs/$(DEVICE_NAME)))
+		PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage \
+		-f $@.its \
+		$(if $(FIT_KEY_DIR),-k $(FIT_KEY_DIR)) \
+		-r \
+		$@.new
+	@mv $@.new $@
+endef
+
 define Device/mt7981-spim-nor-rfb
   DEVICE_VENDOR := MediaTek
   DEVICE_MODEL := mt7981-spim-nor-rfb
@@ -235,3 +257,28 @@ define Device/mt7981-fpga-sd
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
 endef
 TARGET_DEVICES += mt7981-fpga-sd
+
+define Device/senao_jeap6500
+  DEVICE_VENDOR := SENAO
+  DEVICE_MODEL := JEAP6500
+  DEVICE_DTS := mt7981-senao-jeap6500
+  DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
+  SUPPORTED_DEVICES := senao,jeap6500
+  DEVICE_PACKAGES := kmod-mt7981-firmware kmod-mt7915e uboot-envtools -procd-ujail
+  UBINIZE_OPTS := -E 5
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  IMAGE_SIZE := 65536k
+  KERNEL_IN_UBI := 1
+  FIT_KEY_DIR := $(DTS_DIR)/mediatek/keys/senao_jeap6500
+  FIT_KEY_NAME := fit_key
+  IMAGES += factory.bin
+  IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  KERNEL = kernel-bin | lzma | \
+	fit-sign lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
+  KERNEL_INITRAMFS = kernel-bin | lzma | \
+	fit-sign lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
+endef
+TARGET_DEVICES += senao_jeap6500
+DEFAULT_DEVICE_VARS += FIT_KEY_DIR FIT_KEY_NAME

feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/02_network

@@ -23,11 +23,14 @@ mediatek_setup_interfaces()
 	*2500wan-p5*)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
 		;;
+	senao,jeap6500)
+		ucidef_set_interfaces_lan_wan "eth1" "eth0"
+		;;
 	sonicfi,rap630w-211g)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1
 		;;		
 	*)	
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_set_interfaces_lan_wan "eth1" "eth0"
 		;;
 	esac
 }
@@ -47,6 +50,18 @@ mediatek_setup_macs()
 		lan_mac_offset="0x24"
 		wan_mac_offset="0x2a"
 		;;
+	senao,jeap6500)
+		hw_mac_addr=$(mtd_get_mac_ascii u-boot-env ethaddr)
+		lan_mac="$hw_mac_addr"
+		wan_mac=$(macaddr_add $hw_mac_addr 1)
+		if [ -n "$lan_mac" ]; then
+			ucidef_set_interface_macaddr "lan" "$lan_mac"
+		fi
+		if [ -n "$wan_mac" ]; then
+			ucidef_set_interface_macaddr "wan" "$wan_mac"
+			ucidef_set_label_macaddr "$wan_mac"
+		fi
+		;;
 	sonicfi,rap630w-211g)
 		sysfs="/sys/class/ieee80211"
 		env_dev=$(get_boot_param "boot_param.env_part")

feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac

@@ -0,0 +1,18 @@
+[ "$ACTION" == "add" ] || exit 0
+
+PHYNBR=${DEVPATH##*/phy}
+
+[ -n $PHYNBR ] || exit 0
+
+. /lib/functions.sh
+. /lib/functions/system.sh
+
+board=$(board_name)
+
+case "$board" in
+	senao,jeap6500)
+		hw_mac_addr=$(mtd_get_mac_ascii u-boot-env ethaddr)
+		[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
+		[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 3 > /sys${DEVPATH}/macaddress
+	;;
+esac

feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/uci-defaults/30_uboot-envtools

@@ -16,7 +16,8 @@ board=$(board_name)
 
 case "$board" in
 edgecore,eap111|\
-edgecore,eap112)
+edgecore,eap112|\
+senao,jeap6500)
 	ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x20000" "0x20000"
 	;;
 sonicfi,rap630w-211g)

feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/nand.sh

@@ -0,0 +1,487 @@
+# Copyright (C) 2014 OpenWrt.org
+#
+
+. /lib/functions.sh
+
+# 'kernel' partition or UBI volume on NAND contains the kernel
+CI_KERNPART="${CI_KERNPART:-kernel}"
+
+# 'ubi' partition on NAND contains UBI
+# There are also CI_KERN_UBIPART and CI_ROOT_UBIPART if kernel
+# and rootfs are on separated UBIs.
+CI_UBIPART="${CI_UBIPART:-ubi}"
+
+# 'rootfs' UBI volume on NAND contains the rootfs
+CI_ROOTPART="${CI_ROOTPART:-rootfs}"
+
+# update uboot-env if upgrade suceeded
+CI_FWSETENV=
+
+ubi_mknod() {
+	local dir="$1"
+	local dev="/dev/$(basename $dir)"
+
+	[ -e "$dev" ] && return 0
+
+	local devid="$(cat $dir/dev)"
+	local major="${devid%%:*}"
+	local minor="${devid##*:}"
+	mknod "$dev" c $major $minor
+}
+
+nand_find_volume() {
+	local ubidevdir ubivoldir
+	ubidevdir="/sys/class/ubi/"
+	[ ! -d "$ubidevdir" ] && return 1
+	for ubivoldir in $ubidevdir/${1}_*; do
+		[ ! -d "$ubivoldir" ] && continue
+		if [ "$( cat $ubivoldir/name )" = "$2" ]; then
+			basename $ubivoldir
+			ubi_mknod "$ubivoldir"
+			return 0
+		fi
+	done
+}
+
+nand_find_ubi() {
+	local ubidevdir ubidev mtdnum cmtdnum
+	mtdnum="$( find_mtd_index $1 )"
+	[ ! "$mtdnum" ] && return 1
+	for ubidevdir in /sys/class/ubi/ubi*; do
+		[ ! -e "$ubidevdir/mtd_num" ] && continue
+		cmtdnum="$( cat $ubidevdir/mtd_num )"
+		if [ "$mtdnum" = "$cmtdnum" ]; then
+			ubidev=$( basename $ubidevdir )
+			ubi_mknod "$ubidevdir"
+			echo $ubidev
+			return 0
+		fi
+	done
+}
+
+nand_get_magic_long() {
+	(${3}cat "$1" | dd bs=4 "skip=${2:-0}" count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2> /dev/null
+}
+
+get_magic_long_tar() {
+	(tar xO${3}f "$1" "$2" | dd bs=4 count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2> /dev/null
+}
+
+identify() {
+	identify_magic_long $(nand_get_magic_long "$@")
+}
+
+identify_tar() {
+	identify_magic_long $(get_magic_long_tar "$@")
+}
+
+identify_if_gzip() {
+	if [ "$(identify "$1")" = gzip ]; then echo -n z; fi
+}
+
+nand_restore_config() {
+	local ubidev=$( nand_find_ubi "${CI_ROOT_UBIPART:-$CI_UBIPART}" )
+	local ubivol="$( nand_find_volume $ubidev rootfs_data )"
+	if [ ! "$ubivol" ]; then
+		ubivol="$( nand_find_volume $ubidev "$CI_ROOTPART" )"
+		if [ ! "$ubivol" ]; then
+			echo "cannot find ubifs data volume"
+			return 1
+		fi
+	fi
+	mkdir /tmp/new_root
+	if ! mount -t ubifs /dev/$ubivol /tmp/new_root; then
+		echo "cannot mount ubifs volume $ubivol"
+		rmdir /tmp/new_root
+		return 1
+	fi
+	if mv "$1" "/tmp/new_root/$BACKUP_FILE"; then
+		if umount /tmp/new_root; then
+			echo "configuration saved"
+			rmdir /tmp/new_root
+			return 0
+		fi
+	else
+		umount /tmp/new_root
+	fi
+	echo "could not save configuration to ubifs volume $ubivol"
+	rmdir /tmp/new_root
+	return 1
+}
+
+nand_remove_ubiblock() {
+	local ubivol="$1"
+
+	local ubiblk="ubiblock${ubivol:3}"
+	if [ -e "/dev/$ubiblk" ]; then
+		umount "/dev/$ubiblk" && echo "unmounted /dev/$ubiblk" || :
+		if ! ubiblock -r "/dev/$ubivol"; then
+			echo "cannot remove $ubiblk"
+			return 1
+		fi
+	fi
+}
+
+nand_attach_ubi() {
+	local ubipart="$1"
+	local has_env="${2:-0}"
+
+	local mtdnum="$( find_mtd_index "$ubipart" )"
+	if [ ! "$mtdnum" ]; then
+		>&2 echo "cannot find ubi mtd partition $ubipart"
+		return 1
+	fi
+
+	local ubidev="$( nand_find_ubi "$ubipart" )"
+	if [ ! "$ubidev" ]; then
+		>&2 ubiattach -m "$mtdnum"
+		ubidev="$( nand_find_ubi "$ubipart" )"
+
+		if [ ! "$ubidev" ]; then
+			>&2 ubiformat /dev/mtd$mtdnum -y
+			>&2 ubiattach -m "$mtdnum"
+			ubidev="$( nand_find_ubi "$ubipart" )"
+
+			if [ ! "$ubidev" ]; then
+				>&2 echo "cannot attach ubi mtd partition $ubipart"
+				return 1
+			fi
+
+			if [ "$has_env" -gt 0 ]; then
+				>&2 ubimkvol /dev/$ubidev -n 0 -N ubootenv -s 1MiB
+				>&2 ubimkvol /dev/$ubidev -n 1 -N ubootenv2 -s 1MiB
+			fi
+		fi
+	fi
+
+	echo "$ubidev"
+	return 0
+}
+
+nand_detach_ubi() {
+	local ubipart="$1"
+
+	local mtdnum="$( find_mtd_index "$ubipart" )"
+	if [ ! "$mtdnum" ]; then
+		echo "cannot find ubi mtd partition $ubipart"
+		return 1
+	fi
+
+	local ubidev="$( nand_find_ubi "$ubipart" )"
+	if [ "$ubidev" ]; then
+		for ubivol in $(find /dev -name "${ubidev}_*" -maxdepth 1 | sort); do
+			ubivol="${ubivol:5}"
+			nand_remove_ubiblock "$ubivol" || :
+			umount "/dev/$ubivol" && echo "unmounted /dev/$ubivol" || :
+		done
+		if ! ubidetach -m "$mtdnum"; then
+			echo "cannot detach ubi mtd partition $ubipart"
+			return 1
+		fi
+	fi
+}
+
+nand_upgrade_prepare_ubi() {
+	local rootfs_length="$1"
+	local rootfs_type="$2"
+	local rootfs_data_max="$(fw_printenv -n rootfs_data_max 2> /dev/null)"
+	[ -n "$rootfs_data_max" ] && rootfs_data_max=$((rootfs_data_max))
+
+	local kernel_length="$3"
+	local has_env="${4:-0}"
+	local kern_ubidev
+	local root_ubidev
+
+	[ -n "$rootfs_length" -o -n "$kernel_length" ] || return 1
+
+	if [ -n "$CI_KERN_UBIPART" -a -n "$CI_ROOT_UBIPART" ]; then
+		kern_ubidev="$( nand_attach_ubi "$CI_KERN_UBIPART" "$has_env" )"
+		[ -n "$kern_ubidev" ] || return 1
+		root_ubidev="$( nand_attach_ubi "$CI_ROOT_UBIPART" )"
+		[ -n "$root_ubidev" ] || return 1
+	else
+		kern_ubidev="$( nand_attach_ubi "$CI_UBIPART" "$has_env" )"
+		[ -n "$kern_ubidev" ] || return 1
+		root_ubidev="$kern_ubidev"
+	fi
+
+	local kern_ubivol="$( nand_find_volume $kern_ubidev "$CI_KERNPART" )"
+	local root_ubivol="$( nand_find_volume $root_ubidev "$CI_ROOTPART" )"
+	local data_ubivol="$( nand_find_volume $root_ubidev rootfs_data )"
+	[ "$root_ubivol" = "$kern_ubivol" ] && root_ubivol=
+
+	# remove ubiblocks
+	[ "$kern_ubivol" ] && { nand_remove_ubiblock $kern_ubivol || return 1; }
+	[ "$root_ubivol" ] && { nand_remove_ubiblock $root_ubivol || return 1; }
+	[ "$data_ubivol" ] && { nand_remove_ubiblock $data_ubivol || return 1; }
+
+	# kill volumes
+	[ "$kern_ubivol" ] && ubirmvol /dev/$kern_ubidev -N "$CI_KERNPART" || :
+	[ "$root_ubivol" ] && ubirmvol /dev/$root_ubidev -N "$CI_ROOTPART" || :
+	[ "$data_ubivol" ] && ubirmvol /dev/$root_ubidev -N rootfs_data || :
+
+	# create kernel vol
+	if [ -n "$kernel_length" ]; then
+		if ! ubimkvol /dev/$kern_ubidev -N "$CI_KERNPART" -s $kernel_length; then
+			echo "cannot create kernel volume"
+			return 1;
+		fi
+	fi
+
+	# create rootfs vol
+	if [ -n "$rootfs_length" ]; then
+		local rootfs_size_param
+		if [ "$rootfs_type" = "ubifs" ]; then
+			rootfs_size_param="-m"
+		else
+			rootfs_size_param="-s $rootfs_length"
+		fi
+		if ! ubimkvol /dev/$root_ubidev -N "$CI_ROOTPART" $rootfs_size_param; then
+			echo "cannot create rootfs volume"
+			return 1;
+		fi
+	fi
+
+	# create rootfs_data vol for non-ubifs rootfs
+	if [ "$rootfs_type" != "ubifs" ]; then
+		local rootfs_data_size_param="-m"
+		if [ -n "$rootfs_data_max" ]; then
+			rootfs_data_size_param="-s $rootfs_data_max"
+		fi
+		if ! ubimkvol /dev/$root_ubidev -N rootfs_data $rootfs_data_size_param; then
+			if ! ubimkvol /dev/$root_ubidev -N rootfs_data -m; then
+				echo "cannot initialize rootfs_data volume"
+				return 1
+			fi
+		fi
+	fi
+
+	return 0
+}
+
+# Write the UBI image to MTD ubi partition
+nand_upgrade_ubinized() {
+	local ubi_file="$1"
+	local gz="$2"
+
+	local ubi_length=$( (${gz}cat "$ubi_file" | wc -c) 2> /dev/null)
+
+	nand_detach_ubi "$CI_UBIPART" || return 1
+
+	local mtdnum="$( find_mtd_index "$CI_UBIPART" )"
+	${gz}cat "$ubi_file" | ubiformat "/dev/mtd$mtdnum" -S "$ubi_length" -y -f - && ubiattach -m "$mtdnum"
+}
+
+# Write the UBIFS image to UBI rootfs volume
+nand_upgrade_ubifs() {
+	local ubifs_file="$1"
+	local gz="$2"
+
+	local ubifs_length=$( (${gz}cat "$ubifs_file" | wc -c) 2> /dev/null)
+
+	nand_upgrade_prepare_ubi "$ubifs_length" "ubifs" "" "" || return 1
+
+	local ubidev="$( nand_find_ubi "$CI_UBIPART" )"
+	local root_ubivol="$(nand_find_volume $ubidev "$CI_ROOTPART")"
+	${gz}cat "$ubifs_file" | ubiupdatevol /dev/$root_ubivol -s "$ubifs_length" -
+}
+
+# Write the FIT image to UBI kernel volume
+nand_upgrade_fit() {
+	local fit_file="$1"
+	local gz="$2"
+
+	local fit_length=$( (${gz}cat "$fit_file" | wc -c) 2> /dev/null)
+
+	nand_upgrade_prepare_ubi "" "" "$fit_length" "1" || return 1
+
+	local fit_ubidev="$(nand_find_ubi "$CI_UBIPART")"
+	local fit_ubivol="$(nand_find_volume $fit_ubidev "$CI_KERNPART")"
+	${gz}cat "$fit_file" | ubiupdatevol /dev/$fit_ubivol -s "$fit_length" -
+}
+
+# Write images in the TAR file to MTD partitions and/or UBI volumes as required
+nand_upgrade_tar() {
+	local tar_file="$1"
+	local gz="$2"
+	local jffs2_markers="${CI_JFFS2_CLEAN_MARKERS:-0}"
+
+	# WARNING: This fails if tar contains more than one 'sysupgrade-*' directory.
+	local board_dir="$(tar t${gz}f "$tar_file" | grep -m 1 '^sysupgrade-.*/$')"
+	board_dir="${board_dir%/}"
+
+	local kernel_mtd kernel_length
+	if [ "$CI_KERNPART" != "none" ]; then
+		kernel_mtd="$(find_mtd_index "$CI_KERNPART")"
+		kernel_length=$( (tar xO${gz}f "$tar_file" "$board_dir/kernel" | wc -c) 2> /dev/null)
+		[ "$kernel_length" = 0 ] && kernel_length=
+	fi
+	local rootfs_length=$( (tar xO${gz}f "$tar_file" "$board_dir/root" | wc -c) 2> /dev/null)
+	[ "$rootfs_length" = 0 ] && rootfs_length=
+	local rootfs_type
+	[ "$rootfs_length" ] && rootfs_type="$(identify_tar "$tar_file" "$board_dir/root" "$gz")"
+
+	local ubi_kernel_length
+	if [ "$kernel_length" ]; then
+		if [ "$kernel_mtd" ]; then
+			# On some devices, the raw kernel and ubi partitions overlap.
+			# These devices brick if the kernel partition is erased.
+			# Hence only invalidate kernel for now.
+			dd if=/dev/zero bs=4096 count=1 2> /dev/null | \
+				mtd write - "$CI_KERNPART"
+		else
+			ubi_kernel_length="$kernel_length"
+		fi
+	fi
+
+	local has_env=0
+	nand_upgrade_prepare_ubi "$rootfs_length" "$rootfs_type" "$ubi_kernel_length" "$has_env" || return 1
+
+	if [ "$rootfs_length" ]; then
+		local ubidev="$( nand_find_ubi "${CI_ROOT_UBIPART:-$CI_UBIPART}" )"
+		local root_ubivol="$( nand_find_volume $ubidev "$CI_ROOTPART" )"
+		tar xO${gz}f "$tar_file" "$board_dir/root" | \
+			ubiupdatevol /dev/$root_ubivol -s "$rootfs_length" -
+	fi
+	if [ "$kernel_length" ]; then
+		if [ "$kernel_mtd" ]; then
+			if [ "$jffs2_markers" = 1 ]; then
+				flash_erase -j "/dev/mtd${kernel_mtd}" 0 0
+				tar xO${gz}f "$tar_file" "$board_dir/kernel" | \
+					nandwrite "/dev/mtd${kernel_mtd}" -
+			else
+				tar xO${gz}f "$tar_file" "$board_dir/kernel" | \
+					mtd write - "$CI_KERNPART"
+			fi
+		else
+			local ubidev="$( nand_find_ubi "${CI_KERN_UBIPART:-$CI_UBIPART}" )"
+			local kern_ubivol="$( nand_find_volume $ubidev "$CI_KERNPART" )"
+			tar xO${gz}f "$tar_file" "$board_dir/kernel" | \
+				ubiupdatevol /dev/$kern_ubivol -s "$kernel_length" -
+		fi
+	fi
+
+	return 0
+}
+
+nand_verify_if_gzip_file() {
+	local file="$1"
+	local gz="$2"
+
+	if [ "$gz" = z ]; then
+		echo "verifying compressed sysupgrade file integrity"
+		if ! gzip -t "$file"; then
+			echo "corrupted compressed sysupgrade file"
+			return 1
+		fi
+	fi
+}
+
+nand_verify_tar_file() {
+	local file="$1"
+	local gz="$2"
+
+	echo "verifying sysupgrade tar file integrity"
+	if ! tar xO${gz}f "$file" > /dev/null; then
+		echo "corrupted sysupgrade tar file"
+		return 1
+	fi
+}
+
+nand_do_flash_file() {
+	local file="$1"
+
+	local gz="$(identify_if_gzip "$file")"
+	local file_type="$(identify "$file" "" "$gz")"
+
+	[ ! "$(find_mtd_index "$CI_UBIPART")" ] && CI_UBIPART=rootfs
+
+	case "$file_type" in
+		"fit")
+			nand_verify_if_gzip_file "$file" "$gz" || return 1
+			nand_upgrade_fit "$file" "$gz"
+			;;
+		"ubi")
+			nand_verify_if_gzip_file "$file" "$gz" || return 1
+			nand_upgrade_ubinized "$file" "$gz"
+			;;
+		"ubifs")
+			nand_verify_if_gzip_file "$file" "$gz" || return 1
+			nand_upgrade_ubifs "$file" "$gz"
+			;;
+		*)
+			nand_verify_tar_file "$file" "$gz" || return 1
+			nand_upgrade_tar "$file" "$gz"
+			;;
+	esac
+}
+
+nand_do_restore_config() {
+	local conf_tar="/tmp/sysupgrade.tgz"
+	[ ! -f "$conf_tar" ] || nand_restore_config "$conf_tar"
+}
+
+# Recognize type of passed file and start the upgrade process
+nand_do_upgrade() {
+	local file="$1"
+
+	sync
+	nand_do_flash_file "$file" && nand_do_upgrade_success
+	nand_do_upgrade_failed
+}
+
+nand_do_upgrade_success() {
+	platform_post_upgrade_success
+	if nand_do_restore_config && sync; then
+		[ -n "$CI_FWSETENV" ] && fw_setenv $CI_FWSETENV
+		echo "sysupgrade successful"
+		umount -a
+		reboot -f
+	fi
+	nand_do_upgrade_failed
+}
+
+nand_do_upgrade_failed() {
+	sync
+	echo "sysupgrade failed"
+	# Should we reboot or bring up some failsafe mode instead?
+	umount -a
+	reboot -f
+}
+
+# Check if passed file is a valid one for NAND sysupgrade.
+# Currently it accepts 4 types of files:
+# 1) UBI: a ubinized image containing required UBI volumes.
+# 2) UBIFS: a UBIFS rootfs volume image.
+# 3) FIT: a FIT image containing kernel and rootfs.
+# 4) TAR: an archive that includes directory "sysupgrade-${BOARD_NAME}" containing
+#         a non-empty "CONTROL" file and required partition and/or volume images.
+#
+# You usually want to call this function in platform_check_image.
+#
+# $(1): board name, used in case of passing TAR file
+# $(2): file to be checked
+nand_do_platform_check() {
+	local board_name="$1"
+	local file="$2"
+
+	local gz="$(identify_if_gzip "$file")"
+	local file_type="$(identify "$file" "" "$gz")"
+	local control_length=$( (tar xO${gz}f "$file" "sysupgrade-${board_name//,/_}/CONTROL" | wc -c) 2> /dev/null)
+
+	if [ "$control_length" = 0 ]; then
+		control_length=$( (tar xO${gz}f "$file" "sysupgrade-${board_name//_/,}/CONTROL" | wc -c) 2> /dev/null)
+	fi
+
+	if [ "$control_length" != 0 ]; then
+		nand_verify_tar_file "$file" "$gz" || return 1
+	else
+		nand_verify_if_gzip_file "$file" "$gz" || return 1
+		if [ "$file_type" != "fit" -a "$file_type" != "ubi" -a "$file_type" != "ubifs" ]; then
+			echo "invalid sysupgrade file"
+			return 1
+		fi
+	fi
+
+	return 0
+}

feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh

@@ -1,4 +1,17 @@
 REQUIRE_IMAGE_METADATA=1
+
+senao_swap_active_fw() {
+	echo "Doing swap active_fw" > /dev/console
+	tmp_active_fw=$(fw_printenv -n active_fw)
+	if [ $tmp_active_fw == "0" ]; then
+		fw_setenv active_fw 1
+		fw_setenv mtdparts nmbm0:1024k\(bl2\),512k\(u-boot-env\),2048k\(factory\),2048k\(fip\),112640k\(ubi_1\),112640k\(ubi\),384k\(cert\),640k\(userconfig\),384k\(crashdump\)
+	else
+		fw_setenv active_fw 0
+		fw_setenv mtdparts nmbm0:1024k\(bl2\),512k\(u-boot-env\),2048k\(factory\),2048k\(fip\),112640k\(ubi\),112640k\(ubi_1\),384k\(cert\),640k\(userconfig\),384k\(crashdump\)
+	fi
+}
+
 platform_do_upgrade() {
 	local board=$(board_name)
 
@@ -33,6 +46,10 @@ platform_do_upgrade() {
 		fi
 		nand_do_upgrade "$1"
 		;;
+	senao,jeap6500)
+		CI_UBIPART="ubi_1"
+		nand_do_upgrade "$1"
+		;;
 	sonicfi,rap630w-211g)
 		chmod +x /tmp/root/lib/upgrade/sonicfi/nand_sonicfi_rap630w_211g.sh
 		/tmp/root/lib/upgrade/sonicfi/nand_sonicfi_rap630w_211g.sh "$1"
@@ -48,7 +65,8 @@ platform_check_image() {
 
 	case "$board" in
 	edgecore,eap111|\
-	edgecore,eap112)
+	edgecore,eap112|\
+	senao,jeap6500)
 		nand_do_platform_check "$board" "$1"
 		return $?
 		;;
@@ -63,3 +81,13 @@ platform_check_image() {
 
 	return 0
 }
+
+platform_post_upgrade_success() {
+	local board=$(board_name)
+
+	case "$board" in
+		senao,jeap6500)
+			senao_swap_active_fw
+		;;
+	esac
+}

feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh.orig

@@ -1,51 +0,0 @@
-RAMFS_COPY_BIN='mkfs.f2fs blkid blockdev fw_printenv fw_setenv'
-RAMFS_COPY_DATA="/etc/fw_env.config /var/lock/fw_printenv.lock"
-
-platform_do_upgrade() {
-	local board=$(board_name)
-
-	case "$board" in
-	*snand*)
-		ubi_do_upgrade "$1"
-		;;
-	*emmc*)
-		mtk_mmc_do_upgrade "$1"
-		;;
-	*)
-		default_do_upgrade "$1"
-		;;
-	esac
-}
-
-PART_NAME=firmware
-
-platform_check_image() {
-	local board=$(board_name)
-	local magic="$(get_magic_long "$1")"
-
-	[ "$#" -gt 1 ] && return 1
-
-	case "$board" in
-	*snand* |\
-	*emmc*)
-		# tar magic `ustar`
-		magic="$(dd if="$1" bs=1 skip=257 count=5 2>/dev/null)"
-
-		[ "$magic" != "ustar" ] && {
-			echo "Invalid image type."
-			return 1
-		}
-
-		return 0
-		;;
-	*)
-		[ "$magic" != "d00dfeed" ] && {
-			echo "Invalid image type."
-			return 1
-		}
-		return 0
-		;;
-	esac
-
-	return 0
-}

feeds/mediatek-sdk/mediatek/mt7981/config-5.4

@@ -519,3 +519,12 @@ CONFIG_WANT_DEV_COREDUMP=y
 CONFIG_VIRTIO_CONSOLE=n
 CONFIG_VIRTIO_NET=n
 CONFIG_VIRTIO_BLK=n
+CONFIG_NF_FLOW_TABLE=m
+CONFIG_NF_FLOW_TABLE_NETLINK=m
+CONFIG_INIT_STACK_NONE=y
+# CONFIG_INIT_STACK_ALL is not set
+CONFIG_AIROHA_AN8801_PHY=y
+CONFIG_SECURITYFS=y
+CONFIG_TCG_TIS_CORE=y
+CONFIG_TCG_TIS_SPI=y
+CONFIG_TCG_TPM=y

feeds/mediatek-sdk/mediatek/patches-5.4/999-2740-crypto-add-eip197-aes-ctr-support.patch

@@ -0,0 +1,397 @@
+--- a/drivers/crypto/inside-secure/safexcel.c
++++ b/drivers/crypto/inside-secure/safexcel.c
+@@ -1222,6 +1222,7 @@ static struct safexcel_alg_template *saf
+ 	&safexcel_alg_cfb_aes,
+ 	&safexcel_alg_ofb_aes,
+ 	&safexcel_alg_ctr_aes,
++	&safexcel_alg_basic_ctr_aes,
+ 	&safexcel_alg_md5,
+ 	&safexcel_alg_sha1,
+ 	&safexcel_alg_sha224,
+--- a/drivers/crypto/inside-secure/safexcel.h
++++ b/drivers/crypto/inside-secure/safexcel.h
+@@ -930,6 +930,7 @@ extern struct safexcel_alg_template safe
+ extern struct safexcel_alg_template safexcel_alg_cfb_aes;
+ extern struct safexcel_alg_template safexcel_alg_ofb_aes;
+ extern struct safexcel_alg_template safexcel_alg_ctr_aes;
++extern struct safexcel_alg_template safexcel_alg_basic_ctr_aes;
+ extern struct safexcel_alg_template safexcel_alg_md5;
+ extern struct safexcel_alg_template safexcel_alg_sha1;
+ extern struct safexcel_alg_template safexcel_alg_sha224;
+--- a/drivers/crypto/inside-secure/safexcel_cipher.c
++++ b/drivers/crypto/inside-secure/safexcel_cipher.c
+@@ -51,6 +51,8 @@ struct safexcel_cipher_ctx {
+ 	u8 xcm;  /* 0=authenc, 1=GCM, 2 reserved for CCM */
+ 	u8 aadskip;
+ 	u8 blocksz;
++	bool basic_ctr;
++	u32 processed;
+ 	u32 ivmask;
+ 	u32 ctrinit;
+ 
+@@ -79,7 +81,7 @@ struct safexcel_cipher_req {
+ static int safexcel_skcipher_iv(struct safexcel_cipher_ctx *ctx, u8 *iv,
+ 				struct safexcel_command_desc *cdesc)
+ {
+-	if (ctx->mode == CONTEXT_CONTROL_CRYPTO_MODE_CTR_LOAD) {
++	if (ctx->mode == CONTEXT_CONTROL_CRYPTO_MODE_CTR_LOAD && !(ctx->basic_ctr)) {
+ 		cdesc->control_data.options |= EIP197_OPTION_4_TOKEN_IV_CMD;
+ 		/* 32 bit nonce */
+ 		cdesc->control_data.token[0] = ctx->nonce;
+@@ -513,8 +515,8 @@ static int safexcel_aead_setkey(struct c
+ 	memcpy(ctx->opad, &ostate.state, ctx->state_sz);
+ 
+ 	memzero_explicit(&keys, sizeof(keys));
+-	return 0;
+ 
++	return 0;
+ badkey:
+ 	memzero_explicit(&keys, sizeof(keys));
+ 	return err;
+@@ -622,6 +624,43 @@ static int safexcel_context_control(stru
+ 	return 0;
+ }
+ 
++static int safexcel_queue_req(struct crypto_async_request *base,
++			struct safexcel_cipher_req *sreq,
++			enum safexcel_cipher_direction dir)
++{
++	struct safexcel_cipher_ctx *ctx = crypto_tfm_ctx(base->tfm);
++	struct safexcel_crypto_priv *priv = ctx->priv;
++	int ret, ring;
++
++	sreq->needs_inv = false;
++	sreq->direction = dir;
++
++	if (ctx->base.ctxr) {
++		if (priv->flags & EIP197_TRC_CACHE && ctx->base.needs_inv) {
++			sreq->needs_inv = true;
++			ctx->base.needs_inv = false;
++		}
++	} else {
++		ctx->base.ring = safexcel_select_ring(priv);
++		ctx->base.ctxr = dma_pool_zalloc(priv->context_pool,
++						 EIP197_GFP_FLAGS(*base),
++						 &ctx->base.ctxr_dma);
++		if (!ctx->base.ctxr)
++			return -ENOMEM;
++	}
++
++	ring = ctx->base.ring;
++
++	spin_lock_bh(&priv->ring[ring].queue_lock);
++	ret = crypto_enqueue_request(&priv->ring[ring].queue, base);
++	spin_unlock_bh(&priv->ring[ring].queue_lock);
++
++	queue_work(priv->ring[ring].workqueue,
++		   &priv->ring[ring].work_data.work);
++
++	return ret;
++}
++
+ static int safexcel_handle_req_result(struct safexcel_crypto_priv *priv, int ring,
+ 				      struct crypto_async_request *async,
+ 				      struct scatterlist *src,
+@@ -635,6 +674,7 @@ static int safexcel_handle_req_result(st
+ 	struct safexcel_cipher_ctx *ctx = crypto_skcipher_ctx(skcipher);
+ 	struct safexcel_result_desc *rdesc;
+ 	int ndesc = 0;
++	int flag;
+ 
+ 	*ret = 0;
+ 
+@@ -677,7 +717,13 @@ static int safexcel_handle_req_result(st
+ 				    crypto_skcipher_ivsize(skcipher)));
+ 	}
+ 
+-	*should_complete = true;
++	if (ctx->basic_ctr && ctx->processed != cryptlen) {
++		*should_complete = false;
++		flag = safexcel_queue_req(async, sreq, sreq->direction);
++	} else {
++		*should_complete = true;
++		ctx->processed = 0;
++	}
+ 
+ 	return ndesc;
+ }
+@@ -700,12 +746,16 @@ static int safexcel_send_req(struct cryp
+ 	unsigned int totlen;
+ 	unsigned int totlen_src = cryptlen + assoclen;
+ 	unsigned int totlen_dst = totlen_src;
++	unsigned int pass_byte = 0;
++	unsigned int pass;
+ 	struct safexcel_token *atoken;
+ 	int n_cdesc = 0, n_rdesc = 0;
+ 	int queued, i, ret = 0;
+ 	bool first = true;
+ 
+-	sreq->nr_src = sg_nents_for_len(src, totlen_src);
++	pass_byte = ctx->processed;
++	pass = pass_byte;
++	sreq->nr_src = sg_nents_for_len(src, totlen_src + pass_byte);
+ 
+ 	if (ctx->aead) {
+ 		/*
+@@ -736,7 +786,7 @@ static int safexcel_send_req(struct cryp
+ 				    crypto_skcipher_ivsize(skcipher)));
+ 	}
+ 
+-	sreq->nr_dst = sg_nents_for_len(dst, totlen_dst);
++	sreq->nr_dst = sg_nents_for_len(dst, totlen_dst + pass_byte);
+ 
+ 	/*
+ 	 * Remember actual input length, source buffer length may be
+@@ -798,14 +848,23 @@ static int safexcel_send_req(struct cryp
+ 	for_each_sg(src, sg, sreq->nr_src, i) {
+ 		int len = sg_dma_len(sg);
+ 
++		if (pass) {
++			if (pass >= len) {
++				pass -= len;
++				continue;
++			}
++			len = len - pass;
++		}
+ 		/* Do not overflow the request */
+ 		if (queued < len)
+ 			len = queued;
+ 
+ 		cdesc = safexcel_add_cdesc(priv, ring, !n_cdesc,
+-					   !(queued - len),
+-					   sg_dma_address(sg), len, totlen,
+-					   ctx->base.ctxr_dma, &atoken);
++					!(queued - len),
++					sg_dma_address(sg) + pass, len,
++					totlen, ctx->base.ctxr_dma, &atoken);
++		pass = 0;
++
+ 		if (IS_ERR(cdesc)) {
+ 			/* No space left in the command descriptor ring */
+ 			ret = PTR_ERR(cdesc);
+@@ -820,6 +879,7 @@ static int safexcel_send_req(struct cryp
+ 		if (!queued)
+ 			break;
+ 	}
++
+ skip_cdesc:
+ 	/* Add context control words and token to first command descriptor */
+ 	safexcel_context_control(ctx, base, sreq, first_cdesc);
+@@ -831,11 +891,20 @@ skip_cdesc:
+ 		safexcel_skcipher_token(ctx, iv, first_cdesc, atoken,
+ 					cryptlen);
+ 
++	pass = pass_byte;
+ 	/* result descriptors */
+ 	for_each_sg(dst, sg, sreq->nr_dst, i) {
+ 		bool last = (i == sreq->nr_dst - 1);
+ 		u32 len = sg_dma_len(sg);
+ 
++		if (pass) {
++			if (pass >= len) {
++				pass -= len;
++				continue;
++			}
++			len -= pass;
++		}
++
+ 		/* only allow the part of the buffer we know we need */
+ 		if (len > totlen_dst)
+ 			len = totlen_dst;
+@@ -855,9 +924,11 @@ skip_cdesc:
+ 						   len - assoclen);
+ 			assoclen = 0;
+ 		} else {
++
+ 			rdesc = safexcel_add_rdesc(priv, ring, first, last,
+-						   sg_dma_address(sg),
+-						   len);
++					   sg_dma_address(sg) + pass,
++					   len);
++			pass = 0;
+ 		}
+ 		if (IS_ERR(rdesc)) {
+ 			/* No space left in the result descriptor ring */
+@@ -892,6 +963,7 @@ skip_cdesc:
+ 
+ 	*commands = n_cdesc;
+ 	*results = n_rdesc;
++
+ 	return 0;
+ 
+ rdesc_rollback:
+@@ -1033,6 +1105,26 @@ static int safexcel_cipher_send_inv(stru
+ 	return 0;
+ }
+ 
++static void accum_iv(u8 *iv, u32 blocks)
++{
++	u32 *counter;
++	int i;
++
++	for (i = 12; i >= 0; i = i - 4) {
++		counter = (u32 *) &iv[i];
++		if (be32_to_cpu(*counter) + blocks >= be32_to_cpu(*counter)) {
++			*counter = cpu_to_be32(be32_to_cpu(*counter) + blocks);
++			blocks = 0;
++		} else {
++			*counter = cpu_to_be32(be32_to_cpu(*counter) + blocks);
++			blocks = 1;
++		}
++
++		if (blocks == 0)
++			break;
++	}
++}
++
+ static int safexcel_skcipher_send(struct crypto_async_request *async, int ring,
+ 				  int *commands, int *results)
+ {
+@@ -1049,6 +1141,8 @@ static int safexcel_skcipher_send(struct
+ 	} else {
+ 		struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
+ 		u8 input_iv[AES_BLOCK_SIZE];
++		u32 blocks;
++		u32 *counter;
+ 
+ 		/*
+ 		 * Save input IV in case of CBC decrypt mode
+@@ -1056,9 +1150,29 @@ static int safexcel_skcipher_send(struct
+ 		 */
+ 		memcpy(input_iv, req->iv, crypto_skcipher_ivsize(skcipher));
+ 
+-		ret = safexcel_send_req(async, ring, sreq, req->src,
++		if (ctx->mode == CONTEXT_CONTROL_CRYPTO_MODE_CTR_LOAD && ctx->basic_ctr) {
++			counter = (u32 *) &req->iv[12];
++			blocks = (req->cryptlen / ctx->blocksz) - (ctx->processed / 16);
++			if (req->cryptlen % ctx->blocksz)
++				blocks++;
++			if (be32_to_cpu(*counter) + blocks < be32_to_cpu(*counter)) {
++				blocks = 0 - be32_to_cpu(*counter);
++				ret = safexcel_send_req(async, ring, sreq, req->src,
++						req->dst, min(blocks * AES_BLOCK_SIZE, req->cryptlen), 0, 0, input_iv,
++						commands, results);
++				ctx->processed += min(blocks * AES_BLOCK_SIZE, req->cryptlen);
++			} else {
++				ret = safexcel_send_req(async, ring, sreq, req->src,
++						req->dst, req->cryptlen - ctx->processed,
++						0, 0, input_iv, commands, results);
++				ctx->processed = req->cryptlen;
++			}
++			accum_iv(req->iv, blocks);
++		} else {
++			ret = safexcel_send_req(async, ring, sreq, req->src,
+ 					req->dst, req->cryptlen, 0, 0, input_iv,
+ 					commands, results);
++		}
+ 	}
+ 
+ 	sreq->rdescs = *results;
+@@ -1152,43 +1266,6 @@ static int safexcel_aead_exit_inv(struct
+ 	return safexcel_cipher_exit_inv(tfm, &req->base, sreq, &result);
+ }
+ 
+-static int safexcel_queue_req(struct crypto_async_request *base,
+-			struct safexcel_cipher_req *sreq,
+-			enum safexcel_cipher_direction dir)
+-{
+-	struct safexcel_cipher_ctx *ctx = crypto_tfm_ctx(base->tfm);
+-	struct safexcel_crypto_priv *priv = ctx->priv;
+-	int ret, ring;
+-
+-	sreq->needs_inv = false;
+-	sreq->direction = dir;
+-
+-	if (ctx->base.ctxr) {
+-		if (priv->flags & EIP197_TRC_CACHE && ctx->base.needs_inv) {
+-			sreq->needs_inv = true;
+-			ctx->base.needs_inv = false;
+-		}
+-	} else {
+-		ctx->base.ring = safexcel_select_ring(priv);
+-		ctx->base.ctxr = dma_pool_zalloc(priv->context_pool,
+-						 EIP197_GFP_FLAGS(*base),
+-						 &ctx->base.ctxr_dma);
+-		if (!ctx->base.ctxr)
+-			return -ENOMEM;
+-	}
+-
+-	ring = ctx->base.ring;
+-
+-	spin_lock_bh(&priv->ring[ring].queue_lock);
+-	ret = crypto_enqueue_request(&priv->ring[ring].queue, base);
+-	spin_unlock_bh(&priv->ring[ring].queue_lock);
+-
+-	queue_work(priv->ring[ring].workqueue,
+-		   &priv->ring[ring].work_data.work);
+-
+-	return ret;
+-}
+-
+ static int safexcel_encrypt(struct skcipher_request *req)
+ {
+ 	return safexcel_queue_req(&req->base, skcipher_request_ctx(req),
+@@ -1216,6 +1293,8 @@ static int safexcel_skcipher_cra_init(st
+ 	ctx->base.send = safexcel_skcipher_send;
+ 	ctx->base.handle_result = safexcel_skcipher_handle_result;
+ 	ctx->ivmask = EIP197_OPTION_4_TOKEN_IV_CMD;
++	ctx->basic_ctr = false;
++	ctx->processed = 0;
+ 	ctx->ctrinit = 1;
+ 	return 0;
+ }
+@@ -1496,6 +1575,44 @@ struct safexcel_alg_template safexcel_al
+ 	},
+ };
+ 
++static int safexcel_skcipher_basic_aes_ctr_cra_init(struct crypto_tfm *tfm)
++{
++	struct safexcel_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
++
++	safexcel_skcipher_cra_init(tfm);
++	ctx->alg = SAFEXCEL_AES;
++	ctx->blocksz = AES_BLOCK_SIZE;
++	ctx->mode = CONTEXT_CONTROL_CRYPTO_MODE_CTR_LOAD;
++	ctx->basic_ctr = true;
++	return 0;
++}
++
++struct safexcel_alg_template safexcel_alg_basic_ctr_aes = {
++	.type = SAFEXCEL_ALG_TYPE_SKCIPHER,
++	.algo_mask = SAFEXCEL_ALG_AES,
++	.alg.skcipher = {
++		.setkey = safexcel_skcipher_aes_setkey,
++		.encrypt = safexcel_encrypt,
++		.decrypt = safexcel_decrypt,
++		.min_keysize = AES_MIN_KEY_SIZE,
++		.max_keysize = AES_MAX_KEY_SIZE,
++		.ivsize = AES_BLOCK_SIZE,
++		.base = {
++			.cra_name = "ctr(aes)",
++			.cra_driver_name = "safexcel-basic-ctr-aes",
++			.cra_priority = SAFEXCEL_CRA_PRIORITY,
++			.cra_flags = CRYPTO_ALG_ASYNC |
++					 CRYPTO_ALG_KERN_DRIVER_ONLY,
++			.cra_blocksize = 1,
++			.cra_ctxsize = sizeof(struct safexcel_cipher_ctx),
++			.cra_alignmask = 0,
++			.cra_init = safexcel_skcipher_basic_aes_ctr_cra_init,
++			.cra_exit = safexcel_skcipher_cra_exit,
++			.cra_module = THIS_MODULE,
++		},
++	},
++};
++
+ static int safexcel_des_setkey(struct crypto_skcipher *ctfm, const u8 *key,
+ 			       unsigned int len)
+ {
+@@ -1724,6 +1841,9 @@ static int safexcel_aead_cra_init(struct
+ 	ctx->aead = true;
+ 	ctx->base.send = safexcel_aead_send;
+ 	ctx->base.handle_result = safexcel_aead_handle_result;
++	ctx->basic_ctr = false;
++	ctx->processed = 0;
++
+ 	return 0;
+ }
+ 

feeds/mediatek-sdk/mediatek/patches-5.4/999-4001-add_reset_in_tpm_driver.patch

@@ -0,0 +1,63 @@
+Index: linux-5.4.246/drivers/char/tpm/tpm_tis_spi.c
+===================================================================
+--- linux-5.4.246.orig/drivers/char/tpm/tpm_tis_spi.c
++++ linux-5.4.246/drivers/char/tpm/tpm_tis_spi.c
+@@ -199,11 +199,35 @@ static const struct tpm_tis_phy_ops tpm_
+ 	.do_calibration = tpm_tis_spi_do_calibration,
+ };
+ 
++int reset_tpm(struct spi_device *dev)
++{
++	int error;
++	struct gpio_desc *reset_gpio;
++	reset_gpio = gpiod_get_optional(&dev->dev, "reset", GPIOD_OUT_LOW);
++	error = PTR_ERR_OR_ZERO(reset_gpio);
++
++	printk("Doing tpm reset!!");
++
++	if(error) {
++		printk("get tpm reset gpio fail!!!!!\n");
++		return error;
++	}
++
++	if(reset_gpio)
++		gpiod_set_consumer_name(reset_gpio, "TPM reset");
++
++	return 0;
++}
++
+ static int tpm_tis_spi_probe(struct spi_device *dev)
+ {
+ 	struct tpm_tis_spi_phy *phy;
+ 	int irq;
+ 
++	if(reset_tpm(dev)){
++		printk("!!!tpm reset fail!!\n");
++	}
++
+ 	phy = devm_kzalloc(&dev->dev, sizeof(struct tpm_tis_spi_phy),
+ 			   GFP_KERNEL);
+ 	if (!phy)
+Index: linux-5.4.246/drivers/spi/spi.c
+===================================================================
+--- linux-5.4.246.orig/drivers/spi/spi.c
++++ linux-5.4.246/drivers/spi/spi.c
+@@ -1124,8 +1124,17 @@ int spi_do_calibration(struct spi_contro
+ 	bool hit;
+ 
+ 	/* Make sure we can start calibration */
++#if 1
++	if(!ctlr->cal_target || !ctlr->cal_rule) {
++		return 0;
++	} else if(!ctlr->append_caldata) {
++		pr_err("%s: calibration is enabled but no controller data.\n", __func__);
++		return -EINVAL;
++	}
++#else
+ 	if(!ctlr->cal_target || !ctlr->cal_rule || !ctlr->append_caldata)
+ 		return -EINVAL;
++#endif
+ 	datalen = ctlr->cal_rule->datalen;
+ 	addrlen = ctlr->cal_rule->addrlen;
+ 
+

feeds/mediatek-sdk/mediatek/patches-5.4/999-eap111-eap112-eth.patch

@@ -0,0 +1,14 @@
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -5860,6 +5860,11 @@ static int mtk_probe(struct platform_dev
+ 		mtk_qdma_debugfs_init(eth);
+ 	}
+ 
++	if (of_machine_is_compatible("edgecore,eap111") || of_machine_is_compatible("edgecore,eap112")) {
++		sprintf(eth->netdev[0]->name, "eth1");
++		sprintf(eth->netdev[1]->name, "eth0");
++	}
++
+ 	for (i = 0; i < MTK_MAX_DEVS; i++) {
+ 		if (!eth->netdev[i])
+ 			continue;

feeds/mediatek-sdk/mt76/patches/0018-wifi-mt76-mt7915-adjust-rx-filter.patch

@@ -0,0 +1,58 @@
+From b241c6831557c3141801dc2f87e839269ef7bad1 Mon Sep 17 00:00:00 2001
+From: Howard Hsu <howard-yh.hsu@mediatek.com>
+Date: Fri, 19 Apr 2024 15:43:23 +0800
+Subject: [PATCH] wifi: mt76: mt7915: adjust rx filter
+
+Adjust rx filter setting to drop the packet that we do not need to
+receive.
+
+Fixes: e57b7901469f ("mt76: add mac80211 driver for MT7915 PCIe-based chipsets")
+Signed-off-by: Howard Hsu <howard-yh.hsu@mediatek.com>
+---
+ mt7915/main.c | 11 +++++++----
+ 1 file changed, 7 insertions(+), 4 deletions(-)
+
+diff --git a/mt7915/main.c b/mt7915/main.c
+index 26f9a5a..137e09a 100644
+--- a/mt7915/main.c
++++ b/mt7915/main.c
+@@ -489,7 +489,8 @@ static int mt7915_config(struct ieee80211_hw *hw, u32 changed)
+ 			rxfilter |= MT_WF_RFCR_DROP_OTHER_UC;
+ 			dev->monitor_mask &= ~BIT(band);
+ 		} else {
+-			rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC;
++			rxfilter &= ~(MT_WF_RFCR_DROP_A2_BSSID |
++				      MT_WF_RFCR_DROP_OTHER_UC);
+ 			dev->monitor_mask |= BIT(band);
+ 		}
+ 
+@@ -552,13 +553,14 @@ static void mt7915_configure_filter(struct ieee80211_hw *hw,
+ 			   MT_WF_RFCR_DROP_MCAST |
+ 			   MT_WF_RFCR_DROP_BCAST |
+ 			   MT_WF_RFCR_DROP_DUPLICATE |
+-			   MT_WF_RFCR_DROP_A2_BSSID |
+ 			   MT_WF_RFCR_DROP_UNWANTED_CTL |
+ 			   MT_WF_RFCR_DROP_STBC_MULTI);
++	phy->rxfilter |= MT_WF_RFCR_DROP_VERSION;
+ 
+ 	MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM |
+ 			       MT_WF_RFCR_DROP_A3_MAC |
+-			       MT_WF_RFCR_DROP_A3_BSSID);
++			       MT_WF_RFCR_DROP_A3_BSSID |
++			       MT_WF_RFCR_DROP_A2_BSSID);
+ 
+ 	MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL);
+ 
+@@ -569,7 +571,8 @@ static void mt7915_configure_filter(struct ieee80211_hw *hw,
+ 	*total_flags = flags;
+ 	rxfilter = phy->rxfilter;
+ 	if (hw->conf.flags & IEEE80211_CONF_MONITOR)
+-		rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC;
++		rxfilter &= ~(MT_WF_RFCR_DROP_A2_BSSID |
++			      MT_WF_RFCR_DROP_OTHER_UC);
+ 	else
+ 		rxfilter |= MT_WF_RFCR_DROP_OTHER_UC;
+ 	mt76_wr(dev, MT_WF_RFCR(band), rxfilter);
+-- 
+2.18.0
+

feeds/mediatek-sdk/mt76/patches/a02-roaming_fix.patch

@@ -0,0 +1,81 @@
+--- a/mt7915/main.c
++++ b/mt7915/main.c
+@@ -412,6 +412,13 @@ static int mt7915_set_key(struct ieee802
+ 	int idx = key->keyidx;
+ 	int err = 0;
+ 
++	if (sta && !wcid->sta) {
++		if (cmd != SET_KEY)
++			return 0;
++
++		return -EOPNOTSUPP;
++	}
++
+ 	/* The hardware does not support per-STA RX GTK, fallback
+ 	 * to software mode for these.
+ 	 */
+@@ -803,6 +810,56 @@ mt7915_event_callback(struct ieee80211_h
+ 	return;
+ }
+ 
++struct drop_sta_iter {
++	struct mt7915_dev *dev;
++	struct ieee80211_hw *hw;
++	struct ieee80211_vif *vif;
++	u8 sta_addr[ETH_ALEN];
++};
++
++static void
++__mt7915_drop_sta(void *ptr, u8 *mac, struct ieee80211_vif *vif)
++{
++	struct drop_sta_iter *data = ptr;
++	struct ieee80211_sta *sta;
++	struct mt7915_sta *msta;
++
++	if (vif == data->vif || vif->type != NL80211_IFTYPE_AP)
++		return;
++
++	sta = ieee80211_find_sta_by_ifaddr(data->hw, data->sta_addr, mac);
++	if (!sta)
++		return;
++
++	msta = (struct mt7915_sta *)sta->drv_priv;
++	mt7915_mcu_add_sta(data->dev, vif, sta, false);
++	msta->wcid.sta = 0;
++}
++
++static void
++mt7915_drop_other_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
++		      struct ieee80211_sta *sta)
++{
++	struct mt76_phy *ext_phy = dev->mt76.phys[MT_BAND1];
++	struct drop_sta_iter data = {
++		.dev = dev,
++		.hw = dev->mphy.hw,
++		.vif = vif,
++	};
++
++	if (vif->type != NL80211_IFTYPE_AP)
++		return;
++
++	memcpy(data.sta_addr, sta->addr, ETH_ALEN);
++	ieee80211_iterate_active_interfaces(data.hw, 0, __mt7915_drop_sta, &data);
++
++	if (!ext_phy)
++		return;
++
++	data.hw = ext_phy->hw;
++	ieee80211_iterate_active_interfaces(data.hw, 0, __mt7915_drop_sta, &data);
++}
++
+ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
+ 		       struct ieee80211_sta *sta)
+ {
+@@ -843,6 +900,7 @@ int mt7915_mac_sta_add(struct mt76_dev *
+ 	mt7915_mac_wtbl_update(dev, idx,
+ 			       MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
+ 
++	mt7915_drop_other_sta(dev, vif, sta);
+ 	ret = mt7915_mcu_add_sta(dev, vif, sta, true);
+ 	if (ret)
+ 		return ret;

feeds/qca/ath12k-firmware/Makefile

@@ -0,0 +1,38 @@
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=ath12k-firmware
+PKG_RELEASE:=1
+
+include $(INCLUDE_DIR)/package.mk
+
+RSTRIP:=:
+STRIP:=:
+
+define Package/ath12k-firmware-default
+  SECTION:=firmware
+  CATEGORY:=Firmware
+  URL:=$(PKG_SOURCE_URL)
+  DEPENDS:=
+endef
+
+define Package/ath12k-firmware-qcn92xx
+$(Package/ath12k-firmware-default)
+  TITLE:=ath12k firmware for QCN92XX devices
+  DEPENDS:=@TARGET_ipq95xx
+endef
+
+define Package/ath12k-firmware-qcn92xx/description
+Standard ath12k firmware for QCN92XX from QCA
+endef
+
+define Build/Compile
+
+endef
+
+define Package/ath12k-firmware-qcn92xx/install
+	$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
+	$(INSTALL_DATA) ./files/QCN92XX/* \
+		$(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
+endef
+
+$(eval $(call BuildPackage,ath12k-firmware-qcn92xx))

feeds/qca/ath12k-firmware/files/QCN92XX/qdss_trace_config.bin

@@ -0,0 +1,181 @@
+seq_start;
+seq_type:mem_req;
+sink:etr_ddr,0x1,0x400;
+seq_end;
+seq_start;
+seq_type:mac_event_trace;
+subsys_cfg_start:umac;
+cxc_eb0:0x2,0x0,0x0,0x0,0x0;
+reo_eb0:0x4,0x61C81F4,0x0,0x0,0x0;
+tqm_eb0:0x5,0xCDB3C6C6,0x803007E0,0x0,0x0;
+tcl_eb0:0x6,0x25030034,0x3000,0x0,0x0;
+wbm_eb0:0x7,0x880004,0x380000,0x0,0x0;
+cxc_eb1:0x8,0x0,0x0,0x0,0x0;
+tcl_eb1:0x9,0x25030034,0x3000,0x0,0x0;
+reo_eb1:0xA,0x61C81F4,0x0,0x0,0x0;
+tqm_eb1:0xB,0xCDB3C6C6,0x803007E0,0x0,0x0;
+wbm_eb1:0xC,0x880004,0x380000,0x0,0x0;
+mxi:0xD,0x122234,0x0,0x0,0x0;
+wsib:0xE,0x0,0x0,0x0,0x0;
+memw:0x0;
+subsys_cfg_end:umac;
+subsys_cfg_start:dmac;
+swevt:0x0,0xFFFFFFFF,0xFFFFFFFF,0x00000000,0x00000000;
+txdma_eb0:0x1,0x200,0x0,0x0,0x0;
+txdma_eb1:0x2,0xD9220,0xAF0,0x0,0x0;
+txdma_eb2:0x3,0xD9220,0xAF0,0x0,0x0;
+rxdma_eb0:0x4,0x93297E3F,0xC00000,0x0,0x0;
+rxdma_eb1:0x5,0x707F,0x0,0x0,0x0;
+txole_eb0:0x6,0xFFFFFFFF,0x0,0x0,0x0;
+txole_eb1:0x7,0x781F0734,0x6,0x0,0x0;
+txole_eb2:0x8,0x781F0734,0x6,0x0,0x0;
+rxole_eb0:0x9,0xF,0x0,0x0,0x0;
+rxole_eb1:0xA,0x7F,0x0,0x0,0x0;
+rxole_eb2:0xB,0x7F,0x0,0x0,0x0;
+crypto:0xC,0xFF3FFF,0x0,0x0,0x0;
+mxi:0xD,0x122234,0x0,0x0,0x0;
+sfm_eb0:0xE,0x40000003,0x7F8,0x0,0x0;
+rxmon_eb0:0x14,0x22800010,0x40A00,0x0,0x0;
+rxmon_eb1:0x15,0x18005000,0x18,0x0,0x0;
+txmon_eb0:0x12,0x22800010,0x40A00,0x0,0x0;
+txmon_eb1:0x13,0x98005000,0x199,0x0,0x0;
+memw:0x0;
+subsys_cfg_end:dmac;
+subsys_cfg_start:pmac0;
+swevt:0x0,0xFFFFFFFF,0xFFFFFFFF,0x00000000,0x00000000;
+hwsch:0x1,0x803FFFF7,0x30003,0x0,0x0;
+pdg:0x2,0xE430F87,0x622856E,0x0,0x0;
+txpcu_eb0:0x8,0xE87A047,0x132,0x0,0x0;
+rxpcu_eb0:0x9,0x10060217,0x1F24500,0x0,0x0;
+rri:0xa,0x0,0x0,0x0,0x0;
+ampi:0xb,0x69C07,0x0,0x0,0x0;
+mxi:0xd,0x122234,0x0,0x0,0x0;
+txpcu_eb1:0x10,0x0,0x0,0x0,0x0;
+sfm_eb1:0x12,0x40000003,0x7F8,0x0,0x0;
+rxpcu_eb1:0x13,0x0,0x0,0x0,0x0;
+hwmlo:0x1c,0x1C100004,0x0,0x0,0x0;
+memw:0x0;
+subsys_cfg_end:pmac0;
+subsys_cfg_start:pmac1;
+swevt:0x0,0xFFFFFFFF,0xFFFFFFFF,0x00000000,0x00000000;
+hwsch:0x1,0x803FFFF7,0x30003,0x0,0x0;
+pdg:0x2,0xE430F87,0x622856E,0x0,0x0;
+txpcu_eb0:0x8,0xE87A047,0x132,0x0,0x0;
+rxpcu_eb0:0x9,0x10060217,0x1F24500,0x0,0x0;
+rri:0xa,0x0,0x0,0x0,0x0;
+ampi:0xb,0x69C07,0x0,0x0,0x0;
+mxi:0xd,0x122234,0x0,0x0,0x0;
+txpcu_eb1:0x10,0x0,0x0,0x0,0x0;
+sfm_eb1:0x12,0x40000003,0x7F8,0x0,0x0;
+rxpcu_eb1:0x13,0x0,0x0,0x0,0x0;
+hwmlo:0x1c,0x1C100004,0x0,0x0,0x0;
+memw:0x0;
+subsys_cfg_end:pmac1;
+seq_end;
+seq_start;
+seq_type:phy_event_trace;
+subsys_cfg_start:phya0;
+data_tlv:0;
+wsi:0x0,0x00000000,0x00000000;
+rfcntl:0x0,0x00000000,0x00000000;
+tpc:0x0,0x00000000,0x00000000;
+cal:0x0,0x00000000,0x00000000;
+impcorr:0x0,0x00000000,0x00000000;
+mpi:0x6,0x00000006,0x00000000;
+fft:0x0,0x00000000,0x00000000;
+txtd:0x0,0x00000000,0x00000000;
+pmi:0x9,0x0000000A,0x00000000;
+rxtd:0xa,0x0000000A,0x00000000;
+demfront:0x0,0x00000000,0x00000000;
+pcss:0xc,0x0000003E,0x00000000;
+txfd:0x0,0x00000000,0x00000000;
+robe:0x0,0x00000000,0x00000000;
+dmac_0_1:0x0,0x00000000,0x00000000;
+dmac_2_3:0x0,0x00000000,0x00000000;
+dmac_4_5:0x0,0x00000000,0x00000000;
+dmac_6:0x0,0x00000000,0x00000000;
+eos:0x0,0x00000000,0x00000000;
+subsys_cfg_end:phya0;
+//subsys_cfg_start:phya1;
+//data_tlv:1;
+//wsi:0x0,0x00000000,0x00000000;
+//rfcntl:0x0,0x00000000,0x00000000;
+//tpc:0x0,0x00000000,0x00000000;
+//cal:0x0,0x00000000,0x00000000;
+//impcorr:0x0,0x00000000,0x00000000;
+//mpi:0x6,0x00000006,0x00000000;
+//fft:0x0,0x00000000,0x00000000;
+//txtd:0x0,0x00000000,0x00000000;
+//pmi:0x9,0x0000000A,0x00000000;
+//rxtd:0xa,0x0000000A,0x00000000;
+//demfront:0x0,0x00000000,0x00000000;
+//pcss:0xc,0x0000003E,0x00000000;
+//txfd:0x0,0x00000000,0x00000000;
+//robe:0x0,0x00000000,0x00000000;
+//dmac_0_1:0x0,0x00000000,0x00000000;
+//dmac_2_3:0x0,0x00000000,0x00000000;
+//dmac_4_5:0x0,0x00000000,0x00000000;
+//dmac_6:0x0,0x00000000,0x00000000;
+//eos:0x0,0x00000000,0x00000000;
+//subsys_cfg_end:phya1;
+seq_end;
+//seq_start;
+//seq_type:noc_trace;
+//noc_id:umacnoc;
+//syncoutperiod:0x1F;
+//probe_id:0x0;
+//probe_type:0x2;
+//probe_andinv:0x0;
+//probe_portsel:0x1;
+//filter0_path:0x0;
+//filter0_path_mask:0x0;
+//filter0_addr_min_lo:0x0;
+//filter0_addr_min_hi:0x0;
+//filter0_addr_max_lo:0xFFFFFFFF;
+//filter0_addr_max_hi:0xF;
+//filter0_opcode:0x3;
+//filter0_status:0x3;
+//filter0_trtype:0x0;
+//filter0_extid:0x0;
+//filter0_extid_mask:0x0;
+//filter1_path:0x0;
+//filter1_path_mask:0x0;
+//filter1_addr_min_lo:0x0;
+//filter1_addr_min_hi:0x0;
+//filter1_addr_max_lo:0xFFFFFFFF;
+//filter1_addr_max_hi:0xF;
+//filter1_opcode:0x3;
+//filter1_status:0x3;
+//filter1_trtype:0x0;
+//filter1_extid:0x0;
+//filter1_extid_mask:0x0;
+//seq_end;
+//seq_start;
+//seq_type:mac_tlv_trace;
+//subsys_cfg_start:pmac0;
+//tlv_port:tqm_hwsch_tlv;
+//tlv_config:tlv_type,other_tlv,specific_tlv,data_tlv;
+//tlv_config:1,3,3,3;
+//memw:0x2,0x10220A0,0xFFFFFDFF,0x10220B0,0x7FFFFFFF;
+//subsys_cfg_end:pmac0;
+//seq_end;
+//seq_start;
+//seq_start;
+//seq_type:mac_tlv_trace;
+//subsys_cfg_start:pmac1;
+//tlv_port:tqm_hwsch_tlv;
+//tlv_config:tlv_type,other_tlv,specific_tlv,data_tlv;
+//tlv_config:1,3,3,3;
+//memw:0x2,0x10220A0,0xFFFFFDFF,0x10220B0,0x7FFFFFFF;
+//subsys_cfg_end:pmac1;
+//seq_end;
+//seq_start;
+//seq_type:mac_obo_trace;
+//subsys_cfg_start:pmac0;
+//tbus_port:pdg_testbus, 0x7;
+//memw:0x0;
+//subsys_cfg_end:pmac0;
+//seq_end;
+//seq_start;
+//seq_type:irq_trace;
+//seq_end;

feeds/qca/ath12k-wifi/Makefile

@@ -0,0 +1,47 @@
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/version.mk
+
+PKG_NAME:=ath12k-wifi
+PKG_RELEASE:=1
+PKG_FLAGS:=nonshared
+
+include $(INCLUDE_DIR)/package.mk
+
+RSTRIP:=:
+STRIP:=:
+
+define Build/Prepare
+	mkdir -p $(PKG_BUILD_DIR)
+endef
+
+define Build/Compile
+endef
+
+#
+# This is intended to be used on an interim basis until device-specific
+# board data for new devices is available through the upstream compilation
+#
+# Please send a mail with your device-specific board files upstream.
+# You can find instructions and examples on the linux-wireless wiki:
+# <https://wireless.wiki.kernel.org/en/users/drivers/ath10k/boardfiles>
+#
+
+define Package/ath12k-wifi-default
+  SUBMENU:=ath12k Board-Specific Overrides
+  SECTION:=firmware
+  CATEGORY:=Firmware
+  DEPENDS:=@TARGET_ipq95xx
+  TITLE:=Custom Board
+endef
+
+define Package/ath12k-wifi-qcom-qcn92xx
+$(call Package/ath12k-wifi-default)
+    TITLE:=board-2.bin for QCOM QCN92XX eval kits
+endef
+
+define Package/ath12k-wifi-qcom-qcn92xx/install
+	$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
+	$(INSTALL_DATA) ./board-2.bin.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
+endef
+
+$(eval $(call BuildPackage,ath12k-wifi-qcom-qcn92xx))

feeds/qca/hostapd/Config.in

@@ -0,0 +1,113 @@
+# wpa_supplicant config
+config WPA_RFKILL_SUPPORT
+	bool "Add rfkill support"
+	depends on PACKAGE_wpa-supplicant-qca || \
+		   PACKAGE_wpa-supplicant-qca-openssl || \
+		   PACKAGE_wpa-supplicant-qca-wolfssl || \
+		   PACKAGE_wpa-supplicant-qca-mbedtls || \
+		   PACKAGE_wpa-supplicant-qca-mesh-openssl || \
+		   PACKAGE_wpa-supplicant-qca-mesh-wolfssl || \
+		   PACKAGE_wpa-supplicant-qca-mesh-mbedtls || \
+		   PACKAGE_wpa-supplicant-qca-basic || \
+		   PACKAGE_wpa-supplicant-qca-mini || \
+		   PACKAGE_wpa-supplicant-qca-p2p || \
+		   PACKAGE_wpad-qca || \
+		   PACKAGE_wpad-qca-openssl || \
+		   PACKAGE_wpad-qca-wolfssl || \
+		   PACKAGE_wpad-qca-mbedtls || \
+		   PACKAGE_wpad-qca-basic || \
+		   PACKAGE_wpad-qca-basic-openssl || \
+		   PACKAGE_wpad-qca-basic-wolfssl || \
+		   PACKAGE_wpad-qca-basic-mbedtls || \
+		   PACKAGE_wpad-qca-mini || \
+		   PACKAGE_wpad-qca-mesh-openssl || \
+		   PACKAGE_wpad-qca-mesh-wolfssl || \
+		   PACKAGE_wpad-qca-mesh-mbedtls
+	default n
+
+config WPA_MSG_MIN_PRIORITY
+	int "Minimum debug message priority"
+	depends on PACKAGE_wpa-supplicant-qca || \
+		   PACKAGE_wpa-supplicant-qca-openssl || \
+		   PACKAGE_wpa-supplicant-qca-wolfssl || \
+		   PACKAGE_wpa-supplicant-qca-mbedtls || \
+		   PACKAGE_wpa-supplicant-qca-mesh-openssl || \
+		   PACKAGE_wpa-supplicant-qca-mesh-wolfssl || \
+		   PACKAGE_wpa-supplicant-qca-mesh-mbedtls || \
+		   PACKAGE_wpa-supplicant-qca-basic || \
+		   PACKAGE_wpa-supplicant-qca-mini || \
+		   PACKAGE_wpa-supplicant-qca-p2p || \
+		   PACKAGE_wpad-qca || \
+		   PACKAGE_wpad-qca-openssl || \
+		   PACKAGE_wpad-qca-wolfssl || \
+		   PACKAGE_wpad-qca-mbedtls || \
+		   PACKAGE_wpad-qca-basic || \
+		   PACKAGE_wpad-qca-basic-openssl || \
+		   PACKAGE_wpad-qca-basic-wolfssl || \
+		   PACKAGE_wpad-qca-basic-mbedtls || \
+		   PACKAGE_wpad-qca-mini || \
+		   PACKAGE_wpad-qca-mesh-openssl || \
+		   PACKAGE_wpad-qca-mesh-wolfssl || \
+		   PACKAGE_wpad-qca-mesh-mbedtls
+	default 3
+	help
+	  Useful values are:
+	    0 = all messages
+		1 = raw message dumps
+		2 = most debugging messages
+		3 = info messages
+		4 = warnings
+		5 = errors
+
+config WPA_WOLFSSL
+	bool
+	default PACKAGE_wpa-supplicant-qca-wolfssl ||\
+	        PACKAGE_wpad-qca-wolfssl ||\
+	        PACKAGE_wpad-qca-basic-wolfssl || \
+	        PACKAGE_wpad-qca-mesh-wolfssl ||\
+	        PACKAGE_eapol-test-qca-wolfssl
+	select WOLFSSL_HAS_AES_CCM
+	select WOLFSSL_HAS_ARC4
+	select WOLFSSL_HAS_DH
+	select WOLFSSL_HAS_OCSP
+	select WOLFSSL_HAS_SESSION_TICKET
+	select WOLFSSL_HAS_WPAS
+
+config DRIVER_WEXT_SUPPORT
+	bool
+	select KERNEL_WIRELESS_EXT
+	default n
+
+config DRIVER_11AC_SUPPORT
+	bool
+	default n
+
+config DRIVER_11AX_SUPPORT
+	bool
+	default n
+	select WPA_MBO_SUPPORT
+
+config WPA_ENABLE_WEP
+	bool "Enable support for unsecure and obsolete WEP"
+	help
+	  Wired equivalent privacy (WEP) is an obsolete cryptographic data
+	  confidentiality algorithm that is not considered secure. It should not be used
+	  for anything anymore. The functionality needed to use WEP is available in the
+	  current hostapd release under this optional build parameter and completely
+	  removed in a future release.
+
+config WPA_MBO_SUPPORT
+	bool "Multi Band Operation (Agile Multiband)"
+	default PACKAGE_wpa-supplicant-qca || \
+		PACKAGE_wpa-supplicant-qca-openssl || \
+		PACKAGE_wpa-supplicant-qca-wolfssl || \
+		PACKAGE_wpa-supplicant-qca-mbedtls || \
+		PACKAGE_wpad-qca || \
+		PACKAGE_wpad-qca-openssl || \
+		PACKAGE_wpad-qca-wolfssl || \
+		PACKAGE_wpad-qca-mbedtls
+	help
+	  Multi Band Operation aka (Agile Multiband) enables features
+	  that facilitate efficient use of multiple frequency bands.
+	  Enabling MBO on an AP using RSN requires 802.11w to be enabled.
+	  Hostapd will refuse to start if MBO and RSN are enabled without 11w.