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GLKRVP: Correct GPIO assignment for PCH_WAKE_L

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BUG=b:67797598
BRANCH=glkrvp
TEST=In S3, toggling PCH_WAKE_L wakes system to S0.

Change-Id: If4d6786d8b24488c11f7894499c7e19f43a9b7f8
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/719486
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
Vijay Hiremath
2017-10-14 14:14:14 -07:00
committed by chrome-bot
parent 72d91062f4
commit b2d6bf0ada
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
board/glkrvp/gpio.inc
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@@ -28,7 +28,7 @@ GPIO_INT(EC_VOLDN_BTN_ODL, PIN(3, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_inter
GPIO(PCH_SMI_L, PIN(C, 6), GPIO_ODR_HIGH) /* EC_SMI_ODL */
GPIO(PCH_SCI_L, PIN(7, 6), GPIO_ODR_HIGH) /* EC_SCI_ODL */
GPIO(PCH_PWRBTN_L, PIN(7, 5), GPIO_ODR_HIGH) /* EC_PCH_PWR_BTN_ODL */
GPIO(PCH_WAKE_L, PIN(7, 0), GPIO_ODR_HIGH) /* EC_PCH_WAKE_ODL */
GPIO(PCH_WAKE_L, PIN(C, 1), GPIO_ODR_HIGH) /* EC_PCH_WAKE_ODL */
GPIO(PCH_SYS_PWROK, PIN(3, 5), GPIO_OUT_LOW) /* EC_PCH_PWROK */
GPIO(ENABLE_BACKLIGHT, PIN(9, 7), GPIO_ODR_HIGH) /* EC_BL_EN_OD */
GPIO(ENTERING_RW, PIN(A, 7), GPIO_OUTPUT) /* EC_ENTERING_RW */
@@ -75,6 +75,7 @@ GPIO(NC_60, PIN(6, 0), GPIO_INPUT)
GPIO(NC_61, PIN(6, 1), GPIO_INPUT)
GPIO(NC_67, PIN(6, 7), GPIO_INPUT)
GPIO(NC_70, PIN(7, 0), GPIO_INPUT)
GPIO(NC_71, PIN(7, 1), GPIO_INPUT)
GPIO(NC_73, PIN(7, 3), GPIO_INPUT)
GPIO(NC_74, PIN(7, 4), GPIO_INPUT)
@@ -87,7 +88,6 @@ GPIO(NC_84, PIN(8, 4), GPIO_INPUT)
GPIO(NC_B1, PIN(B, 1), GPIO_INPUT)
GPIO(NC_C0, PIN(C, 0), GPIO_INPUT)
GPIO(NC_C1, PIN(C, 1), GPIO_INPUT)
GPIO(NC_C2, PIN(C, 2), GPIO_INPUT)
GPIO(NC_C3, PIN(C, 3), GPIO_INPUT)
GPIO(NC_C4, PIN(C, 4), GPIO_INPUT)